公开(公告)号：US20110084267A1

公开(公告)日：2011-04-14

申请号：US12898357

申请日：2010-10-05

申请人： Shunpei Yamazaki ,  Jun Koyama ,  Masahiro Takahashi ,  Hideyuki Kishida ,  Akiharu Miyanaga ,  Junpei Sugao ,  Hideki Uochi ,  Yasuo Nakamura

发明人： Shunpei Yamazaki ,  Jun Koyama ,  Masahiro Takahashi ,  Hideyuki Kishida ,  Akiharu Miyanaga ,  Junpei Sugao ,  Hideki Uochi ,  Yasuo Nakamura

IPC分类号： H01L29/12 ,  H01L21/34

CPC分类号： H01L29/7869 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02631 ,  H01L21/324 ,  H01L21/76801 ,  H01L21/76828 ,  H01L21/76838 ,  H01L27/1225 ,  H01L27/124 ,  H01L29/24 ,  H01L29/42384 ,  H01L29/45 ,  H01L29/4908 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/78606

摘要： By using a conductive layer including Cu as a long lead wiring, increase in wiring resistance is suppressed. Further, the conductive layer including Cu is provided in such a manner that it does not overlap with the oxide semiconductor layer in which a channel region of a TFT is formed, and is surrounded by insulating layers including silicon nitride, whereby diffusion of Cu can be prevented; thus, a highly reliable semiconductor device can be manufactured. Specifically, a display device which is one embodiment of a semiconductor device can have high display quality and operate stably even when the size or definition thereof is increased.

摘要翻译： 通过使用包含Cu的导电层作为长引线，可以抑制布线电阻的增加。 此外，包括Cu的导电层以与形成TFT的沟道区域的氧化物半导体层不重叠并被包括氮化硅的绝缘层包围的方式设置，由此Cu的扩散可以 防止 因此，可以制造高度可靠的半导体器件。 具体地说，作为半导体装置的一个实施方式的显示装置，即使在尺寸或定义增加的情况下也能够具有高的显示质量，并且稳定地工作。

公开(公告)号：US20110084266A1

公开(公告)日：2011-04-14

申请号：US12897419

申请日：2010-10-04

申请人： Shunpei Yamazaki ,  Masayuki Sakakura ,  Ryosuke Watanabe ,  Junichiro Sakata ,  Kengo Akimoto ,  Akiharu Miyanaga ,  Takuya Hirohashi ,  Hideyuki Kishida

发明人： Shunpei Yamazaki ,  Masayuki Sakakura ,  Ryosuke Watanabe ,  Junichiro Sakata ,  Kengo Akimoto ,  Akiharu Miyanaga ,  Takuya Hirohashi ,  Hideyuki Kishida

IPC分类号： H01L29/12

CPC分类号： H01L29/7869 ,  H01L27/1225 ,  H01L29/045 ,  H01L29/45 ,  H01L29/78606 ,  H01L29/78696

摘要： In a channel protected thin film transistor in which a channel formation region is formed using an oxide semiconductor, an oxide semiconductor layer which is dehydrated or dehydrogenated by a heat treatment is used as an active layer, a crystal region including nanocrystals is included in a superficial portion in the channel formation region, and the rest portion is amorphous or is formed of a mixture of amorphousness/non-crystals and microcrystals, where an amorphous region is dotted with microcrystals. By using an oxide semiconductor layer having such a structure, a change to an n-type caused by entry of moisture or elimination of oxygen to or from the superficial portion and generation of a parasitic channel can be prevented and a contact resistance with a source and drain electrodes can be reduced.

摘要翻译： 在使用氧化物半导体形成沟道形成区域的沟道保护薄膜晶体管中，使用通过热处理脱水或脱氢的氧化物半导体层作为有源层，包括纳米晶体的晶体区域包含在表面 并且其余部分是无定形的或由非晶/非晶体和微晶体的混合物形成，其中非晶区域用微晶点缀。 通过使用具有这种结构的氧化物半导体层，可以防止由于进入水分或从表面部分去除氧气或从表面部分排出而引起的n型变化和产生寄生通道，并且与源极接触电阻 可以减少漏电极。

公开(公告)号：US20100284983A1

公开(公告)日：2010-11-11

申请号：US11917454

申请日：2006-06-14

申请人： Toshinori Ikehara ,  Hideyuki Kishida

发明人： Toshinori Ikehara ,  Hideyuki Kishida

IPC分类号： A61K31/122 ,  A61K38/43 ,  A61K9/14 ,  A61K8/92 ,  A61Q1/02 ,  A61Q11/00 ,  A61Q19/00 ,  A61P43/00 ,  A23L1/30 ,  A23K1/00 ,  A23L2/52

CPC分类号： A23K20/174 ,  A23L29/10 ,  A23L33/10 ,  A61K8/355 ,  A61K8/39 ,  A61K9/107 ,  A61K31/122 ,  A61K47/14 ,  A61K47/26 ,  A61Q19/00

摘要： A coenzyme Q10-containing water soluble composition comprises coenzyme Q10, a hydrophilic polyglycerol fatty acid ester, a lipophilic sucrose fatty acid ester and an aqueous phase component and a process for producing the same are disclosed. A coenzyme Q10-containing water-soluble dry powder can be obtained by drying the above-mentioned coenzyme Q10-containing water soluble composition. A food, functional food, beverage, pharmaceutical product, quasi drug, cosmetic, or animal food can be obtained by using the above-mentioned coenzyme Q10-containing water soluble composition or the above-mentioned coenzyme Q10-containing water-soluble dry powder. The coenzyme Q10-containing water soluble composition has a high bioavailability, and maintains a stable emulsion form for a long period of time from refrigeration temperature to room temperature and allows efficient supply.

摘要翻译： 含有辅酶Q10的水溶性组合物包括辅酶Q10，亲水性聚甘油脂肪酸酯，亲脂性蔗糖脂肪酸酯和水相成分及其制造方法。 可以通过干燥上述含有辅酶Q10的水溶性组合物来获得含辅酶Q10的水溶性干粉。 可以通过使用上述含有辅酶Q10的水溶性组合物或上述含有辅酶Q10的水溶性干粉来获得食品，功能性食品，饮料，药物，准药物，化妆品或动物性食品。 含有辅酶Q10的水溶性组合物具有高的生物利用度，并且从制冷温度到室温长时间保持稳定的乳液形式并且可以有效地供应。

公开(公告)号：US07090874B2

公开(公告)日：2006-08-15

申请号：US10752643

申请日：2004-01-08

申请人： Tatsumasa Mae ,  Misuzu Tsukagawa ,  Hideyuki Kishida ,  Mitsuaki Kitano ,  Mikio Kitahara ,  Kaku Nakagawa ,  Minpei Kuroda ,  Yoshihiro Mimaki ,  Yutaka Sashida

发明人： Tatsumasa Mae ,  Misuzu Tsukagawa ,  Hideyuki Kishida ,  Mitsuaki Kitano ,  Mikio Kitahara ,  Kaku Nakagawa ,  Minpei Kuroda ,  Yoshihiro Mimaki ,  Yutaka Sashida

IPC分类号： A61K36/9066

CPC分类号： A61K31/12 ,  A21D2/14 ,  A23D7/0056 ,  A23D9/007 ,  A23K20/111 ,  A23K50/40 ,  A23L7/109 ,  A23L27/60 ,  A23L33/105 ,  A61K31/00

摘要： The object of the present invention is to provide PPARγ ligand derived from naturally occurring sources and a composition for preventing and/or improving Insulin Resistance Syndrome, diabetes mellitus, obesity or visceral fat obesity comprising the PPARγ ligand as an active agent.The present invention relates to a ligand for peroxisome proliferator-activated receptor which comprises curcumin or its derivatives. The composition according to the present invention, which comprises the PPARγ ligand as an active agent is useful for preventing and/or improving Insulin Resistance Syndrome, diabetes mellitus, obesity or visceral fat obesity.

公开(公告)号：US09184296B2

公开(公告)日：2015-11-10

申请号：US13413714

申请日：2012-03-07

申请人： Junichi Koezuka ,  Shinji Ohno ,  Yuichi Sato ,  Masahiro Takahashi ,  Hideyuki Kishida

发明人： Junichi Koezuka ,  Shinji Ohno ,  Yuichi Sato ,  Masahiro Takahashi ,  Hideyuki Kishida

IPC分类号： H01L29/04 ,  H01L29/786 ,  H01L27/12 ,  H01L29/66

CPC分类号： H01L29/7869 ,  H01L27/1225 ,  H01L29/045 ,  H01L29/66969 ,  H01L29/78693 ,  H01L29/78696

摘要： The semiconductor device includes an oxide semiconductor film having a first region and a pair of second regions facing each other with the first region provided therebetween, a gate insulating film over the oxide semiconductor film, and a first electrode overlapping with the first region, over the gate insulating film. The first region is a non-single-crystal oxide semiconductor region including a c-axis-aligned crystal portion. The pair of second regions is an oxide semiconductor region containing dopant and including a plurality of crystal portions.

摘要翻译： 半导体器件包括具有第一区域和一对第二区域的氧化物半导体膜，第一区域和第二区域彼此面对，其间设置有第一区域，氧化物半导体膜上的栅极绝缘膜和与第一区域重叠的第一电极， 栅极绝缘膜。 第一区域是包括c轴取向晶体部分的非单晶氧化物半导体区域。 所述一对第二区域是含有掺杂剂且包含多个晶体部分的氧化物半导体区域。

公开(公告)号：US08816349B2

公开(公告)日：2014-08-26

申请号：US12898357

申请日：2010-10-05

申请人： Shunpei Yamazaki ,  Jun Koyama ,  Masahiro Takahashi ,  Hideyuki Kishida ,  Akiharu Miyanaga ,  Junpei Sugao ,  Hideki Uochi ,  Yasuo Nakamura

发明人： Shunpei Yamazaki ,  Jun Koyama ,  Masahiro Takahashi ,  Hideyuki Kishida ,  Akiharu Miyanaga ,  Junpei Sugao ,  Hideki Uochi ,  Yasuo Nakamura

IPC分类号： H01L27/14

CPC分类号： H01L29/7869 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02631 ,  H01L21/324 ,  H01L21/76801 ,  H01L21/76828 ,  H01L21/76838 ,  H01L27/1225 ,  H01L27/124 ,  H01L29/24 ,  H01L29/42384 ,  H01L29/45 ,  H01L29/4908 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/78606

摘要： By using a conductive layer including Cu as a long lead wiring, increase in wiring resistance is suppressed. Further, the conductive layer including Cu is provided in such a manner that it does not overlap with the oxide semiconductor layer in which a channel region of a TFT is formed, and is surrounded by insulating layers including silicon nitride, whereby diffusion of Cu can be prevented; thus, a highly reliable semiconductor device can be manufactured. Specifically, a display device which is one embodiment of a semiconductor device can have high display quality and operate stably even when the size or definition thereof is increased.

摘要翻译： 通过使用包含Cu的导电层作为长引线，可以抑制布线电阻的增加。 此外，包括Cu的导电层以与形成TFT的沟道区域的氧化物半导体层不重叠并被包括氮化硅的绝缘层包围的方式设置，由此Cu的扩散可以 防止 因此，可以制造高度可靠的半导体器件。 具体地说，作为半导体装置的一个实施方式的显示装置，即使在尺寸或定义增加的情况下也能够具有高的显示质量，并且稳定地工作。

公开(公告)号：US08779418B2

公开(公告)日：2014-07-15

申请号：US12900136

申请日：2010-10-07

申请人： Akiharu Miyanaga ,  Junichiro Sakata ,  Masayuki Sakakura ,  Masahiro Takahashi ,  Hideyuki Kishida ,  Shunpei Yamazaki

发明人： Akiharu Miyanaga ,  Junichiro Sakata ,  Masayuki Sakakura ,  Masahiro Takahashi ,  Hideyuki Kishida ,  Shunpei Yamazaki

IPC分类号： H01L29/12

CPC分类号： H01L29/7869 ,  H01L27/1214 ,  H01L27/1222 ,  H01L27/1225 ,  H01L27/3262 ,  H01L29/42384 ,  H01L29/45 ,  H01L29/4908 ,  H01L29/78618

摘要： An object is to provide a thin film transistor having favorable electric characteristics and a semiconductor device including the thin film transistor as a switching element. The thin film transistor includes a gate electrode formed over an insulating surface, a gate insulating film over the gate electrode, an oxide semiconductor film which overlaps with the gate electrode over the gate insulating film and which includes a layer where the concentration of one or a plurality of metals contained in the oxide semiconductor is higher than that in other regions, a pair of metal oxide films formed over the oxide semiconductor film and in contact with the layer, and a source electrode and a drain electrode in contact with the metal oxide films. The metal oxide films are formed by oxidation of a metal contained in the source electrode and the drain electrode.

摘要翻译： 目的是提供一种具有良好电特性的薄膜晶体管和包括薄膜晶体管作为开关元件的半导体器件。 薄膜晶体管包括形成在绝缘表面上的栅极电极，栅电极上的栅极绝缘膜，与栅极绝缘膜上的栅电极重叠的氧化物半导体膜，并且包括其中浓度为1或 包含在氧化物半导体中的多种金属高于其他区域，形成在氧化物半导体膜上并与该层接触的一对金属氧化物膜，以及与金属氧化物膜接触的源电极和漏电极 。 金属氧化物膜通过氧化源电极和漏电极中所含的金属而形成。

公开(公告)号：US08492757B2

公开(公告)日：2013-07-23

申请号：US12717324

申请日：2010-03-04

申请人： Junichiro Sakata ,  Takuya Hirohashi ,  Hideyuki Kishida

发明人： Junichiro Sakata ,  Takuya Hirohashi ,  Hideyuki Kishida

IPC分类号： H01L29/10

CPC分类号： H01L29/7869 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02631 ,  H01L27/1225 ,  H01L29/0847 ,  H01L29/1033 ,  H01L29/24 ,  H01L29/41733 ,  H01L29/42356 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/78618 ,  H01L29/78693 ,  H01L29/78696

摘要： It is an object to provide a highly reliable semiconductor device including a thin film transistor with stable electric characteristics. In a semiconductor device including an inverted staggered thin film transistor whose semiconductor layer is an oxide semiconductor layer, a buffer layer is provided over the oxide semiconductor layer. The buffer layer is in contact with a channel formation region of the semiconductor layer and source and drain electrode layers. A film of the buffer layer has resistance distribution. A region provided over the channel formation region of the semiconductor layer has lower electrical conductivity than the channel formation region of the semiconductor layer, and a region in contact with the source and drain electrode layers has higher electrical conductivity than the channel formation region of the semiconductor layer.

摘要翻译： 本发明的目的是提供一种包括具有稳定电特性的薄膜晶体管的高度可靠的半导体器件。 在包括半导体层为氧化物半导体层的反交错薄膜晶体管的半导体器件中，在氧化物半导体层上设置有缓冲层。 缓冲层与半导体层的沟道形成区域和源极和漏极电极层接触。 缓冲层的膜具有电阻分布。 设置在半导体层的沟道形成区域上的区域具有比半导体层的沟道形成区域更低的导电性，并且与源极和漏极电极层接触的区域具有比半导体的沟道形成区域更高的导电性 层。

公开(公告)号：US08344374B2

公开(公告)日：2013-01-01

申请号：US12898366

申请日：2010-10-05

申请人： Shunpei Yamazaki ,  Jun Koyama ,  Masahiro Takahashi ,  Hideyuki Kishida ,  Akiharu Miyanaga ,  Yasuo Nakamura ,  Junpei Sugao ,  Hideki Uochi

发明人： Shunpei Yamazaki ,  Jun Koyama ,  Masahiro Takahashi ,  Hideyuki Kishida ,  Akiharu Miyanaga ,  Yasuo Nakamura ,  Junpei Sugao ,  Hideki Uochi

IPC分类号： H01L29/10

CPC分类号： H01L29/78669 ,  H01L27/1214 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1255 ,  H01L27/1288 ,  H01L29/45 ,  H01L29/4908 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/78678 ,  H01L29/7869

摘要： It is an object to provide a semiconductor device typified by a display device having a favorable display quality, in which parasitic resistance generated in a connection portion between a semiconductor layer and an electrode is suppressed and an adverse effect such as voltage drop, a defect in signal wiring to a pixel, a defect in grayscale, and the like due to wiring resistance are prevented. In order to achieve the above object, a semiconductor device according to the present invention may have a structure where a wiring with low resistance is connected to a thin film transistor in which a source electrode and a drain electrode that include metal with high oxygen affinity are connected to an oxide semiconductor layer with a suppressed impurity concentration. In addition, the thin film transistor including the oxide semiconductor may be surrounded by insulating films to be sealed.

摘要翻译： 本发明的目的是提供一种由具有良好的显示质量的显示装置代表的半导体器件，其中在半导体层和电极之间的连接部分中产生的寄生电阻被抑制，并且具有诸如电压降等的不利影响 防止由于布线电阻而导致像素的信号布线，灰度级的缺陷等。 为了实现上述目的，根据本发明的半导体器件可以具有这样的结构，其中具有低电阻的布线连接到薄膜晶体管，其中包括具有高氧亲和力的金属的源电极和漏电极是 连接到具有抑制的杂质浓度的氧化物半导体层。 另外，包含氧化物半导体的薄膜晶体管也可以被要被密封的绝缘膜包围。

公开(公告)号：US08309961B2

公开(公告)日：2012-11-13

申请号：US12897419

申请日：2010-10-04

申请人： Shunpei Yamazaki ,  Masayuki Sakakura ,  Ryosuke Watanabe ,  Junichiro Sakata ,  Kengo Akimoto ,  Akiharu Miyanaga ,  Takuya Hirohashi ,  Hideyuki Kishida

发明人： Shunpei Yamazaki ,  Masayuki Sakakura ,  Ryosuke Watanabe ,  Junichiro Sakata ,  Kengo Akimoto ,  Akiharu Miyanaga ,  Takuya Hirohashi ,  Hideyuki Kishida

IPC分类号： H01L29/04

CPC分类号： H01L29/7869 ,  H01L27/1225 ,  H01L29/045 ,  H01L29/45 ,  H01L29/78606 ,  H01L29/78696

摘要： In a channel protected thin film transistor in which a channel formation region is formed using an oxide semiconductor, an oxide semiconductor layer which is dehydrated or dehydrogenated by a heat treatment is used as an active layer, a crystal region including nanocrystals is included in a superficial portion in the channel formation region, and the rest portion is amorphous or is formed of a mixture of amorphousness/non-crystals and microcrystals, where an amorphous region is dotted with microcrystals. By using an oxide semiconductor layer having such a structure, a change to an n-type caused by entry of moisture or elimination of oxygen to or from the superficial portion and generation of a parasitic channel can be prevented and a contact resistance with a source and drain electrodes can be reduced.

摘要翻译： 在使用氧化物半导体形成沟道形成区域的沟道保护薄膜晶体管中，使用通过热处理脱水或脱氢的氧化物半导体层作为有源层，包括纳米晶体的晶体区域包含在表面 并且其余部分是无定形的或由非晶/非晶体和微晶体的混合物形成，其中非晶区域用微晶点缀。 通过使用具有这种结构的氧化物半导体层，可以防止由于进入水分或从表面部分去除氧气或从表面部分排出而引起的n型变化和产生寄生通道，并且与源极接触电阻 可以减少漏电极。