Method for forming side contact in semiconductor device through self-aligned damascene process
    21.
    发明授权
    Method for forming side contact in semiconductor device through self-aligned damascene process 有权
    通过自对准镶嵌工艺在半导体器件中形成侧面接触的方法

    公开(公告)号:US08354345B2

    公开(公告)日:2013-01-15

    申请号:US12777572

    申请日:2010-05-11

    申请人: Sang-Oh Lee

    发明人: Sang-Oh Lee

    IPC分类号: H01L21/311

    摘要: A method for fabricating a semiconductor device includes forming a plurality of active regions, each having a first sidewall and a second sidewall, by etching a semiconductor substrate, forming an insulation layer on the first sidewall and the second sidewall, forming an etch stop layer filling a portion of each gap between the active regions, forming a recess exposing the insulation layer formed on any one sidewall from among the first sidewall and the second sidewall, and forming a side contact exposing a portion of any one sidewall from among the first sidewall and the second sidewall by selectively removing a portion of the insulation layer.

    摘要翻译: 一种制造半导体器件的方法包括通过蚀刻半导体衬底形成多个有源区,每个有源区具有第一侧壁和第二侧壁,在第一侧壁和第二侧壁上形成绝缘层,形成刻蚀停止层填充 在所述有源区之间的每个间隙的一部分,形成露出在所述第一侧壁和所述第二侧壁中的任何一个侧壁上形成的所述绝缘层的凹部,以及形成侧接触,暴露所述第一侧壁中的任何一个侧壁的一部分, 所述第二侧壁通过选择性地去除绝缘层的一部分。

    METHOD FOR FABRICATING SEMICONDUCTOR DEVICE
    23.
    发明申请
    METHOD FOR FABRICATING SEMICONDUCTOR DEVICE 失效
    制造半导体器件的方法

    公开(公告)号:US20110294275A1

    公开(公告)日:2011-12-01

    申请号:US12832187

    申请日:2010-07-08

    申请人: Sang-Oh Lee

    发明人: Sang-Oh Lee

    IPC分类号: H01L21/02 H01L21/768

    摘要: A method for fabricating a semiconductor device includes forming an isolation layer over a substrate, forming a plurality of open regions exposing the substrate by selectively etching the isolation layer, performing a surface treatment over the isolation layer, expanding the open regions by removing the surface-treated portion of the isolation layer, and forming a conductive layer in the expanded open regions.

    摘要翻译: 一种用于制造半导体器件的方法,包括在衬底上形成隔离层,通过选择性地蚀刻隔离层形成多个露出衬底的开放区域,在隔离层上进行表面处理,通过去除表面 - 并且在扩展的开放区域中形成导电层。

    Method for forming contact holes in semiconductor device
    24.
    发明授权
    Method for forming contact holes in semiconductor device 有权
    在半导体器件中形成接触孔的方法

    公开(公告)号:US08012881B1

    公开(公告)日:2011-09-06

    申请号:US12854381

    申请日:2010-08-11

    IPC分类号: H01L21/302

    CPC分类号: H01L21/3086 H01L21/32139

    摘要: A method for forming contact holes in a semiconductor device includes forming a hard mask layer over an etch target layer, forming a first line pattern in the hard mask layer by etching a portion of the hard mask layer through a primary etch process, forming a second line pattern crossing the first line pattern by etching the hard mask layer including the first line pattern through a secondary etch process, and etching the etch target layer by using the hard mask layer including the first line pattern and the second line pattern as an etch barrier.

    摘要翻译: 一种用于在半导体器件中形成接触孔的方法包括在蚀刻目标层上形成硬掩模层,通过初步蚀刻工艺蚀刻硬掩模层的一部分,在硬掩模层中形成第一线图案,形成第二线 通过二次蚀刻工艺蚀刻包括第一线图案的硬掩模层,并且通过使用包括第一线图案和第二线图案的硬掩模层作为蚀刻阻挡层蚀刻蚀刻目标层,从而跨越第一线图案的线图案 。

    AUXILIARY VARACTOR FOR TEMPERATURE COMPENSATION
    25.
    发明申请
    AUXILIARY VARACTOR FOR TEMPERATURE COMPENSATION 有权
    用于温度补偿的辅助变量

    公开(公告)号:US20090261917A1

    公开(公告)日:2009-10-22

    申请号:US12107592

    申请日:2008-04-22

    IPC分类号: H03L1/02

    CPC分类号: H03L1/023 H03L1/025

    摘要: Techniques for compensating for the effects of temperature change on voltage controlled oscillator (VCO) frequency are disclosed. In an embodiment, an auxiliary varactor is coupled to an LC tank of the VCO. The auxiliary varactor has a capacitance controlled by a temperature-dependant control voltage to minimize the overall change in VCO frequency with temperature. Techniques for generating the control voltage using digital and analog means are further disclosed.

    摘要翻译: 公开了用于补偿温度变化对压控振荡器(VCO)频率的影响的技术。 在一个实施例中,辅助变容二极管耦合到VCO的LC箱。 辅助变容二极管具有由温度依赖控制电压控制的电容,以最小化VCO频率随温度的总体变化。 进一步公开了使用数字和模拟装置产生控制电压的技术。

    FAST-SWITCHING LOW-NOISE CHARGE PUMP
    26.
    发明申请
    FAST-SWITCHING LOW-NOISE CHARGE PUMP 有权
    快速切换低噪声充电泵

    公开(公告)号:US20090121759A1

    公开(公告)日:2009-05-14

    申请号:US11953575

    申请日:2007-12-10

    IPC分类号: G05F1/10 H03L7/06

    CPC分类号: H03L7/0896 H03L7/18

    摘要: In one embodiment of the invention, a method for a charge pump is disclosed. The method includes biasing a plurality of transistors; switching a pair of main transistor switches to apply or remove a net charge on an output terminal though the biased transistors; and turning on auxiliary transistor switches when the main transistor switches are turned off. The auxiliary transistor switches when turned on provide an auxiliary equalizing path to nodes between the main transistor switches and the biased transistors. The auxiliary equalizing path equalizes voltages between the intermediate nodes to rapidly turn off the biased transistors and reduce noise on the output terminal of the charge pump.

    摘要翻译: 在本发明的一个实施例中,公开了一种用于电荷泵的方法。 该方法包括偏置多个晶体管; 切换一对主晶体管开关以通过偏置晶体管施加或去除输出端子上的净电荷; 并且当主晶体管开关断开时,接通辅助晶体管开关。 辅助晶体管开关导通时,为主晶体管开关和偏置晶体管之间的节点提供辅助均衡通路。 辅助均衡路径均衡中间节点之间的电压,以快速关闭偏置晶体管,并降低电荷泵输出端子上的噪声。

    Method for fabricating side contact in semiconductor device using double trench process
    27.
    发明授权
    Method for fabricating side contact in semiconductor device using double trench process 有权
    使用双沟槽工艺在半导体器件中制造侧面接触的方法

    公开(公告)号:US08557662B2

    公开(公告)日:2013-10-15

    申请号:US12649988

    申请日:2009-12-30

    申请人: Sang-Oh Lee

    发明人: Sang-Oh Lee

    IPC分类号: H01L21/336 H01L21/28

    CPC分类号: H01L27/10885 H01L21/743

    摘要: A method for fabricating a semiconductor device is provided, the method includes forming a double trench including a first trench and a second trench formed below the first trench and having surfaces covered with insulation layers, and removing portions of the insulation layers to form a side contact exposing one sidewall of the second trench.

    摘要翻译: 提供了一种制造半导体器件的方法,该方法包括形成双沟槽,该双沟槽包括形成在第一沟槽下方的第一沟槽和第二沟槽,并且具有被绝缘层覆盖的表面,以及去除绝缘层的部分以形成侧面接触 暴露第二沟槽的一个侧壁。

    FAST-SWITCHING LOW-NOISE CHARGE PUMP
    28.
    发明申请
    FAST-SWITCHING LOW-NOISE CHARGE PUMP 有权
    快速切换低噪声充电泵

    公开(公告)号:US20110291716A1

    公开(公告)日:2011-12-01

    申请号:US13208456

    申请日:2011-08-12

    IPC分类号: H03L7/08

    CPC分类号: H03L7/0896 H03L7/18

    摘要: In one embodiment of the invention, a method for a charge pump is disclosed. The method includes biasing a plurality of transistors; switching a pair of main transistor switches to apply or remove a net charge on an output terminal though the biased transistors; and turning on auxiliary transistor switches when the main transistor switches are turned off. The auxiliary transistor switches when turned on provide an auxiliary equalizing path to nodes between the main transistor switches and the biased transistors. The auxiliary equalizing path equalizes voltages between the intermediate nodes to rapidly turn off the biased transistors and reduce noise on the output terminal of the charge pump.

    摘要翻译: 在本发明的一个实施例中,公开了一种用于电荷泵的方法。 该方法包括偏置多个晶体管; 切换一对主晶体管开关以通过偏置晶体管施加或去除输出端子上的净电荷; 并且当主晶体管开关断开时,接通辅助晶体管开关。 辅助晶体管开关导通时,为主晶体管开关和偏置晶体管之间的节点提供辅助均衡通路。 辅助均衡路径均衡中间节点之间的电压,以快速关闭偏置晶体管,并降低电荷泵输出端子上的噪声。

    METHOD FOR FABRICATING SEMICONDUCTOR DEVICE
    29.
    发明申请
    METHOD FOR FABRICATING SEMICONDUCTOR DEVICE 失效
    制造半导体器件的方法

    公开(公告)号:US20110104894A1

    公开(公告)日:2011-05-05

    申请号:US12647016

    申请日:2009-12-24

    申请人: Uk KIM Sang-Oh Lee

    发明人: Uk KIM Sang-Oh Lee

    IPC分类号: H01L21/3205

    摘要: A method for fabricating a semiconductor device includes etching a semiconductor substrate using a hard mask layer as a barrier to form a trench defining a plurality of active regions, forming a gap-fill layer to gap-fill a portion of the inside of the trench so that the hard mask layer becomes a protrusion, forming spacers covering both sides of the protrusion, removing one of the spacers using a doped etch barrier as an etch barrier, and etching the gap-fill layer using a remaining spacer as an etch barrier to form a side trench exposing one side of the active region.

    摘要翻译: 一种用于制造半导体器件的方法包括使用硬掩模层作为屏障蚀刻半导体衬底以形成限定多个有源区的沟槽,形成间隙填充层以间隙填充沟槽内部的一部分,从而 硬掩模层变成突起,形成覆盖突起的两侧的间隔物,使用掺杂的蚀刻阻挡层去除一个间隔物作为蚀刻阻挡层,并且使用剩余的间隔物作为蚀刻阻挡层来蚀刻间隙填充层以形成 侧面沟槽暴露有源区域的一侧。

    Methods and apparatuses for selectable voltage supply
    30.
    发明授权
    Methods and apparatuses for selectable voltage supply 有权
    用于可选电压供应的方法和装置

    公开(公告)号:US07851947B2

    公开(公告)日:2010-12-14

    申请号:US11935186

    申请日:2007-11-05

    IPC分类号: H02B1/24

    摘要: A circuit which selects a supply voltage from a plurality of voltage supplies is presented. The circuit includes a first transistor configured to select a first voltage supply, a second transistor configured to select a second voltage supply, a first parasitic current inhibitor coupled the first transistor, the first voltage supply, and the second voltage supply, where the first parasitic current inhibitor automatically utilizes the voltage supply providing the highest voltage for preventing a substrate current from flowing through a bulk node of the first transistor, and a second parasitic current inhibitor coupled the second transistor, the first voltage supply, and the second voltage supply, where the second parasitic current inhibitor automatically utilizes the voltage supply providing the highest voltage for preventing a substrate current from flowing through a bulk node of the second transistor.

    摘要翻译: 提出了从多个电压源中选择电源电压的电路。 该电路包括:第一晶体管,被配置为选择第一电压源;第二晶体管,被配置为选择第二电压源;耦合第一晶体管,第一电压源和第二电压源的第一寄生电流抑制器,其中第一寄生 电流抑制器自动地利用提供最高电压的电压源来防止衬底电流流过第一晶体管的体节点,以及耦合第二晶体管,第一电压源和第二电压源的第二寄生电流抑制器,其中 第二寄生电流抑制器自动利用提供最高电压的电压源来防止衬底电流流过第二晶体管的体节点。