公开(公告)号：US20230245892A1

公开(公告)日：2023-08-03

申请号：US18161313

申请日：2023-01-30

申请人： Semiconductor Manufacturing International (Shanghai) Corporation

发明人： Shiliang JI ,  Cheng TAN

IPC分类号： H01L21/28 ,  H01L29/06 ,  H01L29/423 ,  H01L29/775 ,  H01L29/66

CPC分类号： H01L21/28123 ,  H01L29/0673 ,  H01L29/42392 ,  H01L29/775 ,  H01L29/66439 ,  H01L29/66545

摘要： A semiconductor structure includes a substrate, a plurality of gates, a cut isolation structure, and an interlayer dielectric layer. The plurality of gates are formed on the substrate. The plurality of gates extend along a first direction. The cut isolation structure is formed on the substrate. The cut isolation structure passes through the gates in a second direction. A size of the cut isolation structure in the first direction is equal to a predetermined size. The second direction is different from the first direction. The interlayer dielectric layer is formed on the substrate. The interlayer dielectric layer surrounds the gates and the cut isolation structure.

公开(公告)号：US11682725B2

公开(公告)日：2023-06-20

申请号：US17450200

申请日：2021-10-07

申请人： Semiconductor Manufacturing International (Shanghai) Corporation ,  Semiconductor Manufacturing International (Beijing) Corporation

发明人： Fei Zhou

IPC分类号： H01L29/78 ,  H01L29/06 ,  H01L29/66 ,  H01L21/266 ,  H01L21/3213 ,  H01L21/02

CPC分类号： H01L29/7816 ,  H01L21/02573 ,  H01L21/266 ,  H01L21/32136 ,  H01L21/32139 ,  H01L29/0653 ,  H01L29/66545 ,  H01L29/66689 ,  H01L29/66696 ,  H01L29/66795 ,  H01L29/7851

摘要： A semiconductor device is provided. The semiconductor device includes a base substrate; a first well region and a second well region in the base substrate; a gate electrode structure, sidewall spacers, a doped source layer and a doped drain layer over the base substrate; a dielectric layer on the base substrate; and an isolation layer in the dielectric layer. The dielectric layer covers sidewalls of the sidewall spacers, the doped source layer and the doped drain layer, and exposes a top surface of the gate electrode structure. The isolation layer is in the gate electrode structure of the second well region and the base substrate of the second well region, and adjacent to the sidewalls of the sidewall spacer over the second well region.

公开(公告)号：US20230185182A1

公开(公告)日：2023-06-15

申请号：US17986104

申请日：2022-11-14

申请人： Semiconductor Manufacturing International (Beijing) Corporation

发明人： Ge ZHANG ,  Zhongwen YAN

IPC分类号： G03F1/38 ,  G03F1/70 ,  G06F30/398

CPC分类号： G03F1/38 ,  G03F1/70 ,  G06F30/398

摘要： The present disclosure relates to an optical proximity correction method and system. The correction method may include providing main patterns and setting a forbidden edge rule according to a spacing between adjacent main patterns. The method may further include adding an auxiliary pattern to a side portion of the main patterns. A quantity of auxiliary patterns added to side portions of the main patterns is obtained based on the forbidden edge rule. The forbidden edge rule defines whether an edge of the main patterns is a forbidden edge, and an auxiliary pattern is not added to a side portion of the forbidden edge.

公开(公告)号：US11676865B2

公开(公告)日：2023-06-13

申请号：US17243776

申请日：2021-04-29

申请人： Semiconductor Manufacturing International (Shanghai) Corporation ,  Semiconductor Manufacturing International (Beijing) Corporation

发明人： Haiyang Zhang ,  Zhenyang Zhao ,  Enning Zhang

IPC分类号： H01L21/8234 ,  H01L27/088

CPC分类号： H01L21/823431 ,  H01L21/823481 ,  H01L27/0886

摘要： Semiconductor structures and fabrication methods thereof are provided. The method includes providing a substrate; forming a stacked material structure on the substrate; and forming trenches in the stacked material structure. Bottoms of the trenches are in the first material layer, the trenches are arranged along a first direction and form an initial stacked structure sequentially including an initial first layer, an initial second layer and an initial third layer. The method also includes etching the initial third layer to form transitional third layers arranged along a second direction perpendicular to the first direction; removing a portion of the initial first layer and a portion of the initial second layer of the initial stacked structure at two sides along the second direction to form a stacked structure including a first layer, a second layer and the transitional third layers; and forming a gate structure.

公开(公告)号：US11664227B2

公开(公告)日：2023-05-30

申请号：US17023940

申请日：2020-09-17

申请人： Semiconductor Manufacturing International (Shanghai) Corporation ,  Semiconductor Manufacturing International (Beijing) Corporation

发明人： Qian Jiang Zhang ,  Bo Su ,  Tao Dou ,  Lin Lin Sun

IPC分类号： H01L21/033

CPC分类号： H01L21/0338 ,  H01L21/0332 ,  H01L21/0335 ,  H01L21/0337

摘要： A semiconductor structure and a method for forming the semiconductor structure are provided. The method includes providing a to-be-etched layer; forming an initial mask layer over the to-be-etched layer; forming a patterned structure, on the initial mask layer and exposing a portion of the initial mask layer; forming a barrier layer on a sidewall surface of the patterned structure; using the patterned structure and the barrier layer as a mask, performing an ion doping process on the initial mask layer to form a doped region and an un-doped region between doped regions in the initial mask layer; removing the patterned structure and the barrier layer; and forming a mask layer on a top surface of the to-be-etched layer by removing the un-doped region. The mask layer includes a first opening exposing the top surface of the to-be-etched layer.

公开(公告)号：US11658239B2

公开(公告)日：2023-05-23

申请号：US16739431

申请日：2020-01-10

申请人： Semiconductor Manufacturing International (Shanghai) Corporation ,  Semiconductor Manufacturing International (Beijing) Corporation

发明人： Xuemei Wang ,  Fugang Chen ,  Yun Xue

IPC分类号： H01L29/78 ,  H01L21/8234 ,  H01L29/66 ,  H01L29/06

CPC分类号： H01L29/7816 ,  H01L21/823481 ,  H01L29/0653 ,  H01L29/66681

摘要： The present disclosure provides a semiconductor device and a fabrication method. The semiconductor device includes: a substrate; a first well region in the substrate, having first ions; an isolation layer in the first well region; a second well region and a third well region, formed in the first well region, located respectively on opposite sides of the isolation layer, having second ions with an opposite conductivity type as the first ions, and with a minimum distance from the isolation layer greater than zero; a first gate structure on the second well region and the first well region; a second gate structure on the third well region and the first well region; a barrier gate on the isolation layer, located between the first gate structure and the second gate structure, and having the second ions; and source-drain doped layers in the second well region and the third well region, respectively.

公开(公告)号：US20230154848A1

公开(公告)日：2023-05-18

申请号：US18093497

申请日：2023-01-05

申请人： Semiconductor Manufacturing International (Shanghai) Corporation ,  Semiconductor Manufacturing International (Beijing) Corporation

发明人： Haiyang ZHANG ,  Panpan LIU

IPC分类号： H01L23/528 ,  H01L23/532

CPC分类号： H01L23/5286 ,  H01L23/53257 ,  H01L23/53228 ,  H01L23/53276

摘要： A semiconductor structure is provided in the present disclosure. The semiconductor structure includes a substrate, a plurality of fins on the substrate, a plurality of isolation structures on the substrate, each formed on a top surface of the substrate between adjacent fins, and a power rail formed in at least one isolation structure of the plurality of isolation structures and further in the substrate, where a top surface of the power rail is lower than a top surface of the plurality of fins.

公开(公告)号：US20230139773A1

公开(公告)日：2023-05-04

申请号：US17974240

申请日：2022-10-26

申请人： Semiconductor Manufacturing International (Beijing) Corporation ,  Semiconductor Manufacturing International (Shanghai) Corporation

发明人： Xinxing BAI ,  Yaping WANG ,  Chunchao FEI

IPC分类号： H01L23/544 ,  H01L21/66 ,  H01L23/31 ,  H01L23/10 ,  H01L21/56 ,  H01L21/822

摘要： A semiconductor structure and a fabrication method of the semiconductor structure are provided. The semiconductor structure includes a substrate, and the substrate includes a scribe line region. The semiconductor structure also includes a device layer over the substrate. The device layer includes multiple devices, an interconnection structure electrically connected to the devices, and a dielectric layer surrounding the devices and the interconnection structure. Further, the device layer includes a passivation layer over the device layer, and an alignment mark in the passivation layer over the scribe line region. The alignment mark includes two or more sub-alignment marks, the two or more sub-alignment marks are arranged along an extension direction of the scribe line region, and adjacent sub-alignment marks of the two or more sub-alignment marks are spaced apart from each other.

公开(公告)号：US11621166B2

公开(公告)日：2023-04-04

申请号：US16878984

申请日：2020-05-20

申请人： Semiconductor Manufacturing International (Shanghai) Corporation ,  Semiconductor Manufacturing International (Beijing) Corporation

发明人： Nan Wang

IPC分类号： H01L21/033 ,  H01L21/8238

摘要： A semiconductor device and a method for forming the semiconductor device are provided. The method includes providing a substrate, and forming a first core layer on the substrate. The substrate includes a pull-up transistor region. The method also includes forming separately arranged second core layers on the first core layer, and forming a first sacrificial sidewall spacer on a sidewall of a second core layer. A gap is formed between adjacent first sacrificial sidewall spacers over the pull-up transistor region. In addition, the method includes removing the second core layers, and then etching the first core layer using the first sacrificial sidewall spacers as a mask until the substrate is exposed. The gap is transferred to a region between adjacent etched first core layers over the pull-up transistor region. Further, after etching the first core layer, the method includes forming a dielectric layer to fully fill the gap.

公开(公告)号：US11616064B2

公开(公告)日：2023-03-28

申请号：US17019956

申请日：2020-09-14

申请人： Semiconductor Manufacturing International (Shanghai) Corporation ,  SMIC New Technology Research and Development (Shanghai) Corporation

发明人： Yong Li

IPC分类号： H01L27/092 ,  H01L29/417 ,  H01L29/78 ,  H01L29/66 ,  H01L21/8238 ,  H01L21/8234 ,  H01L21/84

摘要： A semiconductor structure is provided. The semiconductor structure includes a base substrate including a semiconductor substrate having a PMOS region and an NMOS region and a plurality of fins on the semiconductor substrate, a gate layer across the plurality of fins by covering portions of top and sidewall surfaces of the fins, a P-type doped epitaxial layer formed in the fins at both sides of the gate layer in the PMOS region, an N-type doped epitaxial layer formed in the fins at both sides of the gate layer in the NMOS region, and an N-region mask layer formed on sidewall surfaces of the N-type doped epitaxial layer and covering the P-type doped epitaxial layer. A portion of the N-type doped epitaxial layer exposed by the N-region mask layer is processed by an N-type dopant segregated Schottky doping process.