中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

158 records (took 0.013 seconds)

    Method and apparatus for detecting an unused state in a semiconductor circuit
    21.
    发明申请
    Method and apparatus for detecting an unused state in a semiconductor circuit 有权
    用于检测半导体电路中的未使用状态的方法和装置

    公开(公告)号：US20040138841A1

    公开(公告)日：2004-07-15

    申请号：US10339218

    申请日：2003-01-09

    Inventor： Shane Hollmer

    IPC: G06F019/00

    CPC classification number: G06F11/2247 ,  G01R31/31719 ,  G11C7/20 ,  G11C29/12 ,  G11C2029/0407 ,  G11C2029/4402

    Abstract: An unused state detection circuit is disclosed that detects an unused state in a semiconductor circuit. A semiconductor circuit is nullunusednull when the unused state detection circuit has not been permanently cleared. When a semiconductor circuit is first powered up, the unused state detection circuit will detect that the semiconductor circuit has not previously been nullusednull and can automatically activate a boot up procedure or a testing procedure (or both). After the semiconductor circuit is used, the unused state detection circuit provides an indication that the semiconductor circuit is no longer unused. The unused state detection circuit uses the state of a dedicated non-volatile memory array or a dedicated region of the general non-volatile memory portion of the semiconductor circuit to detect whether the semiconductor circuit has been previously unused.

    Abstract translation: 公开了一种未使用的状态检测电路，其检测半导体电路中的未使用状态。 当未使用状态检测电路未被永久清除时，半导体电路为“未使用”。 当半导体电路第一次通电时，未使用的状态检测电路将检测到半导体电路以前没有被“使用”，并且可以自动激活引导过程或测试程序（或两者）。 在使用半导体电路之后，未使用的状态检测电路提供半导体电路不再未使用的指示。 未使用状态检测电路使用半导体电路的一般非易失性存储器部分的专用非易失性存储器阵列或专用区域的状态来检测半导体电路是否以前未被使用。

    System and method for processing circuit card connector and redundancy events
    22.
    发明授权
    System and method for processing circuit card connector and redundancy events 有权
    处理电路卡连接器和冗余事件的系统和方法

    公开(公告)号：US06625680B1

    公开(公告)日：2003-09-23

    申请号：US09375699

    申请日：1999-08-16

    Applicant: Eric N. Fronberg

    Inventor： Eric N. Fronberg

    IPC: G06F1546

    CPC classification number: G06F11/2247 ,  G06F11/20

    Abstract: A system for processing circuit card events includes a circuit board having a first connector and a second connector. The circuit board generates connector information indicating whether a first circuit card is coupled to the first connector and whether a second circuit card is coupled to the second connector. A memory stores a plurality of software modules and a first state of the circuit board. A processor coupled to the circuit board and the memory determines a second state of the circuit board based upon the connector information. The processor further selects at least one software module for execution based upon the first state and the second state of the circuit board.

    Abstract translation: 一种用于处理电路卡事件的系统包括具有第一连接器和第二连接器的电路板。 电路板产生指示第一电路卡是否耦合到第一连接器以及第二电路卡是否耦合到第二连接器的连接器信息。 存储器存储多个软件模块和电路板的第一状态。 耦合到电路板和存储器的处理器基于连接器信息确定电路板的第二状态。 处理器还基于电路板的第一状态和第二状态来选择至少一个软件模块进行执行。

    Data processing system and method
    23.
    发明申请
    Data processing system and method 有权
    数据处理系统及方法

    公开(公告)号：US20030028655A1

    公开(公告)日：2003-02-06

    申请号：US10165864

    申请日：2002-06-07

    Inventor： Eric Owhadi

    IPC: G06F015/16

    CPC classification number: G06F11/2294 ,  G06F11/0709 ,  G06F11/0748 ,  G06F11/2247

    Abstract: The present invention relates to a data processing system and method for providing support and maintenance services to a computer with at least reduced and preferably minimal user interaction. Data, that ordinarily would be inaccessible to a non-trusted applet, is, prior to any use of that data by such a non-trusted applet collated with the permission of the user of the computer by a trusted applet. The trusted applet has a greater range of access to system configuration as compared to the non-trusted applet. However, invoking a trusted applet requires user interaction; namely, the user must grant permission for the trusted applet to access the system configuration information and platform identification data. The necessary system configuration information that is required for the provision of support and maintenance services is harvested by the trusted applet and stored within a cookie. Therefore, the non-trusted applet can be downloaded and can access the relevant information without having involve the user.

    Abstract translation: 数据处理系统和方法技术领域本发明涉及一种数据处理系统和方法，用于至少减少并且优选地最小的用户交互来向计算机提供支持和维护服 在不可信的小应用程序通常是无法访问的数据之前，在通过可信小部件与计算机的用户的许可对齐的这种不可信的小程序来使用该数据之前。 与不可信的小程序相比，受信任的小应用程序具有对系统配置的更大的访问范围。 但是，调用受信任的小程序需要用户交互; 即用户必须授予可信小程序的权限才能访问系统配置信息和平台识别数据。 提供支持和维护服务所需的必要系统配置信息由受信任的小应用程序收集并存储在cookie中。 因此，可以下载不可信小程序，并且可以访问相关信息而不涉及用户。

    Memory capacity test method and computer system
    24.
    发明授权
    Memory capacity test method and computer system 失效
    内存容量测试方法和计算机系统

    公开(公告)号：US5854795A

    公开(公告)日：1998-12-29

    申请号：US801919

    申请日：1997-02-14

    Applicant: Yuichi Osano

    Inventor： Yuichi Osano

    IPC: G06F12/16 ,  G06F11/22 ,  G06F12/06 ,  G11C29/08 ,  G11C29/00

    CPC classification number: G06F11/2247 ,  G11C29/08

    Abstract: A memory capacity test method capable of confirming the memory capacity of an actually mounted memory in a short time in a memory system which mounts a memory only on a portion of a memory space. The method writes first data to a check address which is an n-th power of two, and then second data to the address 0, where the second data differs from the first data, and decides that the memory is not mounted on the check address if the data read from the check address disagrees with the first data. This is based on the fact that the check address actually points the address 0 when the memory is not mounted on the check address of the nth power of two, and hence the second data is written over the first data on the address 0 in that case.

    Abstract translation: 一种存储器容量测试方法，其能够在仅将存储器仅在存储器空间的一部分上安装存储器的存储器系统中在短时间内确认实际安装的存储器的存储器容量。 该方法将第一数据写入检查地址，该检查地址是二次的第二次，然后将第二数据写入地址0，其中第二数据与第一数据不同，并且确定存储器未被安装在检查地址 如果从检查地址读取的数据不符合第一个数据。 这是基于以下事实：当存储器未被安装在二次的第n个功率的检查地址上时，检查地址实际上指向地址0，因此在这种情况下第二数据被写入地址0上的第一数据 。

    Supplemental communication between host processor and mass storage controller using modified diagnostic commands
    25.
    发明授权
    Supplemental communication between host processor and mass storage controller using modified diagnostic commands 失效
    使用修改的诊断命令补充主机处理器和大容量存储控制器之间的通信

    公开(公告)号：US5809332A

    公开(公告)日：1998-09-15

    申请号：US657341

    申请日：1996-06-03

    Applicant: Natan Vishlitzky ,  Erez Ofer

    Inventor： Natan Vishlitzky ,  Erez Ofer

    IPC: G06F13/10 ,  G06F3/06 ,  G06F11/22 ,  G06F13/00 ,  G06F13/12

    CPC classification number: G06F13/126 ,  G06F11/2247

    Abstract: A mass storage system has a host computer connecting over a standard bus to a storage controller. The storage controller connects also to an array of disk drives. The host computer and the storage controller modify standard bus diagnostic commands for transmitting selected, non-diagnostic commands, and responses to each other. In this manner, a standard bus protocol is expanded to enable a host computer and storage controller to communicate, for example, configuration data, status, and some command information, particularly enabling the user at the host computer to control operational aspects of the storage controller.

    Abstract translation: 大容量存储系统具有通过标准总线连接到存储控制器的主计算机。 存储控制器还连接到一组磁盘驱动器。 主计算机和存储控制器修改标准总线诊断命令，用于发送所选择的非诊断命令和彼此的响应。 以这种方式，扩展标准总线协议以使得主机计算机和存储控制器能够通信例如配置数据，状态和某些命令信息，特别是使得主计算机上的用户能够控制存储控制器的操作方面 。

    Cable connect error detection system
    27.
    发明授权
    Cable connect error detection system 失效
    电缆连接错误检测系统

    公开(公告)号：US5678005A

    公开(公告)日：1997-10-14

    申请号：US391320

    申请日：1995-02-21

    Applicant: Mark A. Taylor

    Inventor： Mark A. Taylor

    IPC: G06F3/00 ,  G01R31/04 ,  G06F11/20 ,  G06F11/22 ,  G06F13/00

    CPC classification number: G06F11/2007 ,  G01R31/041 ,  G06F11/2247 ,  G06F11/2005

    Abstract: A digital computer system that contains redundant communication paths between two or more computer components. Each computer component has an interface logic that communicates with other interface logic units to determine if the redundant communication paths are correctly coupled between the components.

    Abstract translation: 包含两个或多个计算机组件之间的冗余通信路径的数字计算机系统。 每个计算机组件具有与其他接口逻辑单元通信的接口逻辑，以确定冗余通信路径是否在组件之间正确耦合。

    START TEST METHOD, SYSTEM, AND RECORDING MEDIUM
    29.
    发明申请
    START TEST METHOD, SYSTEM, AND RECORDING MEDIUM 审中-公开

    公开(公告)号：US20180157566A1

    公开(公告)日：2018-06-07

    申请号：US15805186

    申请日：2017-11-07

    Applicant: FUJITSU LIMITED

    Inventor： Taku Komorida ,  Atsushi Takami ,  Masato Fukumori ,  Haruhiko Ueno ,  Tsuyoshi Hashimoto

    IPC: G06F11/263 ,  G06F11/22

    CPC classification number: G06F11/263 ,  G06F11/2247 ,  G06F11/2284

    Abstract: A start test method executed by a system including a calculation device and a management device that manages failure information on the calculation device, the start test method includes storing, by a first processor included in the management device, a failure rate that has been calculated for each of parts of the calculation device based on the failure information received from the calculation device as performance information, associating with time information and a part of the calculation device; obtaining a failure rate of each of the parts at a time of start of the calculation device based on the performance information and a time when the calculation device is to be started; notifying the calculation device of the obtained failure rate; and executing, by a second processor included in the calculation device, a start test of the calculation device in accordance with the notified failure rate.

Patent Agency Ranking