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    CURRENT SEPARATION FOR MEMORY SENSING
    21.
    发明申请
    CURRENT SEPARATION FOR MEMORY SENSING 审中-公开

    公开(公告)号：US20190189178A1

    公开(公告)日：2019-06-20

    申请号：US15846765

    申请日：2017-12-19

    Applicant: Micron Technology, Inc.

    Inventor： Daniele Vimercati

    IPC: G11C11/22 ,  G11C11/56 ,  G11C13/00

    CPC classification number: G11C11/2273 ,  G11C11/221 ,  G11C11/2275 ,  G11C11/2293 ,  G11C11/2297 ,  G11C11/5657 ,  G11C13/004

    Abstract: The present disclosure includes apparatuses, methods, and systems for current separation for memory sensing. An embodiment includes applying a sensing voltage to a memory cell having a ferroelectric material, and determining a data state of the memory cell by separating a first current output by the memory cell while the sensing voltage is being applied to the memory cell and a second current output by the memory cell while the sensing voltage is being applied to the memory cell, wherein the first current output by the memory cell corresponds to a first polarization state of the ferroelectric material of the memory cell and the second current output by the memory cell corresponds a second polarization state of the ferroelectric material of the memory cell.

    CHARGE SHARING BETWEEN MEMORY CELL PLATES
    22.
    发明申请
    CHARGE SHARING BETWEEN MEMORY CELL PLATES 审中-公开

    公开(公告)号：US20190108866A1

    公开(公告)日：2019-04-11

    申请号：US16188855

    申请日：2018-11-13

    Applicant: Micron Technology, Inc.

    Inventor： Eric S. Carman

    IPC: G11C11/22 ,  G11C13/04 ,  G11C8/08 ,  G11C11/56

    CPC classification number: G11C11/225 ,  G11C8/08 ,  G11C11/22 ,  G11C11/221 ,  G11C11/2253 ,  G11C11/2273 ,  G11C11/2275 ,  G11C11/2293 ,  G11C11/5657 ,  G11C13/047

    Abstract: Methods, systems, techniques, and devices for operating a ferroelectric memory cell or cells are described. A first ferroelectric memory cell may be used to charge a second ferroelectric memory cell by transferring charge from a plate of first ferroelectric memory cell to a plate of the second ferroelectric memory cell. In some examples, prior to the transfer of charge, the first ferroelectric memory cell may be selected for a first operation in which the first ferroelectric memory cell transitions from a charged state to a discharged state and the second ferroelectric memory cell may be selected for a second operation during which the second ferroelectric memory cell transitions from a discharged state to a charged state. The discharging of the first ferroelectric memory cell may be used to assist in charging the second ferroelectric memory cell.

    MEMORY CELL SENSING WITH STORAGE COMPONENT ISOLATION
    25.
    发明申请
    MEMORY CELL SENSING WITH STORAGE COMPONENT ISOLATION 审中-公开

    公开(公告)号：US20180358078A1

    公开(公告)日：2018-12-13

    申请号：US16107925

    申请日：2018-08-21

    Applicant: Micron Technology, Inc.

    Inventor： Daniele Vimercati

    IPC: G11C11/22

    CPC classification number: G11C11/2273 ,  G11C11/22 ,  G11C11/221 ,  G11C11/2293

    Abstract: Methods, systems, and devices for operating a ferroelectric memory cell or cells are described. A ferroelectric memory cell may be selected using a selection component that is in electronic communication with a sense amplifier and a ferroelectric capacitor of a ferroelectric memory cell. A voltage applied to the ferroelectric capacitor may be sized to increase the signal sensed during a read operation. The ferroelectric capacitor may be isolated from the sense amplifier during the read operation. This isolation may avoid stressing the ferroelectric capacitor which may otherwise occur due to the applied read voltage and voltage introduce by the sense amplifier during the read operation.

    PARALLEL ACCESS TECHNIQUES WITHIN MEMORY SECTIONS THROUGH SECTION INDEPENDENCE
    27.
    发明申请
    PARALLEL ACCESS TECHNIQUES WITHIN MEMORY SECTIONS THROUGH SECTION INDEPENDENCE 审中-公开

    公开(公告)号：US20180137907A1

    公开(公告)日：2018-05-17

    申请号：US15855643

    申请日：2017-12-27

    Applicant: Micron Technology, Inc.

    Inventor： Richard E. Fackenthal

    IPC: G11C11/22

    CPC classification number: G11C11/2273 ,  G11C11/221 ,  G11C11/2257 ,  G11C11/2293

    Abstract: A memory device having a plurality sections of memory cells, such as ferroelectric memory cells (hybrid RAM (HRAM) cells) may provide for concurrent access to memory cells within independent sections of the memory device. A first memory cell may be activated, and it may be determined that a second memory cell is independent of the first memory cell. If the second memory cell is independent of the first memory cell, the second memory cell may be activated prior to the conclusion of operations at the first memory cell. Latching hardware at memory sections may latch addresses at the memory sections in order to allow a new address to be provided to a different section to access the second memory cell.

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