公开(公告)号：US20020055319A1

公开(公告)日：2002-05-09

申请号：US10012612

申请日：2001-12-12

Inventor： David S.Y. Hsu

IPC: H01J009/24

CPC classification number: B82Y10/00 ,  B82Y30/00 ,  H01J1/3046 ,  H01J3/022 ,  H01J9/025 ,  H01J2201/30469 ,  H01J2201/319

Abstract: A field emitter cell includes a thin-film-edge emitter normal to the gate layer. The field emitter cell may include a conductive substrate layer, an insulator layer having a perforation, a gate layer having a perforation, an emitter layer, and other optional layers. The perforation in the gate layer is larger and concentrically offset with respect to the perforation in the insulating layer and may be of a tapered construction. Alternatively, the perforation in the gate layer may be coincident with, or larger or smaller than, the perforation in the insulating layer, provided that the gate layer is shielded from the emitter from a direct line-of-sight by a nonconducting standoff layer. Optionally, the thin-film-edge emitter may include incorporated nanofilaments. The field emitter cell has low gate current, making it useful for various applications such as field emitter displays, high voltage power switching, microwave, RF amplification and other applications that require high emission currents.

公开(公告)号：US06380913B1

公开(公告)日：2002-04-30

申请号：US09189085

申请日：1998-11-09

Applicant: Glen E. Hush ,  Tyler A. Lowrey

Inventor： Glen E. Hush ,  Tyler A. Lowrey

IPC: G09G322

CPC classification number: G09G3/22 ,  G09G3/2011 ,  G09G3/2014 ,  G09G2300/08 ,  G09G2310/0248 ,  G09G2310/0259 ,  G09G2310/066 ,  G09G2320/0606 ,  G09G2320/0626 ,  G09G2320/066 ,  H01J31/127 ,  H01J2201/319 ,  H01J2329/00

Abstract: A flat panel display, such as a Field Emission Display (“FED”), is disclosed having a current control circuit. Input into the display, initially, is an analog signal having an amplitude. In one embodiment, the current control circuit includes a converter for converting the analog input signal to a sawtooth signal having a height and width. Then, the level of the sawtooth signal is compared to a voltage level to establish a pulse width of an emitter current. The emitter current is thus controlled by a pulse width modulation approach. In another embodiment, the current control circuit traps a column voltage on a parasitic capacitance. The trapped voltage then controls the gate of a transistor to control current flow from the emitter set to ground.

Abstract translation: 公开了一种具有电流控制电路的平板显示器，例如场发射显示器（“FED”）。 最初输入到显示器是具有振幅的模拟信号。 在一个实施例中，电流控制电路包括用于将模拟输入信号转换成具有高度和宽度的锯齿波信号的转换器。 然后，将锯齿波信号的电平与电压电平进行比较，以建立发射极电流的脉冲宽度。 因此，通过脉冲宽度调制方法来控制发射极电流。 在另一个实施例中，电流控制电路捕获寄生电容上的列电压。 捕获的电压然后控制晶体管的栅极以控制从发射极组到地的电流。

公开(公告)号：US20020033663A1

公开(公告)日：2002-03-21

申请号：US09965197

申请日：2001-09-26

Inventor： Xueping Xu ,  George R. Brandes ,  Christopher J. Spindt ,  Colin D. Stanners ,  John M. Macaulay

IPC: H01J001/62

CPC classification number: H01J1/3042 ,  H01J2201/30426 ,  H01J2201/319 ,  H01J2329/00

Abstract: A cathode structure suitable for a flat panel display is provided with coated emitters. The emitters are formed with material, typically nickel, capable of growing to a high aspect ratio. These emitters are then coated with carbon containing material for improving the chemical robustness and reducing the work function. One coating process is a DC plasma deposition process in which acetylene is pumped through a DC plasma reactor to create a DC plasma for coating the cathode structure. An alternative coating process is to electrically deposit raw carbon-based material onto the surface of the emitters, and subsequently reduce the raw carbon-based material to the carbon containing material. Work function of coated emitters is typically reduced by about 0.8 to 1.0 eV.

Abstract translation: 适用于平板显示器的阴极结构设置有涂覆的发射器。 发射体由能够生长到高纵横比的材料（通常为镍）形成。 然后，这些发射体涂覆有含碳材料，以改善化学稳定性并降低功函数。 一个涂覆工艺是DC等离子体沉积工艺，其中将乙炔泵送通过DC等离子体反应器以产生用于涂覆阴极结构的DC等离子体。 另一种涂覆方法是将原始碳基材料电沉积到发射体的表面上，随后将原始的碳基材料还原成含碳材料。 涂覆发射体的功函数通常降低约0.8至1.0eV。

公开(公告)号：US20010000163A1

公开(公告)日：2001-04-05

申请号：US09727023

申请日：2000-11-29

Inventor： Xueping Xu ,  George R. Brandes ,  Christopher J. Spindt ,  Colin D. Stanners ,  John M. Macaulay

IPC: H01J009/04 ,  H01J009/12

CPC classification number: H01J1/3042 ,  H01J2201/30426 ,  H01J2201/319 ,  H01J2329/00

Abstract: A cathode structure suitable for a flat panel display is provided with coated emitters. The emitters are formed with material, typically nickel, capable of growing to a high aspect ratio. These emitters are then coated with carbon containing material for improving the chemical robustness and reducing the work function. One coating process is a DC plasma deposition process in which acetylene is pumped through a DC plasma reactor to create a DC plasma for coating the cathode structure. An alternative coating process is to electrically deposit raw carbon-based material onto the surface of the emitters, and subsequently reduce the raw carbon-based material to the carbon containing material. Work function of coated emitters is typically reduced by about 0.8 to 1.0 eV.

Abstract translation: 适用于平板显示器的阴极结构设置有涂覆的发射器。 发射体由能够生长到高纵横比的材料（通常为镍）形成。 然后，这些发射体涂覆有含碳材料，以改善化学稳定性并降低功函数。 一个涂覆工艺是DC等离子体沉积工艺，其中将乙炔泵送通过DC等离子体反应器以产生用于涂覆阴极结构的DC等离子体。 另一种涂覆方法是将原始碳基材料电沉积到发射体的表面上，随后将原始的碳基材料还原成含碳材料。 涂覆发射体的功函数通常降低约0.8至1.0eV。

公开(公告)号：US06204596B1

公开(公告)日：2001-03-20

申请号：US09107392

申请日：1998-06-30

Applicant: John M. Macaulay ,  Peter C. Searson ,  Robert M. Duboc, Jr. ,  Christopher J. Spindt

Inventor： John M. Macaulay ,  Peter C. Searson ,  Robert M. Duboc, Jr. ,  Christopher J. Spindt

IPC: H01J102

CPC classification number: B82Y10/00 ,  H01J1/3042 ,  H01J3/022 ,  H01J9/025 ,  H01J2201/30403 ,  H01J2201/30457 ,  H01J2201/319 ,  Y10T428/2973 ,  Y10T428/298

Abstract: An electron-emitting device contains a lower conductive region (22), a porous insulating layer (24A, 24B, 24D, 24E, or 24F) overlying the lower conductive region, and a multiplicity of electron-emissive elements (30, 30A, or 30B) situated in pores (281) extending through the porous layer. The pores are situated at locations substantially random relative to one another. The lower conductive region typically contains a highly conductive portion (22A) and an overlying highly resistive portion (22B). Alternatively or additionally, a patterned gate layer (34B, 40B, or 46B) overlies the porous layer. Openings (36, 42, or 541) corresponding to the filaments extend through the gate layer at locations generally centered on the filaments such that the filaments are separated from the gate layer.

Abstract translation: 电子发射器件包含覆盖在下导电区域上的下导电区域（22），多孔绝缘层（24A，24B，24D，24E或24F）和多个电子发射元件（30,30A或 30B）位于延伸穿过多孔层的孔（281）中。 孔位于相对于彼此基本上随机的位置。 下导电区域通常包含高导电部分（22A）和覆盖的高电阻部分（22B）。 或者或另外，图案化的栅极层（34B，40B或46B）覆盖在多孔层上。 对应于长丝的开口（36,42或541）在通常以灯丝为中心的位置处延伸穿过栅极层，使得灯丝与栅极层分离。

公开(公告)号：US06186850B1

公开(公告)日：2001-02-13

申请号：US09461917

申请日：1999-12-15

Applicant: David A. Cathey, Jr. ,  John Lee

Inventor： David A. Cathey, Jr. ,  John Lee

IPC: H01J902

CPC classification number: H01J9/025 ,  H01J29/04 ,  H01J29/06 ,  H01J29/89 ,  H01J31/127 ,  H01J2201/319

Abstract: A method for fabricating a field emission display (FED) with improved junction leakage characteristics is provided. The method includes the formation of a light blocking element between a cathodoluminescent display screen of the FED and semiconductor junctions formed on a baseplate of the FED. The light blocking element protects the junctions from light formed at the display screen and light generated in the environment striking the junctions. Electrical characteristics of the junctions thus remain constant and junction leakage is improved. The light blocking element may be formed as an opaque light absorbing or light reflecting layer. In addition, the light blocking element may be patterned to protect predetermined areas of the baseplate and may provide other circuit functions such as an interconnect layer.

Abstract translation: 提供了一种制造具有改善的结漏电特性的场发射显示（FED）的方法。 该方法包括在FED的阴极发光显示屏和形成在FED的底板上的半导体结之间形成遮光元件。 光阻挡元件保护接点免受在显示屏上形成的光和在环境中产生的光的撞击。 因此，结的电气特性保持恒定，并且提高结漏电。 遮光元件可以形成为不透明的光吸收或光反射层。 此外，遮光元件可以被图案化以保护基板的预定区域并且可以提供诸如互连层的其它电路功能。

公开(公告)号：US6144145A

公开(公告)日：2000-11-07

申请号：US73340

申请日：1998-05-06

Applicant: Gary W. Jones ,  Steven M. Zimmerman

Inventor： Gary W. Jones ,  Steven M. Zimmerman

IPC: H01J1/304 ,  H01J1/30

CPC classification number: H01J1/3042 ,  H01J2201/30446 ,  H01J2201/319

Abstract: A high performance novel electron emitter material for use in field emission devices is disclosed. The high performance electron emitter material of the invention may comprise a high Cr and SiO mixture. This material may be formed into high aspect ratio, low work function tips which maintain their shape, thus minimizing flash over risks and electron scattering problems, while at the same time permitting a high level of fabrication process flexibility, and minimizing film stresses. One or more impurities which are conductive oxides or will form conductive oxides may be added to the Cr--SiO composition so that a net low work function emitter may be maintained under oxidation. A class of semi-conductive and conductive metal oxides comprises another embodiment of the invention. These materials include oxides of Cr, Mo, Ni, Fe, and Sc, which have current emitting properties desirable for applications where improved electron emission infirmity is desired among emitters within a pixel. Emission from these more resistive emitter tip materials may be optionally enhanced with the addition of low work function impurities such as alkali metals enabling more stable devices while still permitting low turn-on voltages. Methods of making the emitter are also disclosed.

Abstract translation: 公开了一种用于场致发射器件的高性能新型电子发射体材料。 本发明的高性能电子发射体材料可以包括高Cr和SiO混合物。 该材料可以形成为高纵横比，低功函数尖端，保持其形状，从而使风险和电子散射问题的闪现最小化，同时允许高水平的制造工艺灵活性，并最小化薄膜应力。 可以将一种或多种作为导电氧化物或将形成导电氧化物的杂质添加到Cr-SiO组合物中，使得可以在净氧化下保持净低功函数发射极。 一类半导体和导电金属氧化物包括本发明的另一个实施方案。 这些材料包括Cr，Mo，Ni，Fe和Sc的氧化物，其对于在像素内的发射体中期望改善的电子发射弱化的应用具有期望的电流发射特性。 可以通过添加低功函杂质例如碱金属来增加这些更电阻的发射极尖端材料的发射，从而使得能够实现更稳定的器件同时仍然允许低导通电压。 还公开了制造发射极的方法。

公开(公告)号：US6060841A

公开(公告)日：2000-05-09

申请号：US093089

申请日：1998-06-08

Applicant: Takahiro Niiyama ,  Shigeo Itoh

Inventor： Takahiro Niiyama ,  Shigeo Itoh

IPC: H01J1/304 ,  G09G3/10

CPC classification number: H01J1/3042 ,  H01J2201/319

Abstract: A field emission element that can prevent one cathode electrode line from being completely disabled due to a short circuit between an emitter electrode and a gate electrode. One cathode electrode line consists of a stripe cathode conductor and plural island electrodes arranged on the one side of the cathode conductor. The gate electrode is disposed on the insulating layer overlaying the upper surface of each island electrode. The first resistance layer and the second resistance layer each having a different resistance value are laminated in a current control resistance layer. When excessive current flows through the emitter cone, the laminated thick-film portion is destroyed so that only the island electrode connected to the emitter cone is electrically separated off from the cathode conductor. One second resistance layer is locally laminated on the first resistance layer and for each of plural island electrodes.

Abstract translation: 能够防止一根阴极电极线由于发射电极和栅电极之间的短路而被完全禁用的场发射元件。 一个阴极电极线由条形阴极导体和布置在阴极导体一侧的多个岛电极组成。 栅电极设置在覆盖每个岛电极的上表面的绝缘层上。 各自具有不同电阻值的第一电阻层和第二电阻层层叠在电流控制电阻层中。 当过大的电流流过发射极锥体时，层压的厚膜部分被破坏，使得只有连接到发射极锥形的岛电极与阴极导体电分离。 在第一电阻层和多个岛电极中的每一个上局部层叠一个第二电阻层。

公开(公告)号：US6040613A

公开(公告)日：2000-03-21

申请号：US588738

申请日：1996-01-19

Applicant: Everett A. McTeer ,  Russell C. Zahorik ,  Scott G. Meikle

Inventor： Everett A. McTeer ,  Russell C. Zahorik ,  Scott G. Meikle

IPC: H01J9/02 ,  G09F9/30 ,  H01J1/52 ,  H01J29/04 ,  H01J29/89 ,  H01J29/96 ,  H01J31/12 ,  H01L21/027 ,  H01L21/3205 ,  H01L21/3213 ,  H01L21/768 ,  H01L23/52 ,  H01L23/532 ,  H01L31/0216 ,  H01L31/0232

CPC classification number: H01L21/76849 ,  H01J1/52 ,  H01J29/896 ,  H01J31/127 ,  H01L21/0276 ,  H01L21/32139 ,  H01L21/7685 ,  H01L21/76858 ,  H01L21/76885 ,  H01L23/53223 ,  H01L31/02161 ,  H01J2201/30403 ,  H01J2201/319 ,  H01L2221/1078 ,  H01L2924/0002

Abstract: Titanium aluminum nitrogen ("Ti--Al--N") is deposited onto a semiconductor substrate area to serve as an antireflective coating. For wiring line fabrication processes, the Ti--Al--N layer serves as a cap layer which prevents unwanted reflection of photolithography light (i.e., photons) during fabrication. For field emission display devices (FEDs), the Ti--Al--N layer prevents light originating at the display screen anode from penetrating transistor junctions that would hinder device operation. For the wiring line embodiment an aluminum conductive layer and a titanium-aluminum underlayer are formed beneath the antireflective cap layer. The Ti--Al underlayer reduces the shrinkage which occurs in the aluminum conductive layer during heat treatment.

Abstract translation: 将钛铝氮（“Ti-Al-N”）沉积到半导体衬底区域上以用作抗反射涂层。 对于布线生产工艺，Ti-Al-N层用作遮盖层，防止在制造过程中光刻光（即光子）的不期望的反射。 对于场致发射显示装置（FED），Ti-Al-N层防止在显示屏阳极处产生的光穿透将阻碍器件工作的晶体管结。 对于布线实施例，在抗反射盖层下方形成铝导电层和钛 - 铝底层。 Ti-Al底层减少了在热处理期间在铝导电层中发生的收缩。

公开(公告)号：US6020683A

公开(公告)日：2000-02-01

申请号：US190737

申请日：1998-11-12

Applicant: David A. Cathey, Jr. ,  John Lee

Inventor： David A. Cathey, Jr. ,  John Lee

IPC: G09F9/30 ,  H01J9/02 ,  H01J29/04 ,  H01J29/06 ,  H01J29/89 ,  H01J31/12 ,  H01J1/30 ,  H01J19/24

CPC classification number: H01J9/025 ,  H01J29/04 ,  H01J29/06 ,  H01J29/89 ,  H01J31/127 ,  H01J2201/319

Abstract: A method for fabricating a field emission display (FED) with improved junction leakage characteristics is provided. The method includes the formation of a light blocking element between a cathodoluminescent display screen of the FED and semiconductor junctions formed on a baseplate of the FED. The light blocking element protects the junctions from light formed at the display screen and light generated in the environment striking the junctions. Electrical characteristics of the junctions thus remain constant and junction leakage is improved. The light blocking element may be formed as an opaque light absorbing or light reflecting layer. In addition, the light blocking element may be patterned to protect predetermined areas of the baseplate and may provide other circuit functions such as an interconnect layer.