公开(公告)号：US20100093548A1

公开(公告)日：2010-04-15

申请号：US12631777

申请日：2009-12-04

申请人： Akira KAWAKAMI

发明人： Akira KAWAKAMI

IPC分类号： H01L39/24

CPC分类号： H01L39/2416 ,  H01L39/16 ,  H03D7/005

摘要： A superconducting structure includes an NbN thin-film as a first superconducting thin-film layer on the upper surface of a substrate, an NbN thin-film as a second superconducting thin-film layer above the NbN thin-film, and a MgO thin-film as a protective thin-film provided between the NbN thin-film and the NbN thin-film.

摘要翻译： 超导结构包括在衬底的上表面上的作为第一超导薄膜层的NbN薄膜，NbN薄膜上的作为第二超导薄膜层的NbN薄膜，以及MgO薄膜， 膜作为在NbN薄膜和NbN薄膜之间提供的保护薄膜。

公开(公告)号：US07680474B2

公开(公告)日：2010-03-16

申请号：US11243019

申请日：2005-10-04

申请人： Alexander F. Kirichenko ,  Deepnarayan Gupta ,  Saad Sarwana

发明人： Alexander F. Kirichenko ,  Deepnarayan Gupta ,  Saad Sarwana

IPC分类号： H04B1/26 ,  H04B7/216 ,  H03M1/00 ,  H03M3/00 ,  H03M1/12 ,  H04L12/50 ,  H04Q11/00 ,  H04L27/06 ,  H03D1/00 ,  G06F7/52

CPC分类号： H03D7/005

摘要： Digital mixers which permit mixing of asynchronous signals are constructed of Rapid Single Flux Quantum (RSFQ) logic elements. The logic elements may include an RSFQ non-destructive readout cell (NDRO), an RSFQ D flip-flop, an RSFQ XOR circuit, and an RSFQ T flip-flop. A binary tree arrangement of T flip-flops can be used to provide in-phase and quadrature phase-divided replicas of a reference signal. The mixing elements can be either an XOR circuit, a dual port NDRO circuit functioning as a multiplexer or an RS type NDRO functioning as an AND gate. The RSFQ logic elements utilize Josephson junctions which operate in superconducting temperature domains.

摘要翻译： 允许混合异步信号的数字混频器由快速单通量量子（RSFQ）逻辑元件构成。 逻辑元件可以包括RSFQ非破坏性读出单元（NDRO），RSFQ D触发器，RSFQ XOR电路和RSFQ T触发器。 可以使用T触发器的二叉树布置来提供参考信号的同相和正交相位分割副本。 混合元件可以是XOR电路，用作多路复用器的双端口NDRO电路或用作AND门的RS型NDRO。 RSFQ逻辑元件利用在超导温度域中工作的约瑟夫逊结。

公开(公告)号：US20190104614A1

公开(公告)日：2019-04-04

申请号：US15720665

申请日：2017-09-29

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

发明人： Baleegh Abdo ,  Nicholas T. Bronn ,  Oblesh Jinka ,  Salvatore B. Olivadese

IPC分类号： H05K1/18 ,  H03F19/00 ,  H03D7/00 ,  H05K1/02 ,  H05K1/11 ,  H05K3/40 ,  H05K3/30

CPC分类号： H05K1/183 ,  G06N10/00 ,  H01L39/045 ,  H03D7/005 ,  H03F19/00 ,  H05K1/0216 ,  H05K1/0243 ,  H05K1/0298 ,  H05K1/115 ,  H05K1/185 ,  H05K3/0011 ,  H05K3/30 ,  H05K3/4038 ,  H05K3/4697 ,  H05K2201/10371 ,  H05K2201/1056

摘要： An aspect includes one or more board layers. A first chip cavity is formed within the one or more board layers, wherein a first Josephson amplifier or Josephson mixer is disposed within the first chip cavity. The first Josephson amplifier or Josephson mixer comprises at least one port, each port connected to at least one connector disposed on at least one of the one or more board layers, wherein at least one of the one or more board layers comprises a circuit trace formed on the at least one of the one or more board layers.

公开(公告)号：US20180301613A1

公开(公告)日：2018-10-18

申请号：US15813902

申请日：2017-11-15

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

发明人： Baleegh ABDO

IPC分类号： H01L39/02 ,  H01P5/12 ,  H01P1/38 ,  H01L39/24 ,  B82Y40/00

CPC分类号： H01L39/025 ,  B82Y40/00 ,  H01L39/2493 ,  H01P1/38 ,  H01P5/12 ,  H03D7/005

摘要： A technique relates to a superconducting device. A first mixing device has a first mixing port and a second mixing port. A second mixing device has another first mixing port and another second mixing port. The first and second mixing devices are superconducting nondegenerate three-wave mixing devices. The first mixing port and the another first mixing port are configured to couple to a first coupler. The second mixing port and the another second mixing port are configured to couple to a second coupler.

公开(公告)号：US20180138987A1

公开(公告)日：2018-05-17

申请号：US15567198

申请日：2016-04-15

申请人： Yale University

发明人： Katrina Sliwa ,  Michael Hatridge ,  Anirudh Narla ,  Shyam Shankar ,  Luigi Frunzio ,  Robert J. Schoelkopf, III ,  Michel Devoret

IPC分类号： H04B10/90 ,  H01L27/18 ,  H01L39/02 ,  H01L39/04 ,  H01L39/22 ,  H01P3/12 ,  H03F19/00 ,  G06N99/00

CPC分类号： H04B10/90 ,  G06N10/00 ,  H01L27/18 ,  H01L39/025 ,  H01L39/045 ,  H01L39/223 ,  H01P3/12 ,  H01P5/024 ,  H01P5/08 ,  H01P5/103 ,  H03D7/005 ,  H03D2009/0691 ,  H03F19/00 ,  H04B10/70

摘要： A wireless Josephson-junction-based parametric converter is described. The converter may be formed on a substrate with antennas that pump are configured to wirelessly receive pump, signal and idler frequencies and couple the received frequencies to the converter's circuitry. Capacitors may also be fabricated on the same substrate and sized to tune operation of the converter to desired frequencies. The converter may be coupled directly to microwave waveguides, and may be tuned to different signal frequencies by applying magnetic flux to the converter circuitry.

公开(公告)号：US20170039481A1

公开(公告)日：2017-02-09

申请号：US14754154

申请日：2015-06-29

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

发明人： Baleegh Abdo

IPC分类号： G06N99/00 ,  H03K17/92

CPC分类号： H01L39/025 ,  B82Y10/00 ,  G06N99/002 ,  H01L27/18 ,  H01L39/045 ,  H01L39/223 ,  H01L39/2493 ,  H01P5/19 ,  H03D7/005 ,  H03K17/92

摘要： A Josephson parametric converter is provided. The Josephson parametric converter includes a multi-Josephson junction ring modulator having a first, a second, a third, and a fourth node and a first, a second, a third, and a fourth array of N Josephson junctions arranged in a ring configuration with the nodes inter-dispersed between the arrays. The first array is between the first and second nodes, the second array is between the second and third nodes, the third array is between the third and fourth nodes, and the fourth array is between the fourth and first nodes. N is an integer having a value greater than one. The Josephson parametric converter further includes a first and a second resonator formed from lumped-element capacitors that shunt the multi-Josephson junction ring modulator and respectively enable a first and a second mode of the Josephson parametric converter.

摘要翻译： 提供约瑟夫森参数转换器。 约瑟夫森参数转换器包括具有第一，第二，第三和第四节点以及布置成环形结构的N个约瑟夫逊结的第一，第二，第三和第四阵列的多约瑟夫逊结环调制器， 节点间分散在阵列之间。 第一阵列位于第一和第二节点之间，第二阵列位于第二和第三节点之间，第三阵列位于第三和第四节点之间，第四阵列位于第四节点和第一节点之间。 N是大于1的整数。 约瑟夫森参数转换器还包括由集总元件电容器形成的第一和第二谐振器，其分流多约瑟夫逊结环形调制器并分别使能约瑟夫森参数转换器的第一和第二模式。

公开(公告)号：US07979101B2

公开(公告)日：2011-07-12

申请号：US11576745

申请日：2005-10-04

申请人： Toshiaki Matsui ,  Hiroshi Ohta ,  Akira Kawakami

发明人： Toshiaki Matsui ,  Hiroshi Ohta ,  Akira Kawakami

IPC分类号： H01L39/22 ,  G01R29/00

CPC分类号： H03D7/005 ,  G01R29/0878 ,  H01L27/18 ,  H01L39/223 ,  Y10S505/702

摘要： It is possible to improve the negative resistance characteristic that can be expected when an SNS (superconductor-normal conductor-superconductor) structure is used as a structure unit for series connection. On the top of a first superconducting electrode, a second superconducting electrode is superimposed so as to sandwich an insulation film between the first and second superconducting electrodes, with parts of cross sections of the second superconducting electrode and insulation film placed on the top. A normal superconducting line electrically connects the first and second superconducting electrodes passing along the cross section of the insulation film, thereby constituting a structure unit having a single weak link. A plurality of such structure units connected in series are prepared. At the both ends of the series the first or second superconducting electrode is an element connected to a leading line. The structure units are arranged so that the cross sections of the insulation films along which the normal conducting line passes are arranged in the sale direction.

摘要翻译： 当使用SNS（超导体 - 正常导体 - 超导体）结构作为用于串联连接的结构单元时，可以提高可以预期的负电阻特性。 在第一超导电极的顶部，叠加第二超导电极，以将绝缘膜夹在第一和第二超导电极之间，第二超导电极的横截面的一部分和绝缘膜位于顶部。 通常的超导线将通过绝缘膜的截面的第一和第二超导电极电连接，从而构成具有单个弱连接的结构单元。 准备串联连接的多个这种结构单元。 在串联的两端，第一或第二超导电极是连接到引线的元件。 结构单元布置成使得正常导电线穿过的绝缘膜的横截面布置在销售方向上。

公开(公告)号：US20080067500A1

公开(公告)日：2008-03-20

申请号：US11576745

申请日：2005-10-04

申请人： Toshiaki Matsui ,  Hiroshi Ohta ,  Akira Kawakami

发明人： Toshiaki Matsui ,  Hiroshi Ohta ,  Akira Kawakami

IPC分类号： H01L29/06

CPC分类号： H03D7/005 ,  G01R29/0878 ,  H01L27/18 ,  H01L39/223 ,  Y10S505/702

摘要： It is possible to improve the negative resistance characteristic that can be expected when an SNS (superconductor-normal conductor-superconductor) structure is used as a structure unit for series connection. On the top of a first superconducting electrode, a second superconducting electrode is superimposed so as to sandwich an insulation film between the first and second superconducting electrodes, with parts of cross sections of the second superconducting electrode and insulation film placed on the top. A normal superconducting line electrically connects the first and second superconducting electrodes passing along the cross section of the insulation film, thereby constituting a structure unit having a single weak link. A plurality of such structure units connected in series are prepared. At the both ends of the series the first or second superconducting electrode is an element connected to a leading line. The structure units are arranged so that the cross sections of the insulation films along which the normal conducting line passes are arranged in the sale direction.

摘要翻译： 当使用SNS（超导体 - 正常导体 - 超导体）结构作为用于串联连接的结构单元时，可以提高可以预期的负电阻特性。 在第一超导电极的顶部，叠加第二超导电极，以将绝缘膜夹在第一和第二超导电极之间，第二超导电极的横截面的一部分和绝缘膜位于顶部。 通常的超导线将通过绝缘膜的截面的第一和第二超导电极电连接，从而构成具有单个弱连接的结构单元。 准备串联连接的多个这种结构单元。 在串联的两端，第一或第二超导电极是连接到引线的元件。 结构单元布置成使得正常导电线穿过的绝缘膜的横截面布置在销售方向上。

公开(公告)号：US20070077906A1

公开(公告)日：2007-04-05

申请号：US11243019

申请日：2005-10-04

申请人： Alexander Kirichenko ,  Deepnarayan Gupta ,  Saad Sarwana

发明人： Alexander Kirichenko ,  Deepnarayan Gupta ,  Saad Sarwana

IPC分类号： H04B1/26

CPC分类号： H03D7/005

摘要： Digital mixers which permit mixing of asynchronous signals is constructed of Rapid Single Flux Quantum (RSFQ) logic elements. The logic elements may include an RSFQ non-destructive readout cell (NDRO), an RSFQ D flip-flop, an RSFQ XOR circuit, and an RSFQ T flip-flop. A binary tree arrangement of T flip-flops can be used to provide in-phase and quadrature phase-divided replicas of a reference signal. The mixing elements can be either an XOR circuit, a dual port NDRO circuit functioning as a multiplexer or an RS type NDRO functioning as an AND gate. The RSFQ logic elements utilize Josephson junctions which operate in superconducting temperature domains.

摘要翻译： 允许异步信号混合的数字混频器由快速单通量量子（RSFQ）逻辑元件构成。 逻辑元件可以包括RSFQ非破坏性读出单元（NDRO），RSFQ D触发器，RSFQ XOR电路和RSFQ T触发器。 可以使用T触发器的二叉树布置来提供参考信号的同相和正交相位分割副本。 混合元件可以是XOR电路，用作多路复用器的双端口NDRO电路或用作AND门的RS型NDRO。 RSFQ逻辑元件利用在超导温度域中工作的约瑟夫逊结。

公开(公告)号：US4325144A

公开(公告)日：1982-04-13

申请号：US189720

申请日：1980-09-22

申请人： Susan E. G. Slusky ,  Ralph F. Trambarulo

发明人： Susan E. G. Slusky ,  Ralph F. Trambarulo

IPC分类号： H03D9/06 ,  H04B1/26 ,  H03F7/00

CPC分类号： H03D9/0608 ,  H03D7/005 ,  Y10S505/861

摘要： The present invention relates to a subharmonically pumped hysteretic superconductor-insulator-superconductor (SIS) junction mixer. The hysteretic junction (10), achieved by not suppressing the critical current I.sub.c of the junction, is responsive to a first source of a pump signal (12) at a frequency .omega..sub.p and a second source of an input signal (14) at a frequency .omega..sub.i, to produce a non-zero output signal at a frequency .omega..sub.o =.vertline..omega..sub.i -2.omega..sub.p .vertline., during either an overpumped or underpumped condition. The hysteretic nature of the junction allows the mixer to operate in a switching mode, thereby producing low-noise mixing with gain.

摘要翻译： 本发明涉及一种次谐波抽运滞回超导体 - 绝缘体 - 超导体（SIS）结混合器。 通过不抑制结的临界电流Ic来实现的迟滞结（10）响应于频率ωp处的泵浦信号（12）的第一源和输入信号（14）的第二源， 频率ωi，以在过压或欠压状态下产生ω-ω=ωω-ωω-ωω的非零输出信号。 结点的滞后性质允许混合器以开关模式工作，从而产生低增益的低噪声混合。