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公开(公告)号：US20240195892A1
公开(公告)日：2024-06-13
申请号：US18586613
申请日：2024-02-26
IPC分类号： H04L69/22 , H04L45/74 , H04L45/745
CPC分类号： H04L69/22 , H04L45/742 , H04L45/74591
摘要： A network device includes one or more ports, and action-select circuitry. The ports are to exchange packets over a network. The action-select circuitry is to determine, for a given packet, a first search key based on a first header field of the given packet, and a second search key based on a second header field of the given packet, to compare the first search key to a first group of compare values, to output a multi-element vector responsively to a match between the first search key and a first compare value, to generate a composite search key by concatenating the second search key and the multi-element vector, to compare the composite search key to a second group of compare values, and, responsively to a match between the composite search key and a second compare value, to output an action indicator for applying to the given packet.
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公开(公告)号：US20240195754A1
公开(公告)日：2024-06-13
申请号：US18581423
申请日：2024-02-20
发明人： Niv Aibester , Barak Gafni
IPC分类号： H04L49/103 , H04L45/122 , H04L47/30 , H04L49/9005 , H04L49/9047
CPC分类号： H04L49/103 , H04L45/122 , H04L47/30 , H04L49/9005 , H04L49/9047
摘要： A device includes ports, a packet processor, and a memory management circuit. The ports communicate packets over a network. The packet processor processes the packets using queues. The memory management circuit maintains a shared buffer in a memory and adaptively allocates memory resources from the shared buffer to the queues, maintains in the memory, in addition to the shared buffer, a shared-reserve memory pool for use by the queues, identifies, among the queues, a queue that requires additional memory resources, the queue having an occupancy that is (i) above a current value of a dynamic threshold, rendering the queue ineligible for additional allocation from the shared buffer, and (ii) no more than a defined margin above the current value of the dynamic threshold, rendering the queue eligible for allocation from the shared-reserve memory pool, and allocates memory resources to the identified queue from the shared-reserve memory pool.
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公开(公告)号：US20240195736A1
公开(公告)日：2024-06-13
申请号：US18077940
申请日：2022-12-08
IPC分类号： H04L45/586 , H04L12/46 , H04L45/745
CPC分类号： H04L45/586 , H04L12/4641 , H04L45/745
摘要： Apparatuses, systems, and techniques to establish a redundant communication pathway to a management network. In at least one embodiment, the redundant communication pathway is established by creating a virtual interface using a network device, and using the virtual interface to communicate with the management network via a management port of a second network device, and a connection between a first data port of the network device and a second data port of the second network device.
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公开(公告)号：US20240187336A1
公开(公告)日：2024-06-06
申请号：US18414803
申请日：2024-01-17
发明人： Yamin Friedman , Idan Borshteen , Roee Moyal , Yuval Shpigelman
IPC分类号： H04L45/24 , H04L45/00 , H04L47/122
CPC分类号： H04L45/24 , H04L45/38 , H04L47/122
摘要： Technologies for spreading packets of transport flows across multiple network paths are described. A network controller includes a transport layer and a network layer. The transport layer includes a flow scheduler to schedule a transport flow from one of a plurality of transport flows. The network layer includes multipath logic to receive packets from the transport flow and select which path of a plurality of paths to a destination to use for the packets based on path congestion weights corresponding to the plurality of paths.
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公开(公告)号：US20240184619A1
公开(公告)日：2024-06-06
申请号：US18073662
申请日：2022-12-02
发明人： Ortal Bashan , Zachi Binshtock
IPC分类号： G06F9/48 , G06F9/50 , H04L49/253
CPC分类号： G06F9/4806 , G06F9/5027 , H04L49/253
摘要： A networking device and system are described, among other things. An illustrative system is disclosed to include a first processor to perform compute tasks associated with an operation; and a second processor to perform control plane tasks associated with the operation. The control plane tasks performed by the second processor relieve the first processor from responsibilities of performing the control plane tasks associated with the operation.
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36.发明公开公开(公告)号：US20240168645A1
公开(公告)日：2024-05-23
申请号：US18422162
申请日：2024-01-25
发明人： Yamin FRIEDMAN , Idan BURSTEIN , Hillel CHAPMAN , Gal YEFET
IPC分类号： G06F3/06 , G06F12/06 , G06F12/0897
CPC分类号： G06F3/0613 , G06F3/0652 , G06F3/0659 , G06F3/0673 , G06F12/06 , G06F12/0897
摘要： A method and system are provided for limiting unnecessary data traffic on the data busses connecting the various levels of system memory. Some embodiments may include processing an invalidation command associated with a system or network operation requiring temporary storage of data in a local memory area. The invalidation command may comprise a memory location indicator capable of identifying the physical addresses of the associated data in the local memory area. Some embodiments may preclude the data associated with the system or network operation from being written to a main memory by invalidating the memory locations holding the temporary data once the system or network operation has finished utilizing the local memory area.
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公开(公告)号：US11990935B2
公开(公告)日：2024-05-21
申请号：US17568441
申请日：2022-01-04
发明人： Paraskevas Bakopoulos , Elad Mentovich , Tali Septon , Dimitrios Syrivelis , Ioannis (Giannis) Patronas , Dimitrios Kalavrouziotis , Moshe Oron
摘要： An apparatus comprises a support structure and one or more first optical components on the support structure that communicatively couple with a first endpoint. The one or more first optical components are configured to output and receive optical signals that travel over a free space medium to establish a secure link between the first endpoint and a second endpoint.
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公开(公告)号：US11979340B2
公开(公告)日：2024-05-07
申请号：US17824954
申请日：2022-05-26
发明人： Boris Pismenny , Dotan David Levi , Gal Yefet
IPC分类号： H04L65/61 , H04L49/552 , H04L49/90 , H04L49/901 , H04L49/9057 , H04L65/65 , H04W28/04
CPC分类号： H04L49/552 , H04L49/901 , H04L49/9057 , H04L49/9068 , H04L65/61 , H04L65/65 , H04W28/04
摘要： A method for communication includes mapping transport sequence numbers in headers of data packets received from a network to respective buffers in a memory of a host computer. At least a part of the data from payloads of the received data packets is written directly to the respective buffers.
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公开(公告)号：US20240146431A1
公开(公告)日：2024-05-02
申请号：US17973575
申请日：2022-10-26
发明人： Wojciech Wasko , Dotan David Levi , Avi Urman , Natan Manevich
IPC分类号： H04J3/06
CPC分类号： H04J3/0638
摘要： In one embodiment, a system includes a network interface controller including a device interface to connect to a processing device and receive a time synchronization marker message from an application running on the processing device, a network interface to send packets over a network, and packet processing circuitry to process the time synchronization marker message for sending via the network interface over the network to a slave clock device, generate a time synchronization follow-up message including a timestamp indicative of when the synchronization marker message egressed the network interface, and process the time synchronization follow-up message for sending via the network interface over the network to the slave clock device.
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公开(公告)号：US20240143539A1
公开(公告)日：2024-05-02
申请号：US17977894
申请日：2022-10-31
发明人： Daniel Marcovitch , Richard Graham
IPC分类号： G06F15/173 , G06F13/32
CPC分类号： G06F15/17331 , G06F13/32
摘要： Disclosed are apparatuses, systems, and techniques that improve efficiency and decrease latency of remote direct memory access (RDMA) operations. The techniques include but are not limited to unified RDMA operations that are recognizable by various communicating devices, such as network controllers and target memory devices, as requests to establish, set, and/or update arrival indicators in the target memory devices responsive to arrival of one or more portions of the data being communicated.
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