公开(公告)号：US3609624A

公开(公告)日：1971-09-28

申请号：US3609624D

申请日：1969-02-20

申请人： VISHAY INTERTECHNOLOGY INC

发明人： NAGY BELLA

IPC分类号： G01L1/22

CPC分类号： G01L1/2287

摘要： A strain gage of the electrical resistance type is disclosed herein which has improved adhesive means to attaching the gage to a member under test. The adhesive is applied to the gage at the time of manufacture and includes a thermosetting adhesive composition which is substantially nontacky at room temperature, and upon heating to a first elevated temperature wets the surface of the test piece in contact therewith and when heated to a second higher temperature, is converted to the infusible, insoluble state.

公开(公告)号：US10770489B2

公开(公告)日：2020-09-08

申请号：US15941855

申请日：2018-03-30

申请人： VISHAY INTERTECHNOLOGY, INC.

发明人： Koon-Wing Tsang ,  Yuh-Min Lin

IPC分类号： H01L27/144 ,  H01L31/0216 ,  G01J3/02 ,  G01J3/28

摘要： An optoelectronic device is disclosed, comprising: a photodiode array including a plurality of first photodiodes, each first photodiode including a respective n+ region and a respective n-well region; a guide array disposed over the photodiode array, the guide array including a plurality of guide members separated from one another by a layer of light-blocking material, the guide members being aligned with the n+ regions of the first photodiodes, such that each guide member is disposed over a different respective n+ region, and the layer of light-blocking material being aligned with the n-well regions of the first photodiodes; and a filter array disposed over the guide array, the filter array including a plurality of bandpass filters, each bandpass filter being aligned with a different one of the plurality of guide members, each bandpass filter having a different transmission band.

公开(公告)号：US08004063B2

公开(公告)日：2011-08-23

申请号：US11601501

申请日：2006-11-16

申请人： Haim Goldberger ,  Sik Lui ,  Jacek Korec ,  Y. Mohammed Kasem ,  Harianto Wong ,  Jack Van Den Heuvel

发明人： Haim Goldberger ,  Sik Lui ,  Jacek Korec ,  Y. Mohammed Kasem ,  Harianto Wong ,  Jack Van Den Heuvel

IPC分类号： H01L29/92

CPC分类号： H01G4/33 ,  H01G4/38 ,  H01L23/481 ,  H01L28/40 ,  H01L29/66181 ,  H01L29/945 ,  H01L2224/0401 ,  H01L2224/05 ,  H01L2224/13025 ,  H01L2224/131 ,  H01L2924/13091 ,  Y10S438/957 ,  H01L2924/014 ,  H01L2924/00

摘要： A precision high-frequency capacitor includes a dielectric layer formed on the front side surface of a semiconductor substrate and a first electrode on top of the dielectric layer. The semiconductor substrate is heavily doped and therefore has a low resistivity. A second electrode, insulated from the first electrode, is also formed over the front side surface. In one embodiment, the second electrode is connected by a metal-filled via to a layer of conductive material on the back side of the substrate. In alternative embodiments, the via is omitted and the second electrode is either in electrical contact with the substrate or is formed on top of the dielectric layer, yielding a pair of series-connected capacitors. ESD protection for the capacitor can be provided by a pair of oppositely-directed diodes formed in the substrate and connected in parallel with the capacitor. To increase the capacitance of the capacitor while maintaining a low effective series resistance, each of the electrodes may include a plurality of fingers, which are interdigitated with the fingers of the other electrode. The capacitor is preferably fabricated in a wafer-scale process concurrently with numerous other capacitors on the wafer, and the capacitors are then separated from each other by a conventional dicing technique.

摘要翻译： 精密高频电容器包括形成在半导体衬底的前侧表面上的电介质层和位于电介质层顶部的第一电极。 半导体衬底是重掺杂的，因此具有低电阻率。 与第一电极绝缘的第二电极也形成在前侧表面上。 在一个实施例中，第二电极通过金属填充的通孔连接到衬底背面上的导电材料层。 在替代实施例中，省略通孔，并且第二电极与衬底电接触或者形成在电介质层的顶部，从而产生一对串联电容器。 电容器的ESD保护可以由形成在衬底中并与电容器并联连接的一对相反方向的二极管提供。 为了在保持低有效串联电阻的同时增加电容器的电容，每个电极可以包括与另一个电极的指状物交叉的多个指状物。 电容器优选与晶片上的许多其它电容器同时地以晶片级工艺制造，然后通过常规的切割技术将电容器彼此分离。

公开(公告)号：US20080303720A1

公开(公告)日：2008-12-11

申请号：US11759523

申请日：2007-06-07

申请人： ELI BERSHADSKY ,  MARINA KRAVCHIK ,  REUVEN KATRARO ,  DAVID BEN-BASSAT ,  DANI ALON

发明人： ELI BERSHADSKY ,  MARINA KRAVCHIK ,  REUVEN KATRARO ,  DAVID BEN-BASSAT ,  DANI ALON

IPC分类号： H01Q1/38 ,  C04B35/03

CPC分类号： C04B35/47 ,  C04B2235/3208 ,  C04B2235/3215 ,  C04B2235/3229 ,  C04B2235/3236 ,  C04B2235/3244 ,  C04B2235/3248 ,  C04B2235/3262 ,  C04B2235/3284 ,  C04B2235/3298 ,  C04B2235/349 ,  C04B2235/36 ,  C04B2235/656 ,  C04B2235/72

摘要： A dielectric ceramic composition has a dielectric constant, K, of at least 200 and a dielectric loss, DF, of 0.0006 or less at 1 MHz. The dielectric ceramic composition may be formed by sintering by firing in air without a controlled atmosphere. The dielectric ceramic composition may have a major component of 92.49 to 97.5 wt. % containing 60.15 to 68.2 wt. % strontium titanate, 11.02 to 23.59 wt. % calcium titanate and 7.11 to 21.32 wt. % barium titanate; and a minor component of 2.50 to 7.51 wt. % containing 1.18 to 3.55 wt. % calcium zirconate, 0.50 to 1.54 wt. % bismuth trioxide, 0.2 to 0.59 wt. % zirconia, 0.02 to 0.07 wt. % manganese dioxide, 0.12 to 0.35 wt. % zinc oxide, 0.12 to 0.35 wt. % lead-free glass frit, 0.24 to 0.71 wt. % kaolin clay and 0.12 to 0.35 wt. % cerium oxide. UHF antennas and monolithic ceramic components may use the dielectric ceramic composition.

摘要翻译： 介电陶瓷组合物的介电常数K至少为200，介电损耗DF在1MHz时为0.0006以下。 电介质陶瓷组合物可以通过在没有受控气氛的空气中烧制而烧结而形成。 介电陶瓷组合物可以具有92.49至97.5重量％的主要组分。 ％含有60.15〜68.2重量％ ％钛酸锶，11.02〜23.59重量％ 钛酸钙和7.11〜21.32重量％ ％钛酸钡; 和2.50〜7.51重量％的次要组分。 ％含有1.18〜3.55重量％ 锆酸钙，0.50〜1.54重量％ 三氧化二铋，0.2〜0.59重量％ ％氧化锆，0.02〜0.07重量％ ％二氧化锰，0.12〜0.35wt。 ％氧化锌，0.12〜0.35重量％ ％无铅玻璃料，0.24至0.71wt。 ％的高岭土和0.12〜0.35wt。 ％的氧化铈。 UHF天线和单片陶瓷组件可以使用介电陶瓷组合物。

公开(公告)号：US07426102B2

公开(公告)日：2008-09-16

申请号：US11415039

申请日：2006-05-01

申请人： Haim Goldberger ,  Reuven Katraro ,  Doron Gozaly

发明人： Haim Goldberger ,  Reuven Katraro ,  Doron Gozaly

IPC分类号： H01G4/228

CPC分类号： H01G4/228 ,  H01G4/33 ,  H01L2224/11

摘要： An electronic component such as a capacitor includes a substrate having first and second principal surfaces, a dielectric layer overlaying the first principal surface of the substrate, a first electrode, and a second electrode. There is a passivation layer overlaying the first and second electrodes, a first opening being formed in the passivation layer over the first electrode and a second opening being formed in the passivation layer over the second electrode. A first bottom electrode termination is positioned in the first opening and a second bottom electrode termination is positioned in the second opening. The first bottom electrode termination is electrically connected to the first electrode and the second bottom electrode termination is electrically connected to the second electrode. A standoff is positioned between the first bottom electrode termination and the second bottom electrode termination and attached to the passivation layer to thereby provide support for the electronic component when mounted. The standoff provides resistance to tilting.

摘要翻译： 诸如电容器的电子部件包括具有第一和第二主表面的基板，覆盖基板的第一主表面的电介质层，第一电极和第二电极。 存在覆盖第一和第二电极的钝化层，第一开口形成在第一电极上的钝化层中，第二开口形成在第二电极上的钝化层中。 第一底部电极终端位于第一开口中，而第二底部电极终端位于第二开口中。 第一底部电极端子电连接到第一电极，第二底部电极端子电连接到第二电极。 间隔件位于第一底部电极端子和第二底部电极端子之间并且附接到钝化层，从而在安装时为电子部件提供支撑。 对立提供了对倾斜的抵抗力。

公开(公告)号：US07247250B2

公开(公告)日：2007-07-24

申请号：US10964357

申请日：2004-10-13

申请人： George V. Gerber ,  Anthony E. Troianello ,  Haim Goldberger

发明人： George V. Gerber ,  Anthony E. Troianello ,  Haim Goldberger

IPC分类号： H01B13/00

CPC分类号： F42B3/198 ,  F42B3/124 ,  Y10T29/49082 ,  Y10T29/49083 ,  Y10T29/49098 ,  Y10T29/49099

摘要： A fast heat rise resistor comprising a substrate, a foil bridge on the surface of the substrate, the foil bridge having an elevated portion and a contact portion, the elevated portion above the substrate, the contact portion in contact with the substrate, a conductive layer attached to the contact portion of said foil bridge. The activation energy and/or response time is reduced as the foil bridge is suspended over the substrate. Another aspect of the invention include a method of manufacturing the foil bridge and application to autoignition vehicle airbags.

摘要翻译： 一种快速加热电阻器，包括衬底，在衬底表面上的箔桥，箔桥具有升高部分和接触部分，衬底上方的升高部分，与衬底接触的接触部分，导电层 附接到所述箔桥的接触部分。 当箔桥悬挂在衬底上时，激活能和/或响应时间减小。 本发明的另一方面包括制造箔桥的方法和应用于自动对准车辆安全气囊。

公开(公告)号：US06880233B2

公开(公告)日：2005-04-19

申请号：US10079176

申请日：2002-02-20

申请人： George V. Gerber ,  Anthony E. Troianello ,  Haim Goldberger

发明人： George V. Gerber ,  Anthony E. Troianello ,  Haim Goldberger

IPC分类号： B44C1/22 ,  C03C15/00 ,  C03C25/68 ,  C23F1/00 ,  F42B3/12 ,  F42B3/198 ,  H01C1/012 ,  H01C17/28

CPC分类号： F42B3/198 ,  F42B3/124 ,  Y10T29/49082 ,  Y10T29/49083 ,  Y10T29/49098 ,  Y10T29/49099

摘要： A fast heat rise resistor comprising a substrate, a foil bridge on the surface of the substrate, the foil bridge having an elevated portion and a contact portion, the elevated portion above the substrate, the contact portion in contact with the substrate, a conductive layer attached to the contact portion of said foil bridge. The activation energy and/or response time is reduced as the foil bridge is suspended over the substrate. Another aspect of the invention include a method of manufacturing the foil bridge and application to autoignition vehicle airbags.

摘要翻译： 一种快速加热电阻器，包括衬底，在衬底表面上的箔桥，箔桥具有升高部分和接触部分，衬底上方的升高部分，与衬底接触的接触部分，导电层 附接到所述箔桥的接触部分。 当箔桥悬挂在衬底上时，激活能和/或响应时间减小。 本发明的另一方面包括制造箔桥的方法和应用于自动对准车辆安全气囊。

公开(公告)号：US20040041278A1

公开(公告)日：2004-03-04

申请号：US10440941

申请日：2003-05-19

申请人： Vishay Intertechnology, Inc.

发明人： Leonid Akhtman ,  Sakaev Matvey

IPC分类号： H05K001/03 ,  H05K001/16

CPC分类号： H01C7/003 ,  H01C1/142 ,  H01C17/006 ,  H01C17/281 ,  Y10T29/49082 ,  Y10T29/49098 ,  Y10T29/49099

摘要： The present invention provides for a flip chip resistor having a substrate having opposite ends, a pair of electrodes formed from a first electrode layer disposed on the opposite ends of the substrate, a resistance layer electrically connecting the pair of electrodes, a protective layer overlaying the resistance layer, and a second electrode layer overlaying the first electrode layer and at least a portion of the protective layer. The present invention provides for higher reliability performance and enlarging the potential soldering area despite small chip size. A method of the present invention provides for manufacturing flip chip resistors by applying a first electrode layer to a substrate to create at least one pair of opposite electrodes, applying a resistance layer between each pair of opposite electrodes; applying a first protective layer at least partially overlaying the resistance layer, applying a second protective layer at least partially overlaying at least a portion of the resistance layer, and applying a second electrode layer overlaying the first electrode layer and at least a portion of the second protective layer.

摘要翻译： 本发明提供一种具有相对端的衬底的倒装芯片电阻器，由设置在衬底的相对端上的第一电极层形成的一对电极，电连接该对电极的电阻层，覆盖 电阻层和覆盖第一电极层和保护层的至少一部分的第二电极层。 尽管芯片尺寸小，本发明提供了更高的可靠性性能和扩大了潜在的焊接区域。 本发明的方法提供了制造倒装芯片电阻器，通过向基片施加第一电极层以产生至少一对相对电极，在每对相对电极之间施加电阻层; 施加至少部分地覆盖所述电阻层的第一保护层，施加至少部分覆盖所述电阻层的至少一部分的第二保护层，以及施加覆盖所述第一电极层的第二电极层和所述第二电极层的至少一部分 保护层。

公开(公告)号：US20020185710A1

公开(公告)日：2002-12-12

申请号：US10157584

申请日：2002-05-28

申请人： Vishay Intertechnology, Inc.

发明人： Felix Zandman ,  Y. Mohammed Kasem ,  Yueh-Se Ho

IPC分类号： H01L021/44 ,  H01L023/544 ,  H01L029/06

CPC分类号： H01L21/76898 ,  H01L23/3107 ,  H01L23/3114 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01079 ,  H01L2924/13091 ,  H01L2924/00

摘要： A semiconductor package by which contacts are made to both sides of the dice is manufactured on a wafer scale. The back side of the wafer is attached to a metal plate. The scribe lines separating the dice are saw cut to expose the metal plate but the cuts do not extend through the metal plate. A metal layer, which may include a number of sublayers, is formed on the front side of the dice, the metal covering the exposed portions of the metal plate and extending the side edges of the dice. Separate sections of the metal layer may also cover connection pads on the front side of the dice. A second set of saw cuts are made coincident with the first set of saw cuts, using a blade that is narrower than the blade used to make the first set of saw cuts. As a result, the metal layer remains on the side edges of the dice connecting the back and front sides of the dice (via the metal plate). Since no wire bonds are required, the resulting package is rugged and provides a low-resistance electrical connection between the back and front sides of the dice.

摘要翻译： 在晶片尺寸上制造在骰子的两侧形成触点的半导体封装。 晶片的背面附着在金属板上。 分割骰子的划痕线被锯切以暴露金属板，但切口不延伸通过金属板。 可以包括多个子层的金属层形成在骰子的前侧，金属覆盖金属板的暴露部分并延伸骰子的侧边缘。 金属层的分开的部分也可以覆盖骰子正面上的连接垫。 使用与用于制造第一组锯切的刀片相比较窄的第二组锯切与第一组锯切重合。 结果，金属层保留在连接骰子（通过金属板）的前侧和前侧的骰子的侧边缘上。 由于不需要引线键合，所以产生的封装是坚固的，并且在芯片的背面和前面之间提供低电阻电连接。

公开(公告)号：US5206623A

公开(公告)日：1993-04-27

申请号：US695044

申请日：1991-05-02

申请人： Michel Rochette ,  Paul R. Simon

发明人： Michel Rochette ,  Paul R. Simon

IPC分类号： H01C13/02 ,  H01C7/00 ,  H01C17/24 ,  H01C17/242

CPC分类号： H01C17/24

摘要： An electrical resistor which is fabricated from traces of resistive material on a substrate of insulating material. The traces are interconnected electrically in series by first links and in parallel by second alternating links, which are connected to different terminals on the substrate. The second links are cut, preferably by laser trimming, so as to select the value of resistance of the resistor by reducing the number of traces connected in parallel and increasing the number of traces connected in series. Where the resistance of each trace is "R", the value of the resistance is adjustable by severing the second links from R/n to nR, where n is the number of traces.

摘要翻译： 一种电阻器，由绝缘材料基片上的电阻材料迹线制成。 迹线通过第一链节电连接并且由第二交替链路并联连接，第二交替链路连接到基板上的不同端子。 切割第二连杆，优选通过激光修整，以便通过减少并联连接的迹线数量和增加串联连接的迹线数来选择电阻器的电阻值。 在每个迹线的电阻为“R”的情况下，通过将第二个链路从R / n切换到nR，可以调整电阻值，其中n是轨迹数。