利索-全球专利检索

  1. Login
  2. Sign Up

Search Results

59 records (took 0.017 seconds)

    Bipolar junction transistor with epitaxial contacts
    32.
    发明授权
    Bipolar junction transistor with epitaxial contacts 有权
    具有外延触点的双极结晶体管

    公开(公告)号：US08486797B1

    公开(公告)日：2013-07-16

    申请号：US13481048

    申请日：2012-05-25

    Applicant: Bahman Hekmatshoartabari ,  Tak H. Ning ,  Devendra K. Sadana ,  Ghavam G. Shahidi ,  Davood Shahrjerdi

    Inventor： Bahman Hekmatshoartabari ,  Tak H. Ning ,  Devendra K. Sadana ,  Ghavam G. Shahidi ,  Davood Shahrjerdi

    IPC: H01L21/44

    CPC classification number: H01L21/02532 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/0262 ,  H01L21/02636 ,  H01L29/0804 ,  H01L29/0821 ,  H01L29/66242 ,  H01L29/7378

    Abstract: Bipolar junction transistors are provided in which at least one of an emitter contact, a base contact, or a collector contact thereof is formed by epitaxially growing a doped SixGe1-x layer, wherein x is 0≦x≦1, at a temperature of less than 500° C. The doped SixGe1-x layer comprises crystalline portions located on exposed surfaces of a crystalline semiconductor substrate and non-crystalline portions that are located on exposed surfaces of a passivation layer which can be formed and patterned on the crystalline semiconductor substrate. The doped SixGe1-x layer of the present disclosure, including the non-crystalline and crystalline portions, contains from 5 atomic percent to 40 atomic percent hydrogen.

    Abstract translation: 提供了双极结晶体管，其中通过在较低温度下外延生长掺杂的SixGe1-x层（其中x为0 @ x @）来形成发射极接触，基极接触或集电极接触中的至少一个 掺杂的SixGe1-x层包括位于结晶半导体衬底的暴露表面上的结晶部分和位于可在晶体半导体衬底上形成和图案化的钝化层的暴露表面上的非晶体部分。 本公开的掺杂的SixGe1-x层包括非晶态和结晶部分，含有5原子％至40原子％的氢。

    Radiation hardened SOI structure and method of making same
    34.
    发明授权
    Radiation hardened SOI structure and method of making same 有权
    辐射硬化SOI结构及其制作方法

    公开(公告)号：US09041167B2

    公开(公告)日：2015-05-26

    申请号：US13555271

    申请日：2012-07-23

    Applicant: Stephen W. Bedell ,  Bahman Hekmatshoartabari ,  Ali Khakifirooz ,  Ghavam G. Shahidi ,  Davood Shahrjerdi

    Inventor： Stephen W. Bedell ,  Bahman Hekmatshoartabari ,  Ali Khakifirooz ,  Ghavam G. Shahidi ,  Davood Shahrjerdi

    IPC: H01L21/00 ,  H01L21/3115 ,  H01L21/762

    CPC classification number: H01L21/31155 ,  H01L21/304 ,  H01L21/7624

    Abstract: An SOI substrate including a buried insulator layer positioned between a base substrate and a top semiconductor active layer is first provided. A semiconductor device can then be formed on and/or within a portion of the top semiconductor active layer. A bottommost surface of the buried insulator layer which is opposite a topmost surface of the buried insulator layer that forms an interface with the top semiconductor active layer can be then exposed. Ions can then be implanted through the bottommost surface of the buried insulator layer and into a portion of the buried insulator layer. The ions are implanted at energy ranges that do not disturb the buried insulator layer/top semiconductor active layer interface, while leaving a relatively thin portion of the buried insulator layer near the buried insulator layer/top semiconductor active layer interface intact.

    Abstract translation: 首先提供包括位于基底基板和顶部半导体有源层之间的掩埋绝缘体层的SOI衬底。 然后可以在顶部半导体有源层的一部分上和/或内部形成半导体器件。 掩埋绝缘体层的与埋入绝缘体层的与顶部半导体活性层形成界面的最上表面相对的最底表面可以暴露。 然后，离子可以通过掩埋绝缘体层的最底部的表面注入埋入的绝缘体层的一部分中。 将离子注入到不会干扰埋入的绝缘体层/顶部半导体有源层界面的能量范围内，同时在掩埋的绝缘体层/顶部半导体活性层界面附近保留相当薄的部分隐埋绝缘体层。

    Defect free strained silicon on insulator (SSOI) substrates
    37.
    发明授权
    Defect free strained silicon on insulator (SSOI) substrates 有权
    绝缘体上无应变的硅绝缘体（SSOI）衬底

    公开(公告)号：US08921209B2

    公开(公告)日：2014-12-30

    申请号：US13612675

    申请日：2012-09-12

    Applicant: Stephen W. Bedell ,  Bahman Hekmatshoartabari ,  Devendra K. Sadana ,  Ghavam G. Shahidi ,  Davood Shahrjerdi

    Inventor： Stephen W. Bedell ,  Bahman Hekmatshoartabari ,  Devendra K. Sadana ,  Ghavam G. Shahidi ,  Davood Shahrjerdi

    IPC: H01L21/20

    CPC classification number: H01L29/7847 ,  H01L21/02532 ,  H01L21/02581 ,  H01L21/0262 ,  H01L21/76254

    Abstract: A method of forming a strained semiconductor material that in one embodiment includes forming a cleave layer in a host semiconductor substrate, and contacting a strain inducing material layer on a surface of a of the host semiconductor substrate. A handle substrate is then contacted to an exposed surface of the stress inducing material layer. The transfer portion of the host semiconductor substrate may then be separated from the host semiconductor substrate along the cleave layer. A dielectric layer is formed directly on the transfer portion of the host semiconductor substrate. The handle substrate and the stress inducing material are then removed, wherein the transferred portion of the host semiconductor substrate provides a strained semiconductor layer that is in direct contact with a dielectric layer.

    Abstract translation: 一种形成应变半导体材料的方法，其在一个实施方案中包括在主半导体衬底中形成切割层，并使主体半导体衬底的表面上的应变诱导材料层接触。 然后将手柄基板与应力诱导材料层的暴露表面接触。 然后可以将主体半导体衬底的转移部分沿着切割层与主体半导体衬底分离。 电介质层直接形成在主体半导体衬底的转移部分上。 然后去除手柄衬底和应力诱导材料，其中主体半导体衬底的转移部分提供与电介质层直接接触的应变半导体层。

    Defect free strained silicon on insulator (SSOI) substrates
    39.
    发明授权
    Defect free strained silicon on insulator (SSOI) substrates 失效
    绝缘体上无应变的硅绝缘体（SSOI）衬底

    公开(公告)号：US08765577B2

    公开(公告)日：2014-07-01

    申请号：US13614308

    申请日：2012-09-13

    Applicant: Stephen W. Bedell ,  Bahman Hekmatshoartabari ,  Devendra K. Sadana ,  Ghavam G. Shahidi ,  Davood Shahrjerdi

    Inventor： Stephen W. Bedell ,  Bahman Hekmatshoartabari ,  Devendra K. Sadana ,  Ghavam G. Shahidi ,  Davood Shahrjerdi

    IPC: H01L21/461

    CPC classification number: H01L29/7847 ,  H01L21/02532 ,  H01L21/02581 ,  H01L21/0262 ,  H01L21/76254

    Abstract: A method of forming a strained semiconductor material that in one embodiment includes forming a cleave layer in a host semiconductor substrate, and contacting a strain inducing material layer on a surface of a transfer portion of the host semiconductor substrate. A handle substrate is then contacted to an exposed surface of the stress inducing material layer. The transfer portion of the host semiconductor substrate may then be separated from the host semiconductor substrate along the cleave layer. A dielectric layer is formed directly on the transfer portion of the host semiconductor substrate. The handle substrate and the stress inducing material are then removed, wherein the transferred portion of the host semiconductor substrate provides a strained semiconductor layer that is in direct contact with a dielectric layer.

    Abstract translation: 一种形成应变半导体材料的方法，其在一个实施方案中包括在主半导体衬底中形成切割层，并且在主半导体衬底的转移部分的表面上使应变诱导材料层接触。 然后将手柄基板与应力诱导材料层的暴露表面接触。 然后可以将主体半导体衬底的转移部分沿着切割层与主体半导体衬底分离。 电介质层直接形成在主体半导体衬底的转移部分上。 然后去除手柄衬底和应力诱导材料，其中主体半导体衬底的转移部分提供与电介质层直接接触的应变半导体层。

    DEFECT FREE STRAINED SILICON ON INSULATOR (SSOI) SUBSTRATES
    40.
    发明申请
    DEFECT FREE STRAINED SILICON ON INSULATOR (SSOI) SUBSTRATES 有权
    在绝缘子（SSOI）衬底上缺陷自由应变硅

    公开(公告)号：US20140073119A1

    公开(公告)日：2014-03-13

    申请号：US13612675

    申请日：2012-09-12

    Applicant: Stephen W. Bedell ,  Bahman Hekmatshoartabari ,  Devendra K. Sadana ,  Ghavam G. Shahidi ,  Davood Shahrjerdi

    Inventor： Stephen W. Bedell ,  Bahman Hekmatshoartabari ,  Devendra K. Sadana ,  Ghavam G. Shahidi ,  Davood Shahrjerdi

    IPC: H01L21/20

    CPC classification number: H01L29/7847 ,  H01L21/02532 ,  H01L21/02581 ,  H01L21/0262 ,  H01L21/76254

    Abstract: A method of forming a strained semiconductor material that in one embodiment includes forming a cleave layer in a host semiconductor substrate, and contacting a strain inducing material layer on a surface of a transfer portion of the host semiconductor substrate. A handle substrate is then contacted to an exposed surface of the stress inducing material layer. The transfer portion of the host semiconductor substrate may then be separated from the host semiconductor substrate along the cleave layer. A dielectric layer is formed directly on the transfer portion of the host semiconductor substrate. The handle substrate and the stress inducing material are then removed, wherein the transferred portion of the host semiconductor substrate provides a strained semiconductor layer that is in direct contact with a dielectric layer.

    Abstract translation: 一种形成应变半导体材料的方法，其在一个实施方案中包括在主半导体衬底中形成切割层，并且在主半导体衬底的转移部分的表面上使应变诱导材料层接触。 然后将手柄基板与应力诱导材料层的暴露表面接触。 然后可以将主体半导体衬底的转移部分沿着切割层与主体半导体衬底分离。 电介质层直接形成在主体半导体衬底的转移部分上。 然后去除手柄衬底和应力诱导材料，其中主体半导体衬底的转移部分提供与电介质层直接接触的应变半导体层。

Patent Agency Ranking