公开(公告)号：US20070012919A1

公开(公告)日：2007-01-18

申请号：US11487090

申请日：2006-07-15

Applicant: Min-seok Oh ,  Byoung-june Kim ,  Sang-gab Kim ,  Sung-hoon Yang ,  Hong-kee Chin ,  Kunal Girotra

Inventor： Min-seok Oh ,  Byoung-june Kim ,  Sang-gab Kim ,  Sung-hoon Yang ,  Hong-kee Chin ,  Kunal Girotra

IPC: H01L29/04

CPC classification number: H01L29/78618 ,  H01L27/124 ,  H01L29/458 ,  H01L29/66757

Abstract: Provided are a thin film transistor (TFT) substrate and a method for manufacturing the same. The method comprises forming on a substrate a conductive layer, an impurity-doped silicon layer, and an intermediate layer, wherein the intermediate layer comprises intrinsic silicon; patterning the intermediate layer, the impurity-doped silicon layer, and the conductive layer to form a data line, a source electrode, a drain electrode, ohmic contact portions, and intermediate portions, wherein an ohmic contact portion and an intermediate portion are on the source electrode, and an ohmic contact portion and an intermediate portion are on the drain electrode; forming an intrinsic silicon layer on the substrate; and patterning the intrinsic silicon layer to form a semiconductor layer forming channel portion between the source electrode and the drain electrode, and a contact portion on the intermediate portion.

Abstract translation: 提供一种薄膜晶体管（TFT）基板及其制造方法。 该方法包括在衬底上形成导电层，杂质掺杂硅层和中间层，其中中间层包含本征硅; 图案化中间层，杂质掺杂硅层和导电层，以形成数据线，源电极，漏电极，欧姆接触部分和中间部分，其中欧姆接触部分和中间部分在 源电极和欧姆接触部分和中间部分在漏电极上; 在衬底上形成本征硅层; 以及图案化本征硅层以在源电极和漏极之间形成沟道部分的半导体层，以及在中间部分上形成接触部分。

公开(公告)号：US20070002198A1

公开(公告)日：2007-01-04

申请号：US11444954

申请日：2006-05-31

Applicant: Sung-Hoon Yang ,  Won-Suk Shin ,  Byoung-June Kim

Inventor： Sung-Hoon Yang ,  Won-Suk Shin ,  Byoung-June Kim

IPC: G02F1/136

CPC classification number: G02F1/136286 ,  G02F1/136227 ,  G02F1/1368 ,  G02F2001/136295 ,  H01L27/124 ,  H01L29/4908

Abstract: The present invention provides a thin film transistor array panel comprising a substrate; a gate line containing Ag formed on the substrate at a low temperature to prevent agglomeration, a first gate insulating layer formed on the gate line, a second gate insulating layer formed on the first gate insulating layer, a data line perpendicularly intersecting the gate line, and a thin film transistor connected to the gate line and the data line, and a manufacturing method thereof.

Abstract translation: 本发明提供一种薄膜晶体管阵列板，其包括基板; 在低温下形成在基板上的Ag以防止凝聚的栅极线，形成在栅极线上的第一栅极绝缘层，形成在第一栅极绝缘层上的第二栅极绝缘层，与栅极线垂直相交的数据线， 以及连接到栅极线和数据线的薄膜晶体管及其制造方法。

公开(公告)号：US20120112542A1

公开(公告)日：2012-05-10

申请号：US13354671

申请日：2012-01-20

Applicant: Myung-Hun SHIN ,  Dong-Uk Choi ,  Byoung-June Kim ,  Jin-Seock Kim ,  Czang-Ho Lee ,  Seung-Jae Jung ,  Joon-Young Seo

Inventor： Myung-Hun SHIN ,  Dong-Uk Choi ,  Byoung-June Kim ,  Jin-Seock Kim ,  Czang-Ho Lee ,  Seung-Jae Jung ,  Joon-Young Seo

IPC: H02J1/00

CPC classification number: H01L31/042 ,  H01L31/0201 ,  H01L31/046 ,  H01L31/05 ,  H02S40/36 ,  H02S50/10 ,  Y02E10/50 ,  Y10T307/50

Abstract: A method of electrically eliminating defective solar cell units that are disposed within an integrated solar cells module and a method of trimming an output voltage of the integrated solar cells module are provided, where the solar cells module has a large number (e.g., 50 or more) of solar cell units integrally disposed therein and initially connected in series one to the next. The method includes providing a corresponding plurality of repair pads, each integrally extending from a respective electrode layer of the solar cell units, and providing a bypass conductor integrated within the module and extending adjacent to the repair pads. Pad-to-pad spacings and pad-to-bypass spacings are such that pad-to-pad connecting bridges may be selectively created between adjacent ones of the repair pads and such that pad-to-bypass connecting bridges may be selectively created between the repair pads and the adjacently extending bypass conductor.

Abstract translation: 提供了一种电除去集成太阳能电池模块内的有缺陷的太阳能电池单元的方法和一种微调集成太阳能电池组件的输出电压的方法，其中太阳能电池模块具有大量（例如，50个或更多个） ）的太阳能电池单元整体地设置在其中并且最初串联连接到下一个。 该方法包括提供相应的多个修复焊盘，每个修补焊盘从太阳能电池单元的相应电极层整体延伸，并且提供集成在模块内并在修补焊盘附近延伸的旁路导体。 垫到衬垫间距和衬垫到旁路间隔使得可以在相邻的修补焊盘之间选择性地创建焊盘到焊盘的连接桥，并且可以在焊盘到旁路的连接桥之间选择性地创建焊盘到旁路的连接桥 修补垫和相邻延伸的旁路导体。

公开(公告)号：US20090098673A1

公开(公告)日：2009-04-16

申请号：US12334241

申请日：2008-12-12

Applicant: Sung-Hoon Yang ,  Kunal Satyabhushan Girotra ,  Byoung-June Kim

Inventor： Sung-Hoon Yang ,  Kunal Satyabhushan Girotra ,  Byoung-June Kim

IPC: H01L21/77

CPC classification number: H01L29/458 ,  H01L27/124 ,  H01L27/1288 ,  H01L29/4908

Abstract: A TFT array panel-including a substrate, a gate line having a gate electrode, a gate insulating layer formed on the gate line, a data line having a source electrode and a drain electrode spaced apart from the source electrode, a passivation layer formed on the data line and the drain electrode, and a pixel electrode connected to the drain electrode is provided. The TFT array panel further includes a protection layer including Si under at least one of the gate insulating layer and the passivation layer to enhance reliability.

Abstract translation: 一种TFT阵列面板，包括基板，具有栅极电极的栅极线，栅极线上形成的栅极绝缘层，具有与源极间隔开的源极和漏电极的数据线，形成在源电极上的钝化层 提供数据线和漏电极以及连接到漏电极的像素电极。 TFT阵列板还包括在栅极绝缘层和钝化层中的至少一个之下包括Si的保护层，以增强可靠性。

公开(公告)号：US20070096097A1

公开(公告)日：2007-05-03

申请号：US11538394

申请日：2006-10-03

Applicant: Byoung-June Kim ,  Sung-Hoon Yang ,  Min-Seok Oh ,  Jae-HO Choi ,  Yong-Mo Choi

Inventor： Byoung-June Kim ,  Sung-Hoon Yang ,  Min-Seok Oh ,  Jae-HO Choi ,  Yong-Mo Choi

IPC: H01L29/04 ,  H01L21/84

CPC classification number: H01L29/78669 ,  H01L27/12 ,  H01L27/124 ,  H01L29/458 ,  H01L29/66765

Abstract: A TFT includes a gate electrode, an active layer, a source electrode, a drain electrode, and a buffer layer. The gate electrode is formed on the substrate; the active layer is formed on the gate electrode. The source and drain electrodes, formed on the active layer, are separated by a predetermined distance. The buffer layer is formed between the active layer and the source and drain electrodes. The buffer layer has a substantially continuously varying content ratio corresponding to a buffer layer thickness. The buffer layer is formed to suppress oxidation of the active layer, and reduce contact resistance.

Abstract translation: TFT包括栅电极，有源层，源电极，漏电极和缓冲层。 栅电极形成在基板上; 在栅电极上形成有源层。 形成在有源层上的源电极和漏电极分开预定的距离。 缓冲层形成在有源层与源极和漏极之间。 缓冲层具有对应于缓冲层厚度的基本连续变化的含量比。 形成缓冲层以抑制有源层的氧化，并降低接触电阻。

公开(公告)号：US20120015487A1

公开(公告)日：2012-01-19

申请号：US13244036

申请日：2011-09-23

Applicant: Sung-Hoon YANG ,  Won-Suk Shin ,  Byoung-June Kim

Inventor： Sung-Hoon YANG ,  Won-Suk Shin ,  Byoung-June Kim

IPC: H01L21/336

CPC classification number: G02F1/136286 ,  G02F1/136227 ,  G02F1/1368 ,  G02F2001/136295 ,  H01L27/124 ,  H01L29/4908

Abstract: The present invention provides a thin film transistor array panel comprising a substrate; a gate line containing Ag formed on the substrate at a low temperature to prevent agglomeration, a first gate insulating layer formed on the gate line, a second gate insulating layer formed on the first gate insulating layer, a data line perpendicularly intersecting the gate line, and a thin film transistor connected to the gate line and the data line, and a manufacturing method thereof.

Abstract translation: 本发明提供一种薄膜晶体管阵列板，其包括基板; 在低温下形成在基板上的Ag以防止凝聚的栅极线，形成在栅极线上的第一栅极绝缘层，形成在第一栅极绝缘层上的第二栅极绝缘层，与栅极线垂直相交的数据线， 以及连接到栅极线和数据线的薄膜晶体管及其制造方法。

公开(公告)号：US08013325B2

公开(公告)日：2011-09-06

申请号：US11770171

申请日：2007-06-28

Applicant: Jong-Moo Huh ,  Kyu-Sik Cho ,  Kunal Girotra ,  Joo-Hoo Choi ,  Byoung-June Kim

Inventor： Jong-Moo Huh ,  Kyu-Sik Cho ,  Kunal Girotra ,  Joo-Hoo Choi ,  Byoung-June Kim

IPC: H01L35/24 ,  H01L51/00

CPC classification number: H01L27/1277 ,  H01L27/1214 ,  H01L27/3262

Abstract: The present invention relates to a thin film transistor, a method thereof and an organic light emitting device including the thin film transistor. According to an embodiment of the present invention, the thin film transistor includes a substrate, a control electrode, an insulating layer, a first electrode and a second electrode, a first ohmic contact layer and a second ohmic contact layer, and a semiconductor layer. The control electrode is formed on the substrate, and the insulating layer is formed on the control electrode. The first and the second electrodes are formed on the insulating layer. The first ohmic contact layer and the second ohmic contact layer are formed on the first electrode and the second electrode. The semiconductor layer is formed on the first ohmic contact layer and the second ohmic contact layer to fill between the first and the second electrodes.

Abstract translation: 薄膜晶体管及其制造方法技术领域本发明涉及薄膜晶体管及其制造方法以及包含该薄膜晶体管的有机发光元件。 根据本发明的实施例，薄膜晶体管包括基板，控制电极，绝缘层，第一电极和第二电极，第一欧姆接触层和第二欧姆接触层以及半导体层。 控制电极形成在基板上，绝缘层形成在控制电极上。 第一和第二电极形成在绝缘层上。 第一欧姆接触层和第二欧姆接触层形成在第一电极和第二电极上。 半导体层形成在第一欧姆接触层和第二欧姆接触层上以填充第一和第二电极之间。

公开(公告)号：US07696091B2

公开(公告)日：2010-04-13

申请号：US11675935

申请日：2007-02-16

Applicant: Kunal Girotra ,  Byoung-June Kim ,  Sung-Hoon Yang

Inventor： Kunal Girotra ,  Byoung-June Kim ,  Sung-Hoon Yang

IPC: H01L21/44

CPC classification number: H01L29/04 ,  H01L21/02488 ,  H01L21/02532 ,  H01L21/0262 ,  H01L27/1296

Abstract: A method of manufacturing a silicon layer includes pretreating a surface of a silicon nitride layer formed on a substrate through a plasma enhanced chemical vapor deposition method using a first reaction gas including at least one of silicone tetrafluoride (SiF4) gas, a nitrogen trifluoride (NF3) gas, SiF4—H2 gas and a mixture thereof. Then, a silicon layer is formed on the pretreated silicon nitride layer through the plasma enhanced chemical vapor deposition method using a second reaction gas including a mixture of gas including silicon tetrafluoride (SiF4), hydrogen (H2) and argon (Ar).

Abstract translation: 一种制造硅层的方法包括：使用包括四氟化硅（SiF 4）气体，三氟化氮（NF 3），氟化三氟化硼中的至少一种的第一反应气体，通过等离子体增强化学气相沉积法，对形成在基板上的氮化硅层的表面进行预处理 ）气体，SiF 4 -H 2气体及其混合物。 然后，使用包括四氟化硅（SiF 4），氢（H 2）和氩（Ar）的气体混合物的第二反应气体，通过等离子体增强化学气相沉积法在预处理的氮化硅层上形成硅层。

公开(公告)号：US07671364B2

公开(公告)日：2010-03-02

申请号：US11489144

申请日：2006-07-18

Applicant: Woo-jae Lee ,  Mun-pyo Hong ,  Byoung-june Kim ,  Sung-hoon Yang

Inventor： Woo-jae Lee ,  Mun-pyo Hong ,  Byoung-june Kim ,  Sung-hoon Yang

IPC: H01L29/786

CPC classification number: H01L27/12 ,  G02F1/133305 ,  H01L27/1248 ,  H01L29/7842 ,  H01L29/78603

Abstract: A thin film transistor (TFT) substrate comprises: a plastic insulation substrate; a first silicon nitride layer with a first refractive index, formed one surface of the plastic insulation substrate; and a TFT comprising a second silicon nitride layer formed with a second refractive index smaller than the first refractive index on the first silicon nitride layer. Thus, the present invention provides a TFT substrate wherein there is reduced a problem in that thin films are lifted from a plastic insulation substrate.

Abstract translation: 薄膜晶体管（TFT）基板包括：塑料绝缘基板; 具有第一折射率的第一氮化硅层，形成塑料绝缘基板的一个表面; 以及TFT，其包括在第一氮化硅层上形成的第二折射率小于第一折射率的第二氮化硅层。 因此，本发明提供一种TFT基板，其中减少了由塑料绝缘基板提起薄膜的问题。

公开(公告)号：US20080179598A1

公开(公告)日：2008-07-31

申请号：US12018750

申请日：2008-01-23

Applicant: Byoung-june KIM ,  Yong-mo Choi ,  Beohm-rock Choi ,  Sung-hoon Yang ,  Hwa-yeul Oh ,  Jae-ho Choi ,  Jong-moo Huh

Inventor： Byoung-june KIM ,  Yong-mo Choi ,  Beohm-rock Choi ,  Sung-hoon Yang ,  Hwa-yeul Oh ,  Jae-ho Choi ,  Jong-moo Huh

IPC: H01L29/04 ,  H01L21/336

CPC classification number: H01L27/1251 ,  H01L27/1214 ,  H01L27/127

Abstract: A display device includes an insulating substrate, a switching TFT formed on the substrate that receives a data voltage and that includes a first semiconductor layer, a driving TFT formed on the substrate that includes a control terminal connected to an output terminal of the switching TFT and a second semiconductor layer including polysilicon and a halogen material, an insulating layer formed on the switching TFT and the driving TFT, a first electrode formed on the insulating layer and electrically connected to an output terminal of the driving TFT, an organic light emitting layer formed on the first electrode, and a second electrode formed on the organic light emitting layer.

Abstract translation: 显示装置包括绝缘基板，形成在基板上的开关TFT，其接收数据电压，并且包括第一半导体层，形成在基板上的驱动TFT，该驱动TFT包括连接到开关TFT的输出端子的控制端子，以及 包括多晶硅和卤素材料的第二半导体层，形成在开关TFT和驱动TFT上的绝缘层，形成在绝缘层上并电连接到驱动TFT的输出端的第一电极，形成有机发光层 在第一电极上形成的第二电极和形成在有机发光层上的第二电极。