Hole forming by cross-shape image exposure
    31.
    发明授权
    Hole forming by cross-shape image exposure 有权
    通过十字形图像曝光形成的孔

    公开(公告)号:US06861176B2

    公开(公告)日:2005-03-01

    申请号:US10065003

    申请日:2002-09-09

    CPC classification number: G03F1/36 H01L21/76802

    Abstract: A method of forming holes in a layer through a cross-shape image exposure. The method includes removing a section from each corner of the rectangular patterns on a photomask to form cross-shape patterns so that circular or elliptical contact holes are formed on a photoresist layer after photo-exposure and development. Optical image contrast between contacts is increased by the cross-shape patterns on the photomask.

    Abstract translation: 通过十字形图像曝光在层中形成孔的方法。 该方法包括从光掩模上的矩形图案的每个角落去除一部分以形成十字形图案,使得在曝光和显影之后在光致抗蚀剂层上形成圆形或椭圆形的接触孔。 通过光掩模上的交叉形状图案增加了触点之间的光学图像对比度。

    Method of fabricating a stringerless flash memory
    32.
    发明授权
    Method of fabricating a stringerless flash memory 有权
    制造无闪光闪存的方法

    公开(公告)号:US06802322B2

    公开(公告)日:2004-10-12

    申请号:US10063129

    申请日:2002-03-25

    Applicant: Ching-Yu Chang

    Inventor: Ching-Yu Chang

    CPC classification number: H01L27/11521 H01L27/115

    Abstract: A stringer block is formed on the interface between a HDP silicon oxide layer and a silicon substrate. During an etching process for defining the profile of a floating gate, the stringer block functions to expose a bottom corner stringer. Following that, a polysilicon etching process effectively removes the bottom corner stringer. As a result, a stringerless flash memory cell is formed to prevent leakage currents, resulting from the bottom corner stringer, and improve both the reliability and data retention ability of the device.

    Abstract translation: 在HDP氧化硅层和硅衬底之间的界面上形成纵梁块。 在用于限定浮动门的轮廓的蚀刻工艺期间,纵梁块用于暴露底部拐角桁条。 之后,多晶硅蚀刻工艺有效地去除了底角拐角。 结果,形成了一个无弯曲的快闪存储单元,以防止由底角拐角引起的漏电流,并提高设备的可靠性和数据保留能力。

    Methods of code programming a mask ROM

    公开(公告)号:US06689663B1

    公开(公告)日:2004-02-10

    申请号:US10218101

    申请日:2002-08-12

    CPC classification number: H01L27/1126 H01L27/112

    Abstract: A method of code programming a mask read only memory (ROM) is disclosed. According to the method, a first photoresist layer is formed over word lines and a gate oxide layer of a substrate already having implanted bit lines. The first photoresist layer is patterned to develop pre-code openings over all of the memory cells, which correspond to intersecting word and bit lines. The first photoresist layer is then hardened using either a treatment implant or a treatment plasma. Subsequently, a second photoresist layer is formed over the first photoresist layer and patterned to develop real-code openings over memory cells which are actually to be coded with a logic “0” value. Each memory cell to be coded is then implanted with implants passing through the pre-code openings and the real code openings and into the memory cell.

    Method of wafer reclaim
    34.
    发明授权

    公开(公告)号:US06547647B2

    公开(公告)日:2003-04-15

    申请号:US09823994

    申请日:2001-04-03

    Applicant: Ching-Yu Chang

    Inventor: Ching-Yu Chang

    CPC classification number: H01L21/02032 B24B37/042

    Abstract: A method of wafer reclaim, at least includes: provide a wafer; perform a first semiconductor process to let both film layer and numerous particles are formed on the wafer; perform chemical mechanical polishing process to let part of film layer is removed and scales of part of particles are decreased; perform wet etching process to let both residual film layer and residual particles are further removed; perform cleaning process to let surface of wafer is cleaned; and perform second semiconductor process to let a semiconductor structure is formed on wafer. Furthermore, concepts of the invention that both film layer and particles are thoroughly removed by both chemical mechanical polishing process and wet etching process can be applied as a method for cleaning wafer and a method for planarizing wafer.

    Method of forming a conformal oxide film

    公开(公告)号:US06461981B1

    公开(公告)日:2002-10-08

    申请号:US09682340

    申请日:2001-08-22

    Applicant: Ching-Yu Chang

    Inventor: Ching-Yu Chang

    Abstract: A method that, using the surface-reaction mechanism of polysilicon in the chemical vapor deposition (CVD) process, starts in depositing a conformal first polysilicon layer on a uneven surface of a semiconductor wafer. The first polysilicon layer is then oxidized to a conformal first silicon oxide thin film. By repeating the previous two steps, a second polysilicon layer is formed on the surface of the first silicon oxide thin film and then oxidized to a second silicon oxide thin film with the required thickness. The conformal silicon oxide thin film formed by the method can be applied in structures of various devices in refined processes.

    Method for forming a protection device with slope laterals
    36.
    发明授权
    Method for forming a protection device with slope laterals 有权
    用坡口形成保护装置的方法

    公开(公告)号:US06436612B1

    公开(公告)日:2002-08-20

    申请号:US09712916

    申请日:2000-11-16

    Applicant: Ching-Yu Chang

    Inventor: Ching-Yu Chang

    CPC classification number: H01L27/11266 H01L21/31111 H01L27/112

    Abstract: A method for forming a protection device with slope laterals is provided. Firstly, providing a semiconductor substrate having a plurality of alternative first sacrificial layers and second sacrificial layers formed thereon. A first etching step is performed to remove one portion of each of the first sacrificial layers and thereby expose one portion of each lateral of each of the second sacrificial layers. Subsequently, performing a second etching step to remove one portion of the lateral of the second sacrificial layer. Then, repeatedly and alternately performing the first etching step and the second etching step until completely removing the first sacrificial layers and then obtaining a plurality of protection devices formed of the second sacrificial layers each of which having slope laterals.

    Abstract translation: 提供了一种用于形成具有边坡的保护装置的方法。 首先,提供具有多个替代的第一牺牲层和形成在其上的第二牺牲层的半导体衬底。 执行第一蚀刻步骤以去除每个第一牺牲层的一部分,从而暴露每个第二牺牲层的每个横向的一部分。 随后,执行第二蚀刻步骤以去除第二牺牲层的横向的一部分。 然后,重复地且交替地执行第一蚀刻步骤和第二蚀刻步骤,直到完全去除第一牺牲层,然后获得由具有斜面的第二牺牲层形成的多个保护装置。

    Method of fabricating gate
    37.
    发明授权
    Method of fabricating gate 有权
    门的制作方​​法

    公开(公告)号:US06300196B1

    公开(公告)日:2001-10-09

    申请号:US09734406

    申请日:2000-12-11

    Applicant: Ching-Yu Chang

    Inventor: Ching-Yu Chang

    CPC classification number: H01L28/92 H01L21/28273 H01L21/32139 H01L29/66545

    Abstract: A method of fabricating a gate is described. A first dielectric layer having a first opening is formed on a substrate. A gate dielectric layer is formed in the opening. A lower portion of a floating gate is formed on the gate dielectric layer. A source/drain region is formed in the substrate beside the lower portion of the floating gate. A conductive layer is formed on the first dielectric layer to completely fill the first opening. The conductive layer is patterned to form a second opening in the conductive layer. The second opening is above the first opening and does not expose the first dielectric layer. The second opening has a tapered sidewall and a predetermined depth. A mask layer is formed to cover the conductive layer and fill the second opening. The mask layer outside the second opening is removed to expose the conductive layer. A portion of the mask layer is removed to leave a first etching mask layer in the second opening. An anisotropic etching process using the first etching mask layer as a mask is performed to etch the conductive layer. An upper portion of the floating gate is formed. The first dielectric layer is exposed. The first etching mask is removed. Thereafter, a dielectric layer between gates and a control gate is formed over the floating gate.

    Abstract translation: 描述了制造栅极的方法。 具有第一开口的第一介电层形成在基板上。 在开口中形成栅极电介质层。 浮栅的下部形成在栅介质层上。 源极/漏极区域形成在浮置栅极的下部旁边的衬底中。 在第一电介质层上形成导电层以完全填充第一开口。 将导电层图案化以在导电层中形成第二开口。 第二开口位于第一开口的上方,并且不暴露第一电介质层。 第二开口具有锥形侧壁和预定深度。 形成掩模层以覆盖导电层并填充第二开口。 除去第二开口外面的掩模层以露出导电层。 去除掩模层的一部分以在第二开口中留下第一蚀刻掩模层。 执行使用第一蚀刻掩模层作为掩模的各向异性蚀刻工艺来蚀刻导电层。 形成浮栅的上部。 第一介电层被暴露。 第一蚀刻掩模被去除。 此后,在浮栅之间形成栅极和控制栅极之间的电介质层。

    Method for drying a semiconductor wafer
    38.
    发明授权
    Method for drying a semiconductor wafer 有权
    干燥半导体晶片的方法

    公开(公告)号:US06289605B1

    公开(公告)日:2001-09-18

    申请号:US09506391

    申请日:2000-02-18

    Applicant: Ching-Yu Chang

    Inventor: Ching-Yu Chang

    CPC classification number: H01L21/02063

    Abstract: The present invention provides a drying method for removing a residual solution from a semiconductor wafer. The semiconductor wafer is placed into a chamber, and then the air pressure of the chamber is lowered from atmospheric pressure to a lower pressure. Next, an inert gas with a predetermined pressure is injected into the chamber to exchange with the dissolved oxygen in the residual solution. The pressure in the chamber is reduced to 0.5˜100 torr so as to lower the boiling point of the solution and to remove the displaced oxygen. Finally, a heating process is performed to completely evaporate the residual solution on the semiconductor wafer.

    Abstract translation: 本发明提供了从半导体晶片去除残留溶液的干燥方法。 将半导体晶片放入室中,然后将室的空气压力从大气压降至较低的压力。 接下来,将具有预定压力的惰性气体注入到室中以与残留溶液中的溶解氧交换。 将室内的压力降低至0.5〜100乇,以降低溶液的沸点并除去置换的氧气。 最后,进行加热处理以完全蒸发半导体晶片上的残余溶液。

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