Abstract:
A circuit arrangement for connecting a bus participant to at least one bus, having an interface for connecting the bus participant to the circuit arrangement, a first bus input, and a first bus output between which the bus participant is switchable via the interface. The circuit arrangement includes a second bus input and output for connecting the bus to the circuit arrangement in a ring topology in such a way that the first bus output is connected at least indirectly to the second bus input and the second bus output is connected at least indirectly to the first bus input via the bus. The bus in the circuit arrangement can be separated to obtain a line topology and can be configured as bus-terminating at one of the bus inputs or bus outputs. A system for the functional testing of bus participants on a bus in a simulation environment is provided.
Abstract:
A method for calculating a desired trajectory for a vehicle is provided. The vehicle is located at a position on a road bounded by two road edges, wherein the road edges are known at least in a region around the position of the vehicle. A spring-mass model is introduced, wherein the spring-mass model is used for calculating the desired trajectory, wherein the positions of the point masses are calculated for a rest state of the spring-mass model, and the calculated positions of the point masses are used as data points for the calculation of a curve connecting the point masses, whereby the curve represents the desired trajectory.
Abstract:
A computer-implemented method for editing data object variants of at least one software tool is described and presented, whereby the data object variants have at least one common software/hardware attribute and in each case a configuration of the attribute. It is possible to react to changing configurations of hardware attributes of different data object variants and thereby to changing matching groups during the editing of a data object variant in that for at least one attribute matching configurations of the attribute in different data object variants are captured and that for the attribute information on matching groups of data object variants is stored with the matching configurations of the attribute.
Abstract:
A test bench for testing a distance radar instrument for determining distance and speed of obstacles, comprising a radar emulation device comprising at least one radar antenna and a computer unit with a model of the surroundings, wherein the model of the surroundings comprises data (x, v) of at least one obstacle with a relative position and speed from the distance radar instrument, wherein the radar emulation device emits a suitable reflection radar signal on the basis of the relative position and speed predetermined by the model of the surroundings at least partly in the direction of the distance radar instrument after receiving a scanning radar signal from the distance radar instrument such that the distance radar instrument detects an obstacle with a predetermined relative position and speed, wherein the radar emulation device extends over an angular range in front of the distance radar instrument such that the obstacle with relative position and speed can be simulated in this angular range with mutually distinguishable angles and wherein the radar emulation device comprises a multiplicity of stationary radar antennas which are distributed over the angular range.
Abstract:
A method for configuring an interface unit of a computer system with a first processor and a second processor stored in the interface unit. A data link is set up between the first processor and the second processor. A peripheral of the computer system is configured to store input data in an input data channel and to read output data from an output data channel, and the second processor is configured to read the input data from the input data channel and to store output data in the output data channel. A sequence of processor commands for the second processor is created such that a number of subsequences is created.
Abstract:
A computer-implemented method for automatic generation of at least one block representing a driver function for a block-based modeling environment, wherein the driver function serves to control a hardware element of a target hardware unit, the method including preparing a description of the driver function in a formal language, reading in and evaluating the formal-language description of the driver function, and generating the block representing the driver function for modeling of the driver function in a block diagram of the modeling environment.
Abstract:
A computer-based system and method for assigning at least one signal of a symbol-based program to at least one I/O functionality of a target hardware unit is provided. A modeling tool has a symbol-based program with the signal that is to be assigned. The signal to be assigned of the symbol-based program and the at least one I/O functionality of the target hardware unit are specified in a configuration tool. Using the modeling tool, an I/O functionality of the target hardware unit is assigned in the symbol-based program to the signal that is to be assigned. A signal assignment information item is generated in the modeling tool from this assignment. The signal assignment information item is transmitted from the modeling tool to the configuration tool, and the configuration tool takes over the assignment to the I/O functionality of the target hardware unit of the signal to be assigned of the symbol-based program according to the signal assignment information item.
Abstract:
A method for accessing a signal value of an FPGA at runtime, including the steps of loading an FPGA hardware configuration into the FPGA, executing the FPGA hardware configuration in the FPGA, requesting a signal value of the FPGA, sending status data from a functional level of the FPGA to a configuration memory in its configuration level, reading the status data from the configuration memory as readback data, and determining the signal value of the readback data. A method is also provided for making an FPGA build, based on an FPGA model, using a hardware description language, including the steps of creating an FPGA hardware configuration, identifying memory locations of a configuration memory for status data of at least one signal value based on the FPGA hardware configuration, and creating a list with signal values accessible at runtime and the memory locations corresponding thereto.
Abstract:
A computer-implemented method for managing at least one data element in control unit development, the method allows uniform management of data elements over the entire development process by providing a management unit having a user interface, associating the data element with the management unit, and associating an access configuration with the management unit. The access configuration defines the accessibility of the data element by a user via the user interface.
Abstract:
An encryption method is provided that has a software model of a technical system, the model including software components is encrypted by a public key and a decryption structure, wherein the latter includes definitions of component groups of the software model. The decryption structure is integrated at least partially into the encrypted software model. Correspondingly, in a decryption method according to the invention, via a secret key that likewise comprises definitions of component groups, only the particular component groups are decrypted whose definitions the secret key includes in agreement with the definitions of the encrypted software model. The definitions of the secret key can be extended after the fact by a key extension, so that additional component groups can be decrypted with an extended secret key.