ESTIMATING FLASH QUALITY USING SELECTIVE ERROR EMPHASIS
    31.
    发明申请
    ESTIMATING FLASH QUALITY USING SELECTIVE ERROR EMPHASIS 有权
    使用选择性错误来评估闪光质量

    公开(公告)号:US20160092284A1

    公开(公告)日:2016-03-31

    申请号:US14501081

    申请日:2014-09-30

    Applicant: APPLE INC.

    Abstract: A method for data storage includes reading from a memory device data that is stored in a group of memory cells as respective analog values, and classifying readout errors in the read data into at least first and second different types, depending on zones in which the analog values fall. A memory quality that emphasizes the readout errors of the second type is assigned to the group of the memory cells, based on evaluated numbers of the readout errors of the first and second types.

    Abstract translation: 一种用于数据存储的方法包括:从存储器件读取作为相应模拟值存储在一组存储器单元中的数据,并将读出的数据中的读出错误分类为至少第一和第二不同类型,这取决于模拟 价值下降。 基于第一和第二类型的读出错误的评估数,将强调第二类型的读出错误的存储器质量分配给存储器单元组。

    Distortion estimation and cancellation in memory devices

    公开(公告)号:US09292381B2

    公开(公告)日:2016-03-22

    申请号:US14090431

    申请日:2013-11-26

    Applicant: Apple Inc.

    CPC classification number: G06F11/1068 G06F11/1016 G11C16/26

    Abstract: A method for operating a memory (28) includes storing data in a group of analog memory cells (32) of the memory as respective first voltage levels. After storing the data, second voltage levels are read from the respective analog memory cells. The second voltage levels are affected by cross-coupling interference causing the second voltage levels to differ from the respective first voltage levels. Cross-coupling coefficients, which quantify the cross-coupling interference among the analog memory cells, are estimated by processing the second voltage levels. The data stored in the group of analog memory cells is reconstructed from the read second voltage levels using the estimated cross-coupling coefficients.

    Fast secure erasure schemes for non-volatile memory
    33.
    发明授权
    Fast secure erasure schemes for non-volatile memory 有权
    用于非易失性存储器的快速安全擦除方案

    公开(公告)号:US09098401B2

    公开(公告)日:2015-08-04

    申请号:US13683569

    申请日:2012-11-21

    Applicant: Apple Inc.

    Abstract: A method includes, in a memory with multiple analog memory cells, storing one or more data pages in respective groups of the memory cells using a first programming configuration having a first storage speed. Upon receiving a request to securely erase a data page from the memory, one or more of the memory cells in a group that stores the data page are re-programmed using a second programming configuration having a second storage speed that is faster than the first storage speed.

    Abstract translation: 一种方法包括在具有多个模拟存储器单元的存储器中,使用具有第一存储速度的第一编程配置在存储器单元的相应组中存储一个或多个数据页。 在接收到从存储器安全地擦除数据页面的请求时,使用具有比第一存储器快的第二存储速度的第二编程配置来重新编程存储数据页面的组中的一个或多个存储器单元 速度。

    PROTECTION AGAINST WORD LINE FAILURE IN MEMORY DEVICES
    34.
    发明申请
    PROTECTION AGAINST WORD LINE FAILURE IN MEMORY DEVICES 审中-公开
    对存储器件中的字线故障进行保护

    公开(公告)号:US20150128010A1

    公开(公告)日:2015-05-07

    申请号:US14595578

    申请日:2015-01-13

    Applicant: Apple Inc.

    Abstract: A method for data storage includes providing a mapping of data pages to physical pages, in which each physical page holds a non-integer number of the data pages, for storage of data in at least one memory block, including a plurality of the physical pages, in a memory device. The data pages that are mapped to the memory block are partitioned into groups, such that failure of any memory unit, which consists of a predefined number of the physical pages in the memory device, will produce errors in no more than one data page in each group. The data pages is stored in the physical pages of the memory block in accordance with the mapping, while a redundant storage scheme is applied among the data pages of each group.

    Abstract translation: 一种用于数据存储的方法包括提供数据页到物理页面的映射,其中每个物理页面保存非整数个数据页,用于将数据存储在至少一个存储块中,包括多个物理页面 ,在存储设备中。 映射到存储器块的数据页被划分成组,使得由存储器设备中的预定数量的物理页组成的任何存储器单元的故障将在每个不超过一个数据页面中产生错误 组。 根据映射将数据页存储在存储器块的物理页面中,同时在每个组的数据页之间应用冗余存储方案。

    DATA STORAGE IN ANALOG MEMORY CELLS ACROSS WORD LINES USING A NON-INTEGER NUMBER OF BITS PER CELL
    35.
    发明申请
    DATA STORAGE IN ANALOG MEMORY CELLS ACROSS WORD LINES USING A NON-INTEGER NUMBER OF BITS PER CELL 审中-公开
    数据存储在模拟记忆体细胞中,使用非整数个单位数的字线

    公开(公告)号:US20140347924A1

    公开(公告)日:2014-11-27

    申请号:US14318876

    申请日:2014-06-30

    Applicant: Apple Inc.

    Abstract: A method for data storage includes accepting data for storage in an array of analog memory cells, which are arranged in rows associated with respective word lines. At least a first page of the data is stored in a first row of the array, and at least a second page of the data is stored in a second row of the array, having a different word line from the first row. After storing the first and second pages, a third page of the data is stored jointly in the first and second rows.

    Abstract translation: 一种用于数据存储的方法包括接收用于存储在与相应字线相关联的行中的模拟存储器单元阵列中的数据。 数据的至少第一页被存储在阵列的第一行中,并且数据的至少第二页被存储在阵列的第二行中,具有与第一行不同的字线。 在存储第一页和第二页之后,数据的第三页共同存储在第一行和第二行中。

    CALCULATION OF ANALOG MEMORY CELL READOUT PARAMETERS USING CODE WORDS STORED OVER MULTIPLE MEMORY DIES
    36.
    发明申请
    CALCULATION OF ANALOG MEMORY CELL READOUT PARAMETERS USING CODE WORDS STORED OVER MULTIPLE MEMORY DIES 有权
    使用存储在多个存储器中的代码字来计算模拟存储器单元读出参数

    公开(公告)号:US20140331106A1

    公开(公告)日:2014-11-06

    申请号:US13874995

    申请日:2013-05-01

    Applicant: APPLE INC.

    Abstract: A method includes, in a memory that includes two or more memory units, storing a code word of an Error Correction Code (ECC) that is representable by a plurality of check equations, such that a first part of the code word is stored in a first memory unit and a second part of the code word is stored in a second memory unit. A subset of the check equations, which operate only on code word bits belonging to the first part stored in the first memory unit, is identified. The first part of the code word is retrieved from the first memory unit, and a count of the check equations in the identified subset that are not satisfied by the retrieved first part of the code word is evaluated. One or more readout parameters, for readout from the first memory unit, are set depending on the evaluated count.

    Abstract translation: 一种方法包括在包括两个或多个存储器单元的存储器中,存储可由多个检验方程表示的纠错码(ECC)的代码字,使得代码字的第一部分被存储在 第一存储单元和码字的第二部分被存储在第二存储单元中。 识别仅对属于存储在第一存储器单元中的第一部分的代码字位操作的检验方程的子集。 从第一存储器单元检索代码字的第一部分,并且对所检索的代码字的第一部分不满足的所识别的子集中的检验方程的计数进行评估。 根据评估计数来设定用于从第一存储器单元读出的一个或多个读出参数。

    PROGRAMMING SCHEMES FOR 3-D NON-VOLATILE MEMORY
    37.
    发明申请
    PROGRAMMING SCHEMES FOR 3-D NON-VOLATILE MEMORY 有权
    3-D非易失性存储器的编程方案

    公开(公告)号:US20140269051A1

    公开(公告)日:2014-09-18

    申请号:US13804427

    申请日:2013-03-14

    Applicant: APPLE INC.

    CPC classification number: G11C16/10 G11C11/5628 G11C16/3427

    Abstract: A method includes providing data for storage in a memory, which includes multiple analog memory cells arranged in a three-dimensional (3-D) configuration having a first dimension associated with bit lines, a second dimension associated with word lines, and a third dimension associated with sections. The data is stored in the memory cells in accordance with a programming order that alternates among the sections, including storing a first portion of the data in a first section, then storing a second portion of the data in a second section different from the first section, and then storing a third portion of the data in the first section.

    Abstract translation: 一种方法包括提供用于存储在存储器中的数据,其包括以具有与位线相关联的第一维度的三维(3-D)配置布置的多个模拟存储器单元,与字线相关联的第二维度,以及第三维度 与部分相关联。 根据在这些部分之间交替的编程顺序将数据存储在存储器单元中,包括在第一部分中存储数据的第一部分,然后将数据的第二部分存储在与第一部分不同的第二部分中 ,然后将数据的第三部分存储在第一部分中。

    Applications for inter-word-line programming
    38.
    发明授权
    Applications for inter-word-line programming 有权
    字间编程应用

    公开(公告)号:US08837214B2

    公开(公告)日:2014-09-16

    申请号:US13709303

    申请日:2012-12-10

    Applicant: Apple Inc.

    Abstract: A method includes, in an array of analog memory cells that are arranged in rows associated with respective word lines, reading a first group of the memory cells in a selected word line, including one or more memory cells that store a status of at least one word line in the array other than the selected word line. A readout configuration for a second group of the memory cells is set responsively to the read status. The second group of the memory cells is read using the readout configuration.

    Abstract translation: 一种方法包括在与各个字线相关联的行中排列的模拟存储器单元的阵列中,读取选定字线中的第一组存储器单元,包括存储至少一个状态的一个或多个存储器单元 数组中除字线以外的所选字线。 响应于读取状态设置第二组存储器单元的读出配置。 使用读出配置读取第二组存储单元。

    EFFICIENT SUSPEND-RESUME OPERATION IN MEMORY DEVICES
    39.
    发明申请
    EFFICIENT SUSPEND-RESUME OPERATION IN MEMORY DEVICES 有权
    在存储器件中有效的暂停操作

    公开(公告)号:US20140215175A1

    公开(公告)日:2014-07-31

    申请号:US13755547

    申请日:2013-01-31

    Applicant: APPLE INC.

    CPC classification number: G06F13/161 G06F13/24 G06F13/26

    Abstract: A method includes executing a first memory access operation in a memory. A progress indication, which is indicative of a progress of execution of the first memory access operation, is obtained from the memory. Based on the progress indication, a decision is made whether to suspend the execution of the first memory access operation in order to execute a second memory access operation.

    Abstract translation: 一种方法包括在存储器中执行第一存储器访问操作。 从存储器获得指示执行第一存储器存取操作的进度指示。 基于进度指示,决定是否暂停执行第一存储器访问操作以便执行第二存储器访问操作。

    Fast analog memory cell readout using modified bit-line charging configurations
    40.
    发明授权
    Fast analog memory cell readout using modified bit-line charging configurations 有权
    使用修改的位线充电配置快速模拟存储单元读数

    公开(公告)号:US08787057B2

    公开(公告)日:2014-07-22

    申请号:US13709656

    申请日:2012-12-10

    Applicant: Apple Inc.

    CPC classification number: G06F12/00 G06F12/02

    Abstract: A method for data storage includes providing at least first and second readout schemes for reading storage values from a group of analog memory cells that are connected to respective bit lines. The first readout scheme reads the storage values using a first bit line charging configuration having a first sense time, and the second readout scheme reads the storage values using a second bit line charging configuration having a second sense time, shorter than the first sense time. A condition is evaluated with respect to a read operation that is to be performed over a group of the memory cells. One of the first and second readout schemes is selected responsively to the evaluated condition. The storage values are read from the group of the memory cells using the selected readout scheme.

    Abstract translation: 一种用于数据存储的方法包括提供至少第一和第二读出方案,用于从连接到各个位线的一组模拟存储器单元读取存储值。 第一读出方案使用具有第一感测时间的第一位线充电配置读取存储值,并且第二读出方案使用比第一感测时间短的具有第二感测时间的第二位线充电配置来读取存储值。 针对要在一组存储器单元上执行的读取操作来评估条件。 响应于评估条件选择第一和第二读出方案中的一个。 使用所选择的读出方案从存储器单元的组中读取存储值。

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