Statistical peak-current management in non-volatile memory devices
    4.
    发明授权
    Statistical peak-current management in non-volatile memory devices 有权
    非易失性存储器件的统计峰值电流管理

    公开(公告)号:US09361951B2

    公开(公告)日:2016-06-07

    申请号:US14468661

    申请日:2014-08-26

    Applicant: Apple Inc.

    Abstract: A method includes, in a storage system that includes multiple memory devices, holding a definition of a given type of storage command. Multiple storage commands of the given type are executed in the memory devices, such that an actual current consumption of each storage command deviates from a nominal current waveform defined for the given type by no more than a predefined deviation, and such that each storage command is preceded by a random delay.

    Abstract translation: 一种方法包括在包括多个存储设备的存储系统中,保持给定类型的存储命令的定义。 给定类型的多个存储命令在存储器件中被执行,使得每个存储命令的实际电流消耗偏离为给定类型定义的额定电流波形不超过预定义的偏差,并且使得每个存储命令是 之前是随机延迟。

    METHOD TO ENHANCE PROGRAMMING PERFORMANCE IN MULTILEVEL NVM DEVICES
    6.
    发明申请
    METHOD TO ENHANCE PROGRAMMING PERFORMANCE IN MULTILEVEL NVM DEVICES 有权
    提高多级NVM设备编程性能的方法

    公开(公告)号:US20160070473A1

    公开(公告)日:2016-03-10

    申请号:US14479732

    申请日:2014-09-08

    Applicant: Apple Inc.

    Abstract: An apparatus includes an interface and a processor. The interface is configured to communicate with a memory device. The processor is configured to send to the memory device, via the interface, a sequence of write commands that program multiple types of memory pages that incur respective different programming durations in the memory device, while inserting in the sequence suspension periods for permitting execution of storage commands that are not part of the sequence, such that at least some of the suspension periods are followed by write commands of types that do not have a shortest programming duration among the programming durations.

    Abstract translation: 一种装置包括接口和处理器。 该接口被配置为与存储器设备通信。 处理器被配置为经由接口向存储器设备发送一系列写入命令,该命令编程在存储器设备中引起相应不同编程持续时间的多种类型的存储器页面,同时在序列中插入用于允许执行存储的暂停时段 不是序列的一部分的命令,使得至少一些暂停时间段之后是在编程持续时间中不具有最短编程持续时间的类型的写入命令。

    MULTI-PHASE PROGRAMMING SCHEMES FOR NONVOLATILE MEMORIES
    7.
    发明申请
    MULTI-PHASE PROGRAMMING SCHEMES FOR NONVOLATILE MEMORIES 有权
    非易失性存储器的多相编程方案

    公开(公告)号:US20160062907A1

    公开(公告)日:2016-03-03

    申请号:US14475609

    申请日:2014-09-03

    Applicant: Apple Inc.

    Abstract: A method for data storage includes defining an end-to-end mapping between data bits to be stored in a memory device that includes multiple memory cells and predefined programming levels. The data bits are mapped into mapped bits, so that the number of the mapped bits is smaller than the number of the data bits. The data bits are stored in the memory device by programming the mapped bits in the memory cells using a programming scheme that guarantees the end-to-end mapping. After storing the data bits, the data bits are read from the memory device in accordance with the end-to-end mapping.

    Abstract translation: 一种用于数据存储的方法包括定义要存储在包括多个存储器单元和预定义编程级别的存储器件中的数据位之间的端对端映射。 数据位被映射到映射比特中,使得映射比特的数量小于数据比特数。 通过使用保证端对端映射的编程方案对存储器单元中的映射位进行编程,将数据位存储在存储器件中。 在存储数据位之后,根据端对端映射从存储器件读取数据位。

    ORPHAN BLOCK MANAGEMENT IN NON-VOLATILE MEMORY DEVICES
    8.
    发明申请
    ORPHAN BLOCK MANAGEMENT IN NON-VOLATILE MEMORY DEVICES 有权
    非易失性存储器件中的ORPHAN块管理

    公开(公告)号:US20160034341A1

    公开(公告)日:2016-02-04

    申请号:US14447114

    申请日:2014-07-30

    Applicant: Apple Inc.

    Abstract: A system for data storage includes one or more non-volatile memory (NVM) devices, each device including multiple memory blocks, and a processor. The processor is configured to assign the memory blocks into groups, to apply a redundant data storage scheme in each of the groups, to identify a group of the memory blocks including at least one bad block that renders remaining memory blocks in the group orphan blocks, to select a type of data suitable for storage in the orphan blocks, and to store the data of the identified type in the orphan blocks.

    Abstract translation: 用于数据存储的系统包括一个或多个非易失性存储器(NVM)设备,每个设备包括多个存储器块,以及处理器。 处理器被配置为将存储块分配成组,以在每个组中应用冗余数据存储方案,以识别包括至少一个在组孤立块中呈现剩余存储块的坏块的存储器块组, 选择适合在孤儿块中存储的数据类型,并将识别类型的数据存储在孤儿块中。

    Applications for inter-word-line programming
    9.
    发明授权
    Applications for inter-word-line programming 有权
    字间编程应用

    公开(公告)号:US09230680B2

    公开(公告)日:2016-01-05

    申请号:US14450903

    申请日:2014-08-04

    Applicant: Apple Inc.

    Abstract: A method includes, in an array of analog memory cells that are arranged in rows associated with respective word lines, reading a first group of the memory cells in a selected word line, including one or more memory cells that store a status of at least one word line in the array other than the selected word line. A readout configuration for a second group of the memory cells is set responsively to the read status. The second group of the memory cells is read using the readout configuration.

    Abstract translation: 一种方法包括在与各个字线相关联的行中排列的模拟存储器单元的阵列中,读取选定字线中的第一组存储器单元,包括存储至少一个状态的一个或多个存储器单元 数组中除字线以外的所选字线。 响应于读取状态设置第二组存储器单元的读出配置。 使用读出配置读取第二组存储单元。

    RECOVERY FROM PROGRAMMING FAILURE IN NON-VOLATILE MEMORY
    10.
    发明申请
    RECOVERY FROM PROGRAMMING FAILURE IN NON-VOLATILE MEMORY 审中-公开
    从非易失性存储器中的编程故障恢复

    公开(公告)号:US20150355858A1

    公开(公告)日:2015-12-10

    申请号:US14821008

    申请日:2015-08-07

    Applicant: Apple Inc.

    Abstract: A method includes storing data encoded with an Error Correction Code (ECC) in analog memory cells, by buffering the data in a volatile buffer and then writing the buffered data to the analog memory cells while overwriting at least some of the data in the volatile buffer with success indications. Upon detecting a failure in writing the buffered data to the analog memory cells, recovered data is produced by reading both the volatile buffer and the analog memory cells, assigning reliability metrics to respective bits of the recovered data depending on whether the bits were read from the volatile buffer or from the analog memory cells, and applying ECC decoding to the recovered data using the reliability metrics. The recovered data is re-programmed.

    Abstract translation: 一种方法包括通过将数据缓冲在易失性缓冲器中来将数据编码的纠错码(ECC)存储在模拟存储器单元中,然后将缓冲的数据写入模拟存储器单元,同时重写易失性缓冲器中的至少一些数据 有成功迹象。 在检测到将缓冲数据写入模拟存储器单元的故障时,通过读取易失性缓冲器和模拟存储器单元来产生恢复的数据,根据是否从 易失性缓冲器或来自模拟存储器单元,以及使用可靠性度量将ECC解码应用于恢复的数据。 恢复的数据被重新编程。

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