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公开(公告)号:US11763856B2
公开(公告)日:2023-09-19
申请号:US17323165
申请日:2021-05-18
Applicant: Applied Materials, Inc.
Inventor: Sung-Kwan Kang , Gill Yong Lee , Chang Seok Kang
CPC classification number: G11C5/063 , H10B12/03 , H10B12/30 , H10B12/482 , H10B12/488
Abstract: Memory devices are described. The memory devices include a plurality of bit lines extending through a stack of alternating memory layers and dielectric layers. Each of the memory layers include a first word line, a second word line, a first capacitor, and a second capacitor. Methods of forming stacked memory devices are also described.
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公开(公告)号:US20230146831A1
公开(公告)日:2023-05-11
申请号:US17902838
申请日:2022-09-04
Applicant: Applied Materials, Inc.
Inventor: Chang Seok Kang , Gill Yong Lee , Fred Fishburn , Tomohiko Kitajima , Sung-Kwan Kang , Sony Varghese
IPC: H01L23/528 , H01L23/535 , H01L21/768
CPC classification number: H01L23/5283 , H01L21/76816 , H01L21/76895 , H01L23/535
Abstract: A semiconductor manufacturing process for forming a three-dimensional (3D) memory structure and a semiconductor device having a 3D memory structure is described. The 3D memory structure comprises layers of memory cells with L shaped conductive layers where the L shaped conductive layers of each layer are coupled to metal lines disposed above the top or upper most layer such that the memory cells in each layer can be coupled to control circuitry.
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公开(公告)号:US11545504B2
公开(公告)日:2023-01-03
申请号:US17228034
申请日:2021-04-12
Applicant: APPLIED MATERIALS, INC.
Inventor: Takehito Koshizawa , Mukund Srinivasan , Tomohiko Kitajima , Chang Seok Kang , Sung-Kwan Kang , Gill Y. Lee , Susmit Singha Roy
IPC: H01L27/1157 , H01L27/11582
Abstract: Methods and apparatus for forming a plurality of nonvolatile memory cells are provided herein. In some embodiments, the method, for example, includes forming a plurality of nonvolatile memory cells, comprising forming, on a substrate, a stack of alternating layers of metal including a first layer of metal and a second layer of metal different from the first layer of metal; removing the first layer of metal to form spaces between the alternating layers of the second layer of metal; and one of depositing a first layer of material to partially fill the spaces to leave air gaps therein or depositing a second layer of material to fill the spaces.
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公开(公告)号:US11171141B2
公开(公告)日:2021-11-09
申请号:US16804226
申请日:2020-02-28
Applicant: Applied Materials, Inc.
Inventor: Priyadarshi Panda , Seshadri Ganguli , Sang Ho Yu , Sung-Kwan Kang , Gill Yong Lee , Sanjay Natarajan , Rajib Lochan Swain , Jorge Pablo Fernandez
IPC: H01L27/108
Abstract: Methods of forming memory devices are described. Some embodiments of the disclosure utilize a low temperature anneal process to reduce bottom voids and seams in low melting point, low resistance metal buried word lines. Some embodiments of the disclosure utilize a high density dielectric cap during a high temperature anneal process to reduce bottom voids in buried word lines.
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公开(公告)号:US11587796B2
公开(公告)日:2023-02-21
申请号:US17147578
申请日:2021-01-13
Applicant: Applied Materials, Inc.
Inventor: Chang Seok Kang , Tomohiko Kitajima , Sung-Kwan Kang
IPC: H01L21/321 , H01L27/11582 , H01L21/768 , H01L23/522
Abstract: Memory devices and methods of manufacturing memory devices are provided. The device and methods described suppress oxidation of metal layers exposed to ambient oxygen. After an opening is formed, a nitridation process occurs to nitridate the surface of the exposed metal layer inside the opening. The nitridated region formed on the surface of metal layer inside the opening works as a barrier layer for oxygen diffusion. In addition, the nitridated region works as an electrode for charge trap memory cells.
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公开(公告)号:US20220319601A1
公开(公告)日:2022-10-06
申请号:US17705744
申请日:2022-03-28
Applicant: Applied Materials, Inc.
Inventor: Chang Seok Kang , Tomohiko Kitajima , Gill Yong Lee , Qian Fu , Sung-Kwan Kang , Takehito Koshizawa , Fredrick Fishburn
IPC: G11C16/04 , H01L27/11582 , H01L27/11556 , H01L27/11524 , H01L27/1157
Abstract: Described is a memory string including at least one select gate for drain (SGD) transistor and at least one memory transistor in a vertical hole extending through a memory stack on a substrate. The memory stack comprises alternating word lines and dielectric material. There is at least one select-gate-for-drain (SGD) transistor in a first vertical hole extending through the memory stack, the select-gate-for-drain (SGD) transistor comprising a first gate material. At least one memory transistor is in a second vertical hole extending through the memory stack, the at least one memory transistor comprising a second gate material different from the first gate material.
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公开(公告)号:US11295786B2
公开(公告)日:2022-04-05
申请号:US16779830
申请日:2020-02-03
Applicant: Applied Materials, Inc.
Inventor: Chang Seok Kang , Tomohiko Kitajima , Gill Yong Lee , Sanjay Natarajan , Sung-Kwan Kang , Lequn Liu
IPC: H01L27/108 , H01L21/8242 , G11C5/06
Abstract: Memory devices are described. The memory devices include a plurality of bit lines extending through a stack of alternating memory layers and dielectric layers. Each of the memory layers comprises a single crystalline-like silicon layer and includes a first word line, a second word line, a first capacitor, and a second capacitor. Methods of forming stacked memory devices are also described.
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公开(公告)号:US20210272604A1
公开(公告)日:2021-09-02
申请号:US17323165
申请日:2021-05-18
Applicant: Applied Materials, Inc.
Inventor: Sung-Kwan Kang , Gill Yong Lee , Chang Seok Kang
IPC: G11C5/06 , H01L27/108
Abstract: Memory devices are described. The memory devices include a plurality of bit lines extending through a stack of alternating memory layers and dielectric layers. Each of the memory layers include a first word line, a second word line, a first capacitor, and a second capacitor. Methods of forming stacked memory devices are also described.
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公开(公告)号:US20210257375A1
公开(公告)日:2021-08-19
申请号:US17228034
申请日:2021-04-12
Applicant: APPLIED MATERIALS, INC.
Inventor: Takehito Koshizawa , Mukund Srinivasan , Tomohiko Kitajima , Chang Seok Kang , Sung-Kwan Kang , Gill Y. Lee , Susmit Singha Roy
IPC: H01L27/1157 , H01L27/11582
Abstract: Methods and apparatus for forming a plurality of nonvolatile memory cells are provided herein. In some embodiments, the method, for example, includes forming a plurality of nonvolatile memory cells, comprising forming, on a substrate, a stack of alternating layers of metal including a first layer of metal and a second layer of metal different from the first layer of metal; removing the first layer of metal to form spaces between the alternating layers of the second layer of metal; and one of depositing a first layer of material to partially fill the spaces to leave air gaps therein or depositing a second layer of material to fill the spaces.
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公开(公告)号:US20210233918A1
公开(公告)日:2021-07-29
申请号:US17227925
申请日:2021-04-12
Applicant: APPLIED MATERIALS, INC.
Inventor: Takehito Koshizawa , Mukund Srinivasan , Tomohiko Kitajima , Chang Seok Kang , Sung-Kwan Kang , Gill Y. Lee , Susmit Singha Roy
IPC: H01L27/1157 , H01L27/11582
Abstract: Methods and apparatus for forming a plurality of nonvolatile memory cells are provided herein. In some embodiments, the method, for example, includes forming a plurality of nonvolatile memory cells, comprising forming, on a substrate, a stack of alternating layers of metal including a first layer of metal and a second layer of metal different from the first layer of metal; removing the first layer of metal to form spaces between the alternating layers of the second layer of metal; and one of depositing a first layer of material to partially fill the spaces to leave air gaps therein or depositing a second layer of material to fill the spaces.
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