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45 条记录 (耗时 0.026 秒)

    Programmable output driver for integrated circuits
    31.
    发明授权
    Programmable output driver for integrated circuits 失效
    用于集成电路的可编程输出驱动器

    公开(公告)号：US5157282A

    公开(公告)日：1992-10-20

    申请号：US682571

    申请日：1991-04-08

    申请人： Randy T. Ong ,  Suresh M. Menon ,  Hang Kwan

    发明人： Randy T. Ong ,  Suresh M. Menon ,  Hang Kwan

    IPC分类号： H03K19/003

    CPC分类号： H03K19/00361 ,  H03K19/00346

    摘要： The present invention minimizes the noise voltage associated with the switching of output driver transistors of integrated cicruits caused by the rapid change in value of the current, expressed by the term di/dt, from the load into the driver transistors through the package leads. The present invention uses a programmable coarse current control (CCC) circuit and a programmable fine current control (FCC) circuit that control the pull-down output transistors. The FCC creates two time periods, after which it prevents the CCC from controlling an output pull-down transistor. The FCC and the CCC are used to reduce the di/dt dependent voltage noise by controlling the slope and the shape of the output voltage pull-down characteristics.

    摘要翻译： 本发明使由电流值（由术语di / dt）从负载通过封装引线的驱动晶体管的快速变化引起的集成电路的输出驱动晶体管的切换相关联的噪声电压最小化。 本发明使用可编程粗电流控制（CCC）电路和控制下拉输出晶体管的可编程微电流控制（FCC）电路。 FCC创建两个时间段，之后它阻止CCC控制输出下拉晶体管。 FCC和CCC用于通过控制斜率和输出电压下拉特性的形状来降低di / dt依赖电压噪声。

    BICMOS repeater circuit for a programmable logic device
    36.
    发明授权
    BICMOS repeater circuit for a programmable logic device 失效
    用于可编程逻辑器件的BICMOS中继器电路

    公开(公告)号：US5497108A

    公开(公告)日：1996-03-05

    申请号：US352402

    申请日：1994-12-08

    申请人： Suresh M. Menon ,  Stanley Wilson ,  Tsung C. Whang

    发明人： Suresh M. Menon ,  Stanley Wilson ,  Tsung C. Whang

    IPC分类号： H03K17/567 ,  H03K19/173 ,  H03K19/0175

    CPC分类号： H03K17/567 ,  H03K19/1736

    摘要： A programmable logic device includes a plurality of logic cells in which logic functions are performed, a plurality of input lines for supplying signals to be processed by the logic cells, a plurality of output lines for receiving signals that have been processed by the logic cells, and a plurality of repeater circuits combining bipolar and CMOS transistor technologies for transferring data from one point in the PLD to another point. Unidirectional repeater circuits transfer data from a first data bus in the PLD to a second data bus in the PLD. Bidirectional repeater circuits maintain signal integrity by transferring data along the length of a single PLD data bus. The bipolar technology in the repeater circuits provides superior speed in data transfer, while the CMOS technology limits power consumption of the repeater circuits.

    摘要翻译： 可编程逻辑器件包括执行逻辑功能的多个逻辑单元，用于提供由逻辑单元处理的信号的多条输入线，用于接收由逻辑单元处理的信号的多条输出线， 以及组合用于将数据从PLD中的一个点传送到另一个点的双极和CMOS晶体管技术的多个中继器电路。 单向中继器电路将数据从PLD中的第一数据总线传送到PLD中的第二数据总线。 双向中继器电路通过沿单个PLD数据总线的长度传输数据来保持信号完整性。 中继器电路中的双极技术在数据传输方面提供卓越的速度，而CMOS技术限制了中继器电路的功耗。

    Bandgap voltage reference circuit with an npn current bypass circuit
    37.
    发明授权
    Bandgap voltage reference circuit with an npn current bypass circuit 失效
    带隙电压参考电路，带npn电流旁路电路

    公开(公告)号：US4795918A

    公开(公告)日：1989-01-03

    申请号：US045950

    申请日：1987-05-01

    申请人： Suresh M. Menon ,  Jay L. Cohan

    发明人： Suresh M. Menon ,  Jay L. Cohan

    IPC分类号： G05F3/30 ,  G05F3/20

    CPC分类号： G05F3/30 ,  Y10S323/907

    摘要： A temperature compensated bandgap voltage reference circuit employs an npn transistor based bypass circuit to maintain a constant collector current within the reference circuit. This bypass circuit draws a nominal current from the bandgap voltage reference circuit. The value of this current is set by a bias circuit responsive to changes in the supply voltage. As the supply voltage changes, the bias circuit varies the conductance of a bypass transistor to draw more or less current and thereby maintain the collector current within the reference circuit constant.