FIXTURE, TRAY AND SPUTTERING SYSTEM

    公开(公告)号:US20220186359A1

    公开(公告)日:2022-06-16

    申请号:US17485170

    申请日:2021-09-24

    Abstract: A fixture, a tray and a sputtering system. The fixture is internally provided with a support structure and a clamping structure connected with each other, wherein the clamping structure is configured to clamp a to-be-sputtered substrate; an orthographic projection of the clamping structure on a plane where the support structure is located and the support structure share an superimposed area and are separate in non-superimposed areas; wherein the support structure located in the non-superimposed area and/or the clamping structure located in the non-superimposed area has a first hollowed structure. The fixture is internally provided with the first hollowed structure, such that a part of an area of the to-be-sputtered substrate covered by the fixture may be exposed via the first hollowed structure when the fixture holds the to-be-sputtered substrate, so as to reduce the area of the to-be-sputtered substrate covered by the fixture.

    LIGHT-EMITTING SUBSTRATE AND DISPLAY DEVICE

    公开(公告)号:US20240379631A1

    公开(公告)日:2024-11-14

    申请号:US18691021

    申请日:2021-10-22

    Abstract: A light-emitting substrate and a display device are disclosed, the light-emitting substrate includes: a base substrate including a light-emitting region; a plurality of first pads on a side of the base substrate and in the light-emitting region, where a material of the first pads includes Cu; and an oxidation protection layer on a side of the first pads away from the base substrate, where the plurality of first pads is used for bonding connection with a plurality of light-emitting units through the oxidation protection layer, a material of the oxidation protection layer includes CuNiX, and X includes one or any combination of Al, Sn, Pb, Au, Ag, In, Zn, Bi, Mg, Ga, V, W, Y, Zr, Mo, Nb, Pt, Co or Sb.

    THIN-FILM TRANSISTOR AND MANUFACTURING METHOD THEREOF, AND DISPLAY SUBSTRATE

    公开(公告)号:US20240204004A1

    公开(公告)日:2024-06-20

    申请号:US17910133

    申请日:2021-12-27

    CPC classification number: H01L27/124 H01L27/1259 H01L27/1222

    Abstract: Provided are a thin-film transistor and a manufacturing method thereof, and a display substrate, belonging to the technical field of thin-film transistors. The thin-film transistor includes: a base substrate; a gate electrode on the base substrate; an active layer on a side of the gate electrode away from the base substrate, an orthographic projection of the active layer onto the base substrate overlapping with an orthographic projection of the gate electrode onto the base substrate; and a first electrode and a second electrode on a side of the active layer away from the base substrate, the first electrode being one of a source electrode and a drain electrode, and the second electrode being the other of the source electrode and the drain electrode. Specifically the active layer includes a channel region corresponding to a gap between the first electrode and the second electrode, and a width direction of the channel region is perpendicular or substantially perpendicular to an extending direction of the gate electrode. According to the embodiments of the present disclosure, the illumination stability of the thin-film transistor can be improved without reducing the transmittance of the substrate.

    FINGERPRINT IDENTIFICATION MODULE, METHOD FOR MANUFACTURING FINGERPRINT IDENTIFICATION MODULE, DISPLAY SUBSTRATE AND DISPLAY DEVICE

    公开(公告)号:US20220100982A1

    公开(公告)日:2022-03-31

    申请号:US17431636

    申请日:2021-02-09

    Abstract: A fingerprint identification module, a method for manufacturing the fingerprint identification module, a display substrate and a display device are provided. The fingerprint identification module includes a TFT, a photosensitive sensor, and a connection electrode configured to connect the TFT to the photosensitive sensor; the TFT includes an active layer; the active layer and the connection electrode are formed through a same semiconductor layer pattern, the semiconductor layer pattern includes a first semiconductor pattern and a second semiconductor pattern, the first semiconductor pattern is used as the active layer, and the second semiconductor pattern is subjected to conductor-formation treatment and used as the connection electrode.

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