公开(公告)号：US08558228B2

公开(公告)日：2013-10-15

申请号：US12915757

申请日：2010-10-29

申请人： Chia-Chung Chen ,  Chi-Feng Huang ,  Tse-Hua Lu ,  Sally Liu

发明人： Chia-Chung Chen ,  Chi-Feng Huang ,  Tse-Hua Lu ,  Sally Liu

IPC分类号： H01L23/58

CPC分类号： H01L23/5223 ,  H01L22/34 ,  H01L2924/0002 ,  H01L2924/00

摘要： A device includes a first MOM capacitor; a second MOM capacitor directly over and vertically overlapping the first MOM capacitor, wherein each of the first and the second MOM capacitors includes a plurality of parallel capacitor fingers; a first and a second port electrically coupled to the first MOM capacitor; and a third and a fourth port electrically coupled to the second MOM capacitor. The first, the second, the third, and the fourth ports are disposed at a surface of a respective wafer.

摘要翻译： 一种器件包括第一MOM电容器; 第二MOM电容器直接在第一MOM电容器上方并垂直重叠，其中第一和第二MOM电容器中的每一个包括多个并联电容指; 电耦合到第一MOM电容器的第一和第二端口; 以及电耦合到第二MOM电容器的第三和第四端口。 第一，第二，第三和第四端口设置在相应晶片的表面。

公开(公告)号：US20120187494A1

公开(公告)日：2012-07-26

申请号：US13013677

申请日：2011-01-25

申请人： Chi-Feng Huang ,  Chia-Chung Chen

发明人： Chi-Feng Huang ,  Chia-Chung Chen

IPC分类号： H01L27/088 ,  H01L21/66

CPC分类号： H01L29/66174 ,  H01L27/0808 ,  H01L27/0811 ,  H01L29/93 ,  H01L29/94

摘要： Apparatus and methods for a MOS varactor structure are disclosed An apparatus is provided, comprising an active area defined in a portion of a semiconductor substrate; a doped well region in the active area extending into the semiconductor substrate; at least two gate structures disposed in parallel over the doped well region; source and drain regions disposed in the well region formed on opposing sides of the gate structures; a gate connector formed in a first metal layer overlying the at least two gate structures and electrically coupling the at least two gate structures; source and drain connectors formed in a second metal layer and electrically coupled to the source and drain regions; and interlevel dielectric material separating the source and drain connectors in the second metal layer from the gate connector formed in the first metal layer. Methods for forming the structure are disclosed.

摘要翻译： 公开了一种用于MOS可变电抗器结构的装置和方法。提供一种装置，包括限定在半导体衬底的一部分中的有源区; 在有源区域中延伸到半导体衬底中的掺杂阱区; 在所述掺杂阱区域上平行布置的至少两个栅极结构; 源极和漏极区域，设置在形成在栅极结构的相对侧上的阱区域中; 栅极连接器，形成在覆盖所述至少两个栅极结构并电耦合所述至少两个栅极结构的第一金属层中; 源极和漏极连接器，其形成在第二金属层中并电耦合到源极和漏极区域; 以及将第二金属层中的源极和漏极连接器与形成在第一金属层中的栅极连接器分开的层间电介质材料。 公开了形成结构的方法。

公开(公告)号：US20110047614A1

公开(公告)日：2011-02-24

申请号：US12461635

申请日：2009-08-19

申请人： Chi-Feng Huang ,  Yuan-Lin Chiang

发明人： Chi-Feng Huang ,  Yuan-Lin Chiang

IPC分类号： G06F12/14

CPC分类号： G06F21/604 ,  G06F21/6209 ,  G06F21/6281 ,  G06F2221/2141

摘要： The invention discloses a permission management system for data accessing and a method thereof, applicable to operating system. The method of permission management for accessing data comprises the steps of: first, monitoring an unoccupied drive letter in operating system; then, detecting a drive letter request event and actively executing an authorizing procedure to produce an access right of the drive letter; and stop monitoring the drive letter and allowing a user to access data corresponding to the drive letter according to the access right.

摘要翻译： 本发明公开了一种适用于操作系统的数据访问权限管理系统及其方法。 访问数据的权限管理方法包括以下步骤：首先，监视操作系统中未占用的驱动器号; 然后，检测驱动器盘符请求事件并主动执行授权过程以产生驱动器盘符的访问权限; 并停止监视驱动器盘符，并允许用户根据访问权限访问与驱动器号相对应的数据。

公开(公告)号：US20090114940A1

公开(公告)日：2009-05-07

申请号：US12055119

申请日：2008-03-25

申请人： Chih-Chung Yang ,  Dong-Ming Yeh ,  Cheng-Yen Chen ,  Yen-Cheng Lu ,  Kun-Ching Shen ,  Chi-Feng Huang

发明人： Chih-Chung Yang ,  Dong-Ming Yeh ,  Cheng-Yen Chen ,  Yen-Cheng Lu ,  Kun-Ching Shen ,  Chi-Feng Huang

IPC分类号： H01L33/00

CPC分类号： H01L33/44

摘要： The invention provides a light-emitting device, comprising a light-emitting element and a surface plasmon coupling element connected to the light-emitting element. In an embodiment of the invention, the surface plasmon coupling element comprises a dielectric layer connected to the light-emitting element and a metal layer on the dielectric layer. In another embodiment of the invention, the light-emitting device is a light-emitting diode, comprising an active layer between an n-type semiconductor layer and a p-type semiconductor layer, and a surface plasmon coupling element adjacent to the n-type semiconductor layer. In a further embodiment of the invention, a current spreading layer on a second type semiconductor layer of the light-emitting device includes a plurality of strip-shaped structures, and the surface plasmon coupling element is disposed on the current spreading layer and filled into the gap between the strip-shaped structures of the current spreading layer.

摘要翻译： 本发明提供了一种发光装置，包括发光元件和连接到发光元件的表面等离子体激元耦合元件。 在本发明的实施例中，表面等离子体激元耦合元件包括连接到发光元件的电介质层和介电层上的金属层。 在本发明的另一个实施例中，发光装置是发光二极管，其包括n型半导体层和p型半导体层之间的有源层以及与n型半导体层相邻的表面等离子体耦合元件 半导体层。 在本发明的另一实施例中，发光器件的第二类型半导体层上的电流扩展层包括多个条形结构，并且表面等离子体激元耦合元件设置在电流扩展层上并被填充到 电流扩展层的带状结构之间的间隙。

公开(公告)号：US07521330B2

公开(公告)日：2009-04-21

申请号：US11757763

申请日：2007-06-04

申请人： Chun Chieh Wu ,  Chi-Feng Huang ,  Chun-Hung Chen ,  Chih-Ping Chao ,  John Chern

发明人： Chun Chieh Wu ,  Chi-Feng Huang ,  Chun-Hung Chen ,  Chih-Ping Chao ,  John Chern

IPC分类号： H01L21/20

CPC分类号： H01L27/0629 ,  H01L29/7833

摘要： A method for forming a capacitor includes forming a dielectric layer over a substrate. A conductive layer is formed over the dielectric layer. Dopants are implanted through at least one of the dielectric layer and the conductive layer after forming the dielectric layer so as to form a conductive region under the dielectric layer, wherein the conductive layer is a top electrode of the capacitor and the conductive region is a bottom electrode of the capacitor.

摘要翻译： 形成电容器的方法包括在衬底上形成电介质层。 在电介质层上形成导电层。 在形成电介质层之后，通过介电层和导电层中的至少一个注入掺杂剂，以在电介质层下方形成导电区域，其中导电层是电容器的顶部电极，导电区域是底部 电容器的电极。

公开(公告)号：US20080156164A1

公开(公告)日：2008-07-03

申请号：US11648085

申请日：2006-12-29

申请人： Chi-Feng Huang

发明人： Chi-Feng Huang

IPC分类号： B26F1/14 ,  B26D5/08

CPC分类号： B26F1/36 ,  B26D5/10 ,  Y10T83/8801 ,  Y10T83/943

摘要： A laborsaving hole puncher has a base, at least one cutter, a top cover and at least one articulated linkage. The base has at least one bracket. The least one cutter slidably is mounted respectively on the at least one bracket. The top cover is mounted pivotally on the at least one bracket. The least one articulated linkage connects respectively to the at least one bracket, the at least one cutter and the top cover and each articulated linkage has an upper link and a lower link. The upper link is mounted pivotally on the top cover. The lower link is mounted pivotally on the upper link and is mounted pivotally on one bracket and has an intermediate segment mounted to one cutter. The at least one articulated linkage makes people easily conveniently use the laborsaving hole puncher without strenuous effort.

摘要翻译： 劳保钻孔机具有底座，至少一个切割器，顶盖和至少一个铰接连杆。 底座至少有一个支架。 至少一个切割器可滑动地安装在至少一个支架上。 顶盖枢转地安装在至少一个支架上。 所述至少一个铰接连杆分别连接至所述至少一个支架，所述至少一个切割器和所述顶盖以及每个铰接连杆机构具有上连杆和下连杆。 上连杆可枢转地安装在顶盖上。 下连杆枢转地安装在上连杆上，并且枢转地安装在一个支架上，并且具有安装到一个切割器上的中间段。 所述至少一个铰接连杆使得人们容易地方便地使用劳保钻孔机而不用费劲地努力。

公开(公告)号：US20080124827A1

公开(公告)日：2008-05-29

申请号：US11819520

申请日：2007-06-28

申请人： Chi-Feng Huang ,  Tsung-Yi Tang ,  Jeng-Jie Huang ,  Wen-Yu Shiao ,  Horng-Shyang Chen ,  Chih-Feng Lu ,  Jian-Jang Huang ,  Chih-Chung Yang

发明人： Chi-Feng Huang ,  Tsung-Yi Tang ,  Jeng-Jie Huang ,  Wen-Yu Shiao ,  Horng-Shyang Chen ,  Chih-Feng Lu ,  Jian-Jang Huang ,  Chih-Chung Yang

IPC分类号： H01L33/00

CPC分类号： H01L33/06 ,  H01L21/02389 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/0262 ,  H01L33/32

摘要： A method and structure for manufacturing long-wavelength visible light-emitting diode (LED) using the prestrained growth effect comprises the following steps: Growing a strained low-indium-content InGaN layer on the N-type GaN layer, and then growing a high-indium-content InGaN/GaN single- or multiple-quantum-well light-emitting structure on the low-indium-content InGaN layer to enhance the indium content of the high-indium quantum wells and hence to elongate the emission wavelength of the LED. The method of the invention can elongate emission wavelength of the LED by more than 50 nm (nanometer) such that an originally designated green LED can emit red light or orange light without influencing other electrical properties.

摘要翻译： 使用预制生长效应制造长波长可见发光二极管（LED）的方法和结构包括以下步骤：在N型GaN层上生长应变低铟含量InGaN层，然后生长高 在铟含量低的InGaN层上的InGaN / GaN单或多量子阱发光结构，以增强高铟量子阱的铟含量，从而延长LED的发射波长 。 本发明的方法可以使LED的发射波长可以超过50nm（纳米），使得原始指定的绿色LED可以发射红光或橙光而不影响其他电性能。

公开(公告)号：US08766403B2

公开(公告)日：2014-07-01

申请号：US13366750

申请日：2012-02-06

申请人： Chi-Feng Huang ,  Chia-Chung Chen

发明人： Chi-Feng Huang ,  Chia-Chung Chen

IPC分类号： H01L29/92

CPC分类号： H01L27/0805 ,  H01L23/5223 ,  H01L27/016 ,  H01L27/0207 ,  H01L28/40 ,  H01L28/60 ,  H01L28/86 ,  H01L2924/0002 ,  H01L2924/00

摘要： Semiconductor devices having capacitor arrays and methods of forming the same. A semiconductor device is formed including a capacitor array. The capacitor array includes a plurality of operational capacitors formed along a diagonal of the capacitor array. The capacitor array also includes a plurality of dummy capacitors formed substantially symmetrically about the plurality of operational capacitors in the capacitor array. A first operational capacitor is formed at a first edge of the capacitor array. Each one of the plurality of operational capacitors is electrically coupled to a non-adjacent other one of the plurality of operational capacitors.

摘要翻译： 具有电容器阵列的半导体器件及其形成方法。 形成包括电容器阵列的半导体器件。 电容器阵列包括沿着电容器阵列的对角线形成的多个工作电容器。 电容器阵列还包括围绕电容器阵列中的多个工作电容器大致对称地形成的多个虚拟电容器。 第一工作电容器形成在电容器阵列的第一边缘处。 多个工作电容器中的每一个电耦合到多个工作电容器中的不相邻的另一个。

公开(公告)号：US20140158984A1

公开(公告)日：2014-06-12

申请号：US13917645

申请日：2013-06-14

申请人： Chi-Feng Huang ,  Sheng-Han Tu

发明人： Chi-Feng Huang ,  Sheng-Han Tu

IPC分类号： H01L29/15

CPC分类号： H01L33/12 ,  H01L21/02381 ,  H01L21/02458 ,  H01L21/02505 ,  H01L21/0251 ,  H01L21/0254 ,  H01L29/2003 ,  H01L29/201 ,  H01L33/007 ,  H01L33/06 ,  H01L33/32

摘要： A semiconductor structure includes a silicon substrate, an aluminum nitride layer and a plurality of grading stress buffer layers. The aluminum nitride layer is disposed on the silicon substrate. The grading stress buffer layers are disposed on the aluminum nitride layer. Each grading stress buffer layer includes a grading layer and a transition layer stacked up sequentially. A chemical formula of the grading layer is Al1−xGaxN, wherein the x value is increased from one side near the silicon substrate to a side away from the silicon substrate, and 0≦x≦1. A chemical formula of the transition layer is the same as the chemical formula of a side surface of the grading layer away from the silicon substrate. The chemical formula of the transition layer of the grading stress buffer layer furthest from the silicon substrate is GaN.

摘要翻译： 半导体结构包括硅衬底，氮化铝层和多个分级应力缓冲层。 氮化铝层设置在硅衬底上。 分级应力缓冲层设置在氮化铝层上。 每个分级应力缓冲层包括依次层叠的分级层和过渡层。 分级层的化学式为Al1-xGaxN，其中x值从硅衬底附近的一侧增加到远离硅衬底的一侧，并且0和n 1; x＆lt; 1; 1。 过渡层的化学式与脱离硅衬底的分级层的侧表面的化学式相同。 离硅衬底最远的分级应力缓冲层的过渡层的化学式为GaN。

公开(公告)号：US08450827B2

公开(公告)日：2013-05-28

申请号：US13013677

申请日：2011-01-25

申请人： Chi-Feng Huang ,  Chia-Chung Chen

发明人： Chi-Feng Huang ,  Chia-Chung Chen

IPC分类号： H01L21/36

CPC分类号： H01L29/66174 ,  H01L27/0808 ,  H01L27/0811 ,  H01L29/93 ,  H01L29/94

摘要： Apparatus and methods for a MOS varactor structure are disclosed An apparatus is provided, comprising an active area defined in a portion of a semiconductor substrate; a doped well region in the active area extending into the semiconductor substrate; at least two gate structures disposed in parallel over the doped well region; source and drain regions disposed in the well region formed on opposing sides of the gate structures; a gate connector formed in a first metal layer overlying the at least two gate structures and electrically coupling the at least two gate structures; source and drain connectors formed in a second metal layer and electrically coupled to the source and drain regions; and interlevel dielectric material separating the source and drain connectors in the second metal layer from the gate connector formed in the first metal layer. Methods for forming the structure are disclosed.

摘要翻译： 公开了一种用于MOS可变电抗器结构的装置和方法。提供一种装置，包括限定在半导体衬底的一部分中的有源区; 在有源区域中延伸到半导体衬底中的掺杂阱区; 在所述掺杂阱区域上平行布置的至少两个栅极结构; 源极和漏极区域，设置在形成在栅极结构的相对侧上的阱区域中; 栅极连接器，形成在覆盖所述至少两个栅极结构并电耦合所述至少两个栅极结构的第一金属层中; 源极和漏极连接器，其形成在第二金属层中并电耦合到源极和漏极区域; 以及将第二金属层中的源极和漏极连接器与形成在第一金属层中的栅极连接器分开的层间电介质材料。 公开了形成结构的方法。