公开(公告)号：US20060033146A1

公开(公告)日：2006-02-16

申请号：US10962288

申请日：2004-10-08

申请人： Chih-Hsin Wang

发明人： Chih-Hsin Wang

IPC分类号： H01L29/788

CPC分类号： G11C16/0416 ,  G11C16/14 ,  H01L29/42332 ,  H01L29/7885 ,  H01L29/792

摘要： A nonvolatile memory cell is provided. The memory cell comprises a storage transistor and an injector in a semiconductor substrate of a p-type conductivity. The injector comprises a first region of the p-type conductivity and a second region of an n-type conductivity. The storage transistor comprises a source, a drain, a channel, a charge storage region, and a control gate. The source and the drain have the p-type conductivity and are formed in a well of the n-type conductivity in the substrate with the channel of the well defined therebetween. The charge storage region is disposed over and insulated from the channel by a first insulator. The control gate is disposed over and insulated from the charge storage region by a second insulator. Further provided are methods operating the memory cell, including means for injecting electrons from the channel through the first insulator onto the charge storage region and means for injecting holes from the injector through the well through the channel through the first insulator onto the charge storage region.

摘要翻译： 提供非易失性存储单元。 存储单元包括p型导电性的半导体衬底中的存储晶体管和注入器。 注射器包括p型导电性的第一区域和n型导电性的第二区域。 存储晶体管包括源极，漏极，沟道，电荷存储区域和控制栅极。 源极和漏极具有p型导电性，并且形成在衬底中的n型导电性的阱中，阱之间的沟道被限定。 电荷存储区域通过第一绝缘体设置在沟道之上并与沟道绝缘。 控制栅极通过第二绝缘体设置在电荷存储区域之上并与电荷存储区域绝缘。 还提供了操作存储单元的方法，包括用于将电子从通道中通过第一绝缘体注入到电荷存储区上的装置，以及用于将来自注射器的孔穿过阱通过穿过第一绝缘体的沟道注入到电荷存储区上的装置。

公开(公告)号：US20060001050A1

公开(公告)日：2006-01-05

申请号：US11138888

申请日：2005-05-26

申请人： Bin Wang ,  Chih-Hsin Wang

发明人： Bin Wang ,  Chih-Hsin Wang

IPC分类号： H01L29/745 ,  H01L21/335

CPC分类号： H01L29/4983 ,  H01L29/0653 ,  H01L29/4916 ,  H01L29/7833 ,  H01L29/7835 ,  H01L29/7836

摘要： A FET device for operation at high voltages includes a substrate, a first well and a second well within the substrate that are doped with implants of a first type and second type, respectively. The first and second wells define a p-n junction. A field oxide layer within the second well defines a first surface region to receive a drain contact. A third well is located at least partially in the first well, includes doped implants of the second type, and is adapted to receive a source contact. As such, the third well defines a channel between itself and the second well within the first well. A gate is disposed over the channel. At least a first portion of the gate is disposed over the p-n junction, and includes doped implants of the first type. A number of permutations are allowed for doping the remainder of the gate.

摘要翻译： 用于在高电压下操作的FET器件包括分别掺杂有第一类型和第二类型的植入物的衬底，衬底内的第一阱和第二阱。 第一和第二阱限定p-n结。 第二阱内的场氧化物层限定了接收漏极接触的第一表面区域。 第三阱至少部分地位于第一阱中，包括第二类型的掺杂植入物，并且适于接收源极接触。 这样，第三井在第一井内定义了自身与第二井之间的通道。 通道上设置一个门。 栅极的至少第一部分设置在p-n结上方，并且包括第一类型的掺杂植入物。 许多排列允许掺杂栅极的其余部分。

公开(公告)号：US20050258461A1

公开(公告)日：2005-11-24

申请号：US10952708

申请日：2004-09-28

申请人： Bin Wang ,  William Colleran ,  Chih-Hsin Wang

发明人： Bin Wang ,  William Colleran ,  Chih-Hsin Wang

IPC分类号： H01L29/06 ,  H01L29/10 ,  H01L29/423 ,  H01L29/76 ,  H01L29/78

CPC分类号： H01L29/4983 ,  H01L29/0653 ,  H01L29/1045 ,  H01L29/42368 ,  H01L29/4916 ,  H01L29/7835

摘要： A high-voltage LDMOSFET includes a semiconductor substrate, in which a gate well is formed. A source well and a drain well are formed on either side of the gate well, and include insulating regions within them that do not reach the full depth. An insulating layer is disposed on the substrate, covering the gate well and a portion of the source well and the drain well. A conductive gate is disposed on the insulating layer. Biasing wells are formed adjacent the source well and the drain well. A deep well is formed in the substrate such that it communicates with the biasing wells and the gate well, while extending under the source well and the drain well, such as to avoid them. Biasing contacts at the top of the biasing wells bias the deep well, and therefore also the gate well.

摘要翻译： 高压LDMOSFET包括其中形成栅极阱的半导体衬底。 源极阱和漏极阱形成在栅极阱的任一侧上，并且在其内部包括未达到全部深度的绝缘区域。 绝缘层设置在衬底上，覆盖栅极阱以及源极阱和漏极阱的一部分。 导电栅极设置在绝缘层上。 在源阱和排水井附近形成偏置井。 在衬底中形成深阱，使得其在偏压井和浇口井下连通，同时在源井和排水井下方延伸，以避免它们。 偏置井顶部的偏置接触偏压深井，因此井也很好。

公开(公告)号：US20050145203A1

公开(公告)日：2005-07-07

申请号：US10751294

申请日：2004-01-02

申请人： Chih-Hsin Wang

发明人： Chih-Hsin Wang

IPC分类号： A01K27/00

CPC分类号： A44B11/25 ,  A01K27/005

摘要： A safety device is disclosed for use with a collar for a pet. The safety device includes a central member, a first lateral member and a second lateral member. The first lateral member is for pivotal and releasable engagement with the central member. The second lateral member is for pivotal and releasable engagement with the central member.

摘要翻译： 公开了一种用于宠物衣领的安全装置。 安全装置包括中心构件，第一横向构件和第二横向构件。 第一横向构件用于与中心构件枢转和可释放地接合。 第二横向构件用于与中心构件枢转和可释放地接合。

公开(公告)号：US08792274B1

公开(公告)日：2014-07-29

申请号：US13590230

申请日：2012-08-21

申请人： Qiang Tang ,  Bo Wang ,  Chih-Hsin Wang

发明人： Qiang Tang ,  Bo Wang ,  Chih-Hsin Wang

IPC分类号： G11C16/04 ,  G11C7/06

CPC分类号： G11C16/3445 ,  G11C7/1006 ,  G11C11/56 ,  G11C11/5628 ,  G11C11/5635 ,  G11C11/5642 ,  G11C2013/0076

摘要： A system is provided and includes an array of cells, a first module, and a third module. The first module reads a state of a cell in the array to detect first bits stored in the cell. The third module, subsequent to the first module reading the state, performs a first operation on a first bit of the first bits and performs the first operation on a first of multiple signal inputs. The signal inputs indicate second bits of data to be stored in the cell. The third module performs a second operation on a second bit of the first bits and performs the second operation on a second one of the signal inputs. The first module, based on results of the first and second operations, performs a first erase operation or a first program operation on the cell to match the state of the cell to the second bits.

摘要翻译： 提供了一种系统，包括一个单元阵列，一个第一模块和一个第三模块。 第一模块读取阵列中的单元的状态以检测存储在单元中的第一位。 第三模块在第一模块读取状态之后，对第一位的第一位执行第一操作，并且在多个信号输入中的第一个上执行第一操作。 信号输入表示要存储在单元中的数据的第二位。 第三模块对第一位的第二位执行第二操作，并对第二信号输入执行第二操作。 第一模块基于第一和第二操作的结果，对单元执行第一擦除操作或第一程序操作，以将该单元的状态与第二位相匹配。

公开(公告)号：US08116110B1

公开(公告)日：2012-02-14

申请号：US12340911

申请日：2008-12-22

申请人： Pantas Sutardja ,  Chih-Hsin Wang ,  Qiang Tang

发明人： Pantas Sutardja ,  Chih-Hsin Wang ,  Qiang Tang

IPC分类号： G11C5/06

CPC分类号： G11C8/12 ,  G11C5/025 ,  G11C16/0416

摘要： A memory device including nonvolatile memory cells arrayed in a first direction and in a second direction, a plurality of first lines extending in the first direction for coupling memory cells arrayed in the first direction, and a plurality of second lines extending in the second direction for coupling memory cells arrayed in the second direction. The memory device includes a plurality of decoders, including i) first decoders coupled to the first lines and ii) second decoders coupled to the second lines, for accessing any one or more of the memory cells in any order. The memory device includes a plurality of segments. Each segment includes different ones of the nonvolatile memory cells. A first one of the segments is juxtaposed to, in the second direction, a second one of the segments. The second one of the segments mirrors, in the second direction, the first one of the segments.

摘要翻译： 一种存储器件，包括沿第一方向和第二方向排列的非易失性存储单元，沿第一方向延伸的多条第一线，用于耦合沿第一方向排列的存储单元，以及沿第二方向延伸的多条第二线， 耦合沿第二方向排列的存储单元。 存储器件包括多个解码器，包括i）耦合到第一线的第一解码器，以及ii）耦合到第二线的第二解码器，用于以任何顺序访问任何一个或多个存储器单元。 存储器件包括多个段。 每个段包括不同的非易失性存储单元。 该段中的第一个与第二个方向并列，分段中的第二个。 第二个片段在第二个方向上反射第一个片段。

公开(公告)号：US20110158476A1

公开(公告)日：2011-06-30

申请号：US12829370

申请日：2010-07-01

申请人： Chin-Shyurng Fahn ,  Keng-Yu Chu ,  Chih-Hsin Wang

发明人： Chin-Shyurng Fahn ,  Keng-Yu Chu ,  Chih-Hsin Wang

IPC分类号： G06K9/46 ,  G06K9/00

CPC分类号： G06K9/00288 ,  B25J11/0005 ,  B25J13/08 ,  G06F3/012 ,  G06F3/017 ,  G06K9/00335

摘要： A robot and a method for recognizing human faces and gestures are provided, and the method is applicable to a robot. In the method, a plurality of face regions within an image sequence captured by the robot are processed by a first classifier, so as to locate a current position of a specific user from the face regions. Changes of the current position of the specific user are tracked to move the robot accordingly. While the current position of the specific user is tracked, a gesture feature of the specific user is extracted by analyzing the image sequence. An operating instruction corresponding to the gesture feature is recognized by processing the gesture feature through a second classifier, and the robot is controlled to execute a relevant action according to the operating instruction.

摘要翻译： 提供了一种用于识别人脸和手势的机器人和方法，并且该方法适用于机器人。 在该方法中，由机器人拍摄的图像序列内的多个面部区域由第一分类器处理，以便从面部区域定位特定用户的当前位置。 跟踪特定用户当前位置的变化，以相应地移动机器人。 当跟踪特定用户的当前位置时，通过分析图像序列来提取特定用户的手势特征。 通过通过第二分类器处理手势特征来识别对应于手势特征的操作指令，并且根据操作指令来控制机器人执行相关动作。

公开(公告)号：US07741177B2

公开(公告)日：2010-06-22

申请号：US11879179

申请日：2007-07-16

申请人： Chih-Hsin Wang

发明人： Chih-Hsin Wang

IPC分类号： H01L21/336 ,  H01L21/331 ,  H01L21/8238

CPC分类号： H01L27/115 ,  G11C16/0416 ,  H01L21/28273 ,  H01L27/11521 ,  H01L27/11568 ,  H01L29/42324 ,  H01L29/513 ,  H01L29/7881 ,  H01L29/7883 ,  H01L29/7885 ,  H01L29/792

摘要： A method of providing a memory cell comprises providing a semiconductor substrate including a body of a first conductivity type, first and second regions of a second conductivity type and a channel between the first and second regions; arranging a first insulator layer adjacent to the substrate; arranging a charge storage region adjacent to the first insulator layer; arranging a second insulator layer adjacent to the charge storage region; arranging a first conductive region adjacent to the second insulator layer; arranging a layer adjacent to the first conductive region; arranging a second conductive region adjacent to the layer; and increasing mechanical stress of at least one of the first and second conductive regions. The second conductive region overlaps the first conductive region at an overlap surface, and wherein a line perpendicular to the overlap surface intersects at least a portion of the charge storage region.

摘要翻译： 提供存储单元的方法包括：提供包括第一导电类型的主体，第二导​​电类型的第一和第二区域以及第一和第二区域之间的通道的半导体衬底; 布置与所述基板相邻的第一绝缘体层; 配置与所述第一绝缘体层相邻的电荷存储区域; 布置与电荷存储区域相邻的第二绝缘体层; 布置与所述第二绝缘体层相邻的第一导电区域; 布置与所述第一导电区域相邻的层; 布置与所述层相邻的第二导电区域; 以及增加所述第一和第二导电区域中的至少一个的机械应力。 第二导电区域在重叠表面处与第一导电区域重叠，并且其中垂直于重叠表面的线与电荷存储区域的至少一部分相交。

公开(公告)号：US07613041B2

公开(公告)日：2009-11-03

申请号：US11464404

申请日：2006-09-25

申请人： Chih-Hsin Wang

发明人： Chih-Hsin Wang

IPC分类号： G11C11/34

CPC分类号： G11C16/3418 ,  G11C16/3427

摘要： Methods and apparatus on charges injection using piezo-ballistic-charges injection mechanism are provided for semiconductor device and nonvolatile memory device. The device comprises a strain source, an injection filter, a first conductive region, a second conductive region, and a third conductive region. The strain source permits piezo-effect in ballistic charges transport to enable the piezo-ballistic-charges injection mechanism in device operations. The injection filter permits transporting of charge carriers of one polarity type from the first conductive region, through the filter, and through the second conductive region to the third conductive region while blocking the transport of charge carriers of an opposite polarity from the second conductive region to the first conductive region. The present invention further provides an energy band engineering method permitting the devices be operated without suffering from disturbs, from dielectric breakdown, from impact ionization, and from undesirable RC effects.

摘要翻译： 为半导体器件和非易失性存储器件提供使用压电弹药注入机构的电荷注入的方法和装置。 该装置包括应变源，注射过滤器，第一导电区域，第二导电区域和第三导电区域。 应变源允许在弹道电荷输送中的压电效应，使得能够在器件操作中实现压电弹药注入机制。 注入过滤器允许将一种极性类型的电荷载体从第一导电区域通过滤波器传输，并且通过第二导电区域传输到第三导电区域，同时阻止相反极性的电荷载体从第二导电区域传输到 第一导电区域。 本发明进一步提供一种能量带工程方法，其允许在不受到电介质击穿，不受冲击电离和不期望的RC影响的干扰的情况下操作装置。

公开(公告)号：US07547601B2

公开(公告)日：2009-06-16

申请号：US11978875

申请日：2007-10-30

申请人： Chih-Hsin Wang

发明人： Chih-Hsin Wang

IPC分类号： H01L21/331 ,  H01L21/336

CPC分类号： H01L27/11568 ,  G11C16/0416 ,  G11C16/0466 ,  H01L21/26586 ,  H01L21/28273 ,  H01L27/115 ,  H01L27/11521 ,  H01L29/42324 ,  H01L29/42336 ,  H01L29/47 ,  H01L29/66636 ,  H01L29/66825 ,  H01L29/7881 ,  H01L29/7883 ,  H01L29/792

摘要： A method of providing a memory cell includes providing a body of a semiconductor material having a first conductivity type, arranging a filter of a conductor-filter system in contact with a first conductor of the conductor-filter system, arranging at least portion of a second conductor of a conductor-insulator system in contact with the filter, arranging a first insulator of the conductor-insulator system in contact with the second conductor at an interface, arranging a first region spaced from the second conductor, arranging a channel of the body between the first region and the second conductor, arranging a second insulator adjacent to the first region, arranging a charge storage region between the first and the second insulators, arranging a first portion of a word-line adjacent to and insulated from the charge storage region, and arranging a second portion of the word-line adjacent to and insulated from the body.

摘要翻译： 提供存储单元的方法包括提供具有第一导电类型的半导体材料的主体，布置与导体过滤器系统的第一导体接触的导体过滤系统的滤波器，将至少部分第二导体 与过滤器接触的导体 - 绝缘体系统的导体，在接口处布置导体 - 绝缘体系统的第一绝缘体与第二导体接触，布置与第二导体间隔开的第一区域，将主体的沟道布置在 所述第一区域和所述第二导体布置与所述第一区域相邻的第二绝缘体，在所述第一绝缘体和所述第二绝缘体之间布置电荷存储区域，布置与所述电荷存储区域相邻并与所述电荷存储区域绝缘的字线的第一部分， 并且将所述字线的第二部分布置成与所述主体相邻并且与所述主体绝缘。