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    Method for forming buried cavities within a semiconductor body, and semiconductor body thus made
    33.
    发明申请
    Method for forming buried cavities within a semiconductor body, and semiconductor body thus made 有权
    在半导体本体内形成掩埋空穴的方法以及由此制成的半导体本体

    公开(公告)号：US20070057355A1

    公开(公告)日：2007-03-15

    申请号：US11486387

    申请日：2006-07-12

    申请人： Gabriele Barlocchi ,  Pietro Corona ,  Dino Faralli ,  Flavio Villa

    发明人： Gabriele Barlocchi ,  Pietro Corona ,  Dino Faralli ,  Flavio Villa

    IPC分类号： H01L21/324 ,  H01L23/16

    CPC分类号： B81C1/00047 ,  B01L3/502707 ,  B01L7/52 ,  B01L2200/12 ,  B01L2300/0636 ,  B01L2300/0645 ,  B01L2300/0816 ,  B01L2300/1827 ,  B81B2201/0264 ,  B81B2203/0315

    摘要： A method for the formation of buried cavities within a semiconductor body envisages the steps of: providing a wafer having a bulk region made of semiconductor material; digging, in the bulk region, trenches delimiting between them walls of semiconductor material; forming a closing layer for closing the trenches in the presence of a deoxidizing atmosphere so as to englobe the deoxidizing atmosphere within the trenches; and carrying out a thermal treatment such as to cause migration of the semiconductor material of the walls and to form a buried cavity. Furthermore, before the thermal treatment is carried out, a barrier layer that is substantially impermeable to hydrogen is formed on the closing layer on top of the trenches.

    摘要翻译： 一种用于在半导体主体内形成掩埋空腔的方法，设想了以下步骤：提供具有由半导体材料制成的体区的晶片; 在本体区域中挖掘在它们的半导体材料壁之间划定的沟槽; 形成用于在脱氧气氛存在下关闭所述沟槽的闭合层，以便使所述沟槽内的脱氧气氛充满; 进行热处理，使壁的半导体材料迁移并形成掩埋腔。 此外，在进行热处理之前，在沟槽顶部的闭合层上形成基本上不透氢的阻挡层。

    Process for manufacturing a membrane microelectromechanical device, and membrane microelectromechanical device
    36.
    发明授权
    Process for manufacturing a membrane microelectromechanical device, and membrane microelectromechanical device 有权
    膜微机电装置的制造方法以及膜微机电装置

    公开(公告)号：US09162876B2

    公开(公告)日：2015-10-20

    申请号：US13419230

    申请日：2012-03-13

    申请人： Pietro Corona ,  Marco Ferrera ,  Igor Varisco ,  Roberto Campedelli

    发明人： Pietro Corona ,  Marco Ferrera ,  Igor Varisco ,  Roberto Campedelli

    IPC分类号： B81C1/00 ,  G01L9/00

    CPC分类号： B81C1/00158 ,  B81B2201/0257 ,  B81B2203/0127 ,  B81C1/00293 ,  B81C2203/0145 ,  G01L9/0042 ,  G01L9/0073

    摘要： Disclosed herein is a microelectromechanical device and a process for manufacturing same. One or more embodiments may include forming a semiconductor structural layer separated from a substrate by a dielectric layer, and opening a plurality of trenches through the structural layer exposing a portion of the dielectric layer. A sacrificial portion of the dielectric layer is selectively removed through the plurality of trenches in membrane regions so as to free a corresponding portion of the structural layer to form a membrane. To close the trenches, the wafer is brought to an annealing temperature for a time interval in such a way as to cause migration of the atoms of the membrane so as to reach a minimum energy configuration.

    摘要翻译： 本文公开了一种微机电装置及其制造方法。 一个或多个实施例可以包括通过电介质层形成与衬底分离的半导体结构层，以及通过暴露电介质层的一部分的结构层来打开多个沟槽。 电介质层的牺牲部分通过膜区域中的多个沟槽选择性地去除，以便释放结构层的相应部分以形成膜。 为了封闭沟槽，将晶片以这样的方式达到退火温度一段时间，使得膜的原子迁移以达到最小能量构型。

    PROCESS FOR MANUFACTURING MEMS DEVICES HAVING BURIED CAVITIES AND MEMS DEVICE OBTAINED THEREBY
    37.
    发明申请
    PROCESS FOR MANUFACTURING MEMS DEVICES HAVING BURIED CAVITIES AND MEMS DEVICE OBTAINED THEREBY 有权
    制造具有BURIED CAVIITY的MEMS器件和获得的MEMS器件的工艺

    公开(公告)号：US20110031567A1

    公开(公告)日：2011-02-10

    申请号：US12850548

    申请日：2010-08-04

    申请人： Pietro Corona ,  Stefano Losa ,  Ilaria Gelmi ,  Roberto Campedelli

    发明人： Pietro Corona ,  Stefano Losa ,  Ilaria Gelmi ,  Roberto Campedelli

    IPC分类号： H01L29/84 ,  H01L21/02

    CPC分类号： B81C1/00476 ,  B81B2201/0264 ,  B81B2203/0109 ,  B81B2203/0127 ,  B81C1/00047 ,  B81C2201/0109

    摘要： A process for manufacturing a MEMS device, wherein a bottom silicon region is formed on a substrate and on an insulating layer; a sacrificial region of dielectric is formed on the bottom region; a membrane region, of semiconductor material, is epitaxially grown on the sacrificial region; the membrane region is dug down to the sacrificial region so as to form through apertures; the side wall and the bottom of the apertures are completely coated in a conformal way with a porous material layer; at least one portion of the sacrificial region is selectively removed through the porous material layer and forms a cavity; and the apertures are filled with filling material so as to form a monolithic membrane suspended above the cavity.

    摘要翻译： 一种用于制造MEMS器件的方法，其中底部硅区域形成在衬底上和绝缘层上; 电介质的牺牲区形成在底部区域上; 半导体材料的膜区域在牺牲区域上外延生长; 将膜区域向下挖到牺牲区域以形成通孔; 孔的侧壁和底部以保形方式完全涂覆有多孔材料层; 牺牲区域的至少一部分被选择性地通过多孔材料层去除并形成空腔; 并且孔填充有填充材料，以便形成悬浮在空腔上方的整体膜。

    Process for manufacturing MEMS devices having buried cavities and MEMS device obtained thereby
    38.
    发明授权
    Process for manufacturing MEMS devices having buried cavities and MEMS device obtained thereby 有权
    用于制造具有掩埋腔的MEMS器件和由此获得的MEMS器件的工艺

    公开(公告)号：US08344466B2

    公开(公告)日：2013-01-01

    申请号：US12850548

    申请日：2010-08-04

    申请人： Pietro Corona ,  Stefano Losa ,  Ilaria Gelmi ,  Roberto Campedelli

    发明人： Pietro Corona ,  Stefano Losa ,  Ilaria Gelmi ,  Roberto Campedelli

    IPC分类号： H01L29/84 ,  H01L21/02

    CPC分类号： B81C1/00476 ,  B81B2201/0264 ,  B81B2203/0109 ,  B81B2203/0127 ,  B81C1/00047 ,  B81C2201/0109

    摘要： A process for manufacturing a MEMS device, wherein a bottom silicon region is formed on a substrate and on an insulating layer; a sacrificial region of dielectric is formed on the bottom region; a membrane region, of semiconductor material, is epitaxially grown on the sacrificial region; the membrane region is dug down to the sacrificial region so as to form through apertures; the side wall and the bottom of the apertures are completely coated in a conformal way with a porous material layer; at least one portion of the sacrificial region is selectively removed through the porous material layer and forms a cavity; and the apertures are filled with filling material so as to form a monolithic membrane suspended above the cavity. Other embodiments are directed to MEMS devices and pressure sensors.

    摘要翻译： 一种用于制造MEMS器件的方法，其中底部硅区域形成在衬底上和绝缘层上; 电介质的牺牲区形成在底部区域上; 半导体材料的膜区域在牺牲区域上外延生长; 将膜区域向下挖到牺牲区域以形成通孔; 孔的侧壁和底部以保形方式完全涂覆有多孔材料层; 牺牲区域的至少一部分被选择性地通过多孔材料层去除并形成空腔; 并且孔填充有填充材料，以便形成悬浮在空腔上方的整体膜。 其它实施例涉及MEMS器件和压力传感器。

    PROCESS FOR MANUFACTURING A MEMBRANE MICROELECTROMECHANICAL DEVICE, AND MEMBRANE MICROELECTROMECHANICAL DEVICE
    39.
    发明申请
    PROCESS FOR MANUFACTURING A MEMBRANE MICROELECTROMECHANICAL DEVICE, AND MEMBRANE MICROELECTROMECHANICAL DEVICE 有权
    薄膜微电子设备的制造方法和微电子电化学装置

    公开(公告)号：US20120237061A1

    公开(公告)日：2012-09-20

    申请号：US13419230

    申请日：2012-03-13

    申请人： Pietro Corona ,  Marco Ferrera ,  Igor Varisco ,  Roberto Campedelli

    发明人： Pietro Corona ,  Marco Ferrera ,  Igor Varisco ,  Roberto Campedelli

    IPC分类号： H04R3/00 ,  H01L29/84 ,  H01L21/02

    CPC分类号： B81C1/00158 ,  B81B2201/0257 ,  B81B2203/0127 ,  B81C1/00293 ,  B81C2203/0145 ,  G01L9/0042 ,  G01L9/0073

    摘要： Disclosed herein is a microelectromechanical device and a process for manufacturing same. One or more embodiments may include forming a semiconductor structural layer separated from a substrate by a dielectric layer, and opening a plurality of trenches through the structural layer exposing a portion of the dielectric layer. A sacrificial portion of the dielectric layer is selectively removed through the plurality of trenches in membrane regions so as to free a corresponding portion of the structural layer to form a membrane. To close the trenches, the wafer is brought to an annealing temperature for a time interval in such a way as to cause migration of the atoms of the membrane so as to reach a minimum energy configuration.

    摘要翻译： 本文公开了一种微机电装置及其制造方法。 一个或多个实施例可以包括通过电介质层形成与衬底分离的半导体结构层，以及通过暴露电介质层的一部分的结构层来打开多个沟槽。 电介质层的牺牲部分通过膜区域中的多个沟槽选择性地去除，以便释放结构层的相应部分以形成膜。 为了封闭沟槽，将晶片以这样的方式达到退火温度一段时间，使得膜的原子迁移以达到最小的能量构型。