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    Low k interlevel dielectric layer fabrication methods
    31.
    发明授权
    Low k interlevel dielectric layer fabrication methods 失效

    公开(公告)号：US07067415B2

    公开(公告)日：2006-06-27

    申请号：US10205930

    申请日：2002-07-25

    申请人： Weimin Li ,  Zhiping Yin ,  William Budge

    发明人： Weimin Li ,  Zhiping Yin ,  William Budge

    IPC分类号： H01L21/4763 ,  H01L21/31 ,  H01L21/477

    CPC分类号： H01L21/02126 ,  H01L21/02167 ,  H01L21/0217 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/02323 ,  H01L21/0234 ,  H01L21/31633 ,  H01L21/76825 ,  H01L21/76826 ,  H01L21/76828

    摘要： A low k interlevel dielectric layer fabrication method includes providing a substrate having integrated circuitry at least partially formed thereon. An oxide comprising interlevel dielectric layer comprising carbon and having a dielectric constant no greater than 3.5 is formed over the substrate. After forming the carbon comprising dielectric layer, it is exposed to a plasma comprising oxygen effective to reduce the dielectric constant to below what it was prior to said exposing. A low k interlevel dielectric layer fabrication method includes providing a substrate having integrated circuitry at least partially formed thereon. In a chamber, an interlevel dielectric layer comprising carbon and having a dielectric constant no greater than 3.5 is plasma enhanced chemical vapor deposited over the substrate at subatmospheric pressure. After forming the carbon comprising dielectric layer, it is exposed to a plasma comprising oxygen at a subatmospheric pressure effective to reduce the dielectric constant by at least 10% below what it was prior to said exposing. The exposing occurs without removing the substrate from the chamber between the depositing and the exposing, and pressure within the chamber is maintained at subatmospheric between the depositing and the exposing.

    Semiconductor devices, and semiconductor processing methods
    32.
    发明授权
    Semiconductor devices, and semiconductor processing methods 有权
    半导体器件和半导体处理方法

    公开(公告)号：US06828683B2

    公开(公告)日：2004-12-07

    申请号：US09219041

    申请日：1998-12-23

    申请人： Weimin Li ,  Zhiping Yin

    发明人： Weimin Li ,  Zhiping Yin

    IPC分类号： H01L2348

    CPC分类号： H01L21/76834 ,  H01L21/3185 ,  H01L21/76801 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

    摘要： In one aspect, the invention encompasses a semiconductor processing method wherein a conductive copper-containing material is formed over a semiconductive substrate and a second material is formed proximate the conductive material. A barrier layer is formed between the conductive material and the second material. The barrier layer comprises a compound having silicon chemically bonded to both nitrogen and an organic material. In another aspect, the invention encompasses a composition of matter comprising silicon chemically bonded to both nitrogen and an organic material. The nitrogen is not bonded to carbon. In yet another aspect, the invention encompasses a semiconductor processing method. A semiconductive substrate is provided and a layer is formed over the semiconductive substrate. The layer comprises a compound having silicon chemically bonded to both nitrogen and an organic material.

    摘要翻译： 一方面，本发明包括一种半导体处理方法，其中在半导体衬底上形成导电含铜材料，并且在导电材料附近形成第二材料。 在导电材料和第二材料之间形成阻挡层。 阻挡层包括具有与氮和有机材料化学键合的硅的化合物。 在另一方面，本发明包括包含与氮和有机材料化学键合的硅的物质组合物。 氮不与碳结合。 另一方面，本发明包括半导体处理方法。 提供半导体衬底并且在半导体衬底上形成层。 该层包括具有与氮和有机材料化学键合的硅的化合物。

    Low k interlevel dielectric layer fabrication methods
    33.
    发明授权
    Low k interlevel dielectric layer fabrication methods 失效
    低k层间介质层制作方法

    公开(公告)号：US07067414B1

    公开(公告)日：2006-06-27

    申请号：US09536037

    申请日：2000-03-27

    申请人： Weimin Li ,  Zhiping Yin ,  William Budge

    发明人： Weimin Li ,  Zhiping Yin ,  William Budge

    IPC分类号： H01L21/31 ,  H01L21/469 ,  H01L21/4763

    CPC分类号： H01L21/02126 ,  H01L21/02167 ,  H01L21/0217 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/02323 ,  H01L21/0234 ,  H01L21/31633 ,  H01L21/76825 ,  H01L21/76826 ,  H01L21/76828

    摘要： A low k inter-level dielectric layer fabrication method includes providing a substrate having integrated circuitry at least partially formed thereon. An oxide-comprising inter-level dielectric layer including carbon and having a dielectric constant no greater than 3.5 is formed over the substrate. After forming the dielectric layer, it is exposed to a plasma including oxygen effective to reduce the dielectric constant to below what it was prior to the exposing. A low k inter-level dielectric layer fabrication method includes providing a substrate having integrated circuitry at least patially formed thereon. In a chamber, an inter-level dielectric layer including carbon and having a dielectric constant no greater than 3.5 is plasma-enhanced chemical vapor deposited over the substrate at subatmospheric pressure. After forming the dielectric layer, it is exposed to a plasma including oxygen at subatmospheric pressure effective to reduce the dielectric constant by at least 10% below what it was prior to the exposing. The exposing occurs without removing the substrate from the chamber between the depositing and the exposing, and pressure within the chamber is maintained at subatmospheric pressure between the depositing and the exposing.

    摘要翻译： 低k层间电介质层制造方法包括提供具有至少部分地形成在其上的集成电路的衬底。 包含碳并具有不大于3.5的介电常数的含氧化物的介电层形成在衬底上。 在形成电介质层之后，将其暴露于包含氧的等离子体中，以有效地将介电常数降低到暴露前的介电常数。 低k级间介电层制造方法包括提供具有至少在其上形成的集成电路的衬底。 在室中，包含碳并具有不大于3.5的介电常数的层间电介质层是在低于大气压的压力下沉积在衬底上的等离子体增强的化学气相。 在形成电介质层之后，将其暴露于含有低于大气压的氧气的等离子体，以有效地将介电常数降低至比曝光之前低至少10％。 在沉积和暴露之间不会从基板移除基板而露出曝光，并且室内的压力保持在沉积和曝光之间的低于大气压的压力。

    Semiconductor processing methods of forming insulative materials
    36.
    发明授权
    Semiconductor processing methods of forming insulative materials 有权
    形成绝缘材料的半导体加工方法

    公开(公告)号：US6156674A

    公开(公告)日：2000-12-05

    申请号：US200035

    申请日：1998-11-25

    申请人： Weimin Li ,  Zhiping Yin

    发明人： Weimin Li ,  Zhiping Yin

    IPC分类号： H01L21/316 ,  H01L21/469

    CPC分类号： H01L21/02126 ,  H01L21/02211 ,  H01L21/02271 ,  H01L21/02274 ,  H01L21/02277 ,  H01L21/31633 ,  H01L21/31658

    摘要： In one aspect, the invention encompasses a semiconductor processing method wherein a first gaseous precursor compound is combined with a second gaseous precursor compound to form a material comprising carbon, silicon and oxygen. A layer of the material is formed over a semiconductive substrate. In another aspect, the invention encompasses another semiconductor processing method. Methylsilane is combined with a form of oxygen other than H.sub.2 O.sub.2 to form an insulative compound comprising silicon bound to CH.sub.3 groups and oxygen. A layer of the insulative compound is formed over a semiconductive substrate. In yet another aspect, the invention encompasses yet another semiconductor processing method. Methylsilane is subjected to a plasma treatment to form a layer over a semiconductive substrate, the layer comprises silicon bound to CH.sub.3 groups. The layer is exposed to oxygen to convert the layer to an insulative compound comprising silicon bound to oxygen as well as the CH.sub.3 groups.

    摘要翻译： 在一个方面，本发明包括半导体加工方法，其中第一气态前体化合物与第二气态前体化合物组合以形成包含碳，硅和氧的材料。 一层材料形成在半导体衬底上。 在另一方面，本发明包括另一种半导体处理方法。 甲基硅烷与除H 2 O 2以外的氧气形式组合以形成包含结合至CH 3基团和氧的硅的绝缘化合物。 一层绝缘化合物形成在半导体衬底上。 在另一方面，本发明还包括另一种半导体处理方法。 对甲基硅烷进行等离子体处理以在半导体基底上形成层，该层包含与CH3基团结合的硅。 该层暴露于氧气以将该层转化为包含与氧结合的硅以及CH 3基团的绝缘化合物。

    Low K interlevel dielectric layer fabrication methods
    39.
    发明授权
    Low K interlevel dielectric layer fabrication methods 失效
    低K层间介质层制作方法

    公开(公告)号：US07078356B2

    公开(公告)日：2006-07-18

    申请号：US10102110

    申请日：2002-03-19

    申请人： Weimin Li ,  Zhiping Yin ,  William Budge

    发明人： Weimin Li ,  Zhiping Yin ,  William Budge

    IPC分类号： H01L21/31 ,  H01L21/469 ,  H05H1/24

    CPC分类号： H01L21/02126 ,  H01L21/02167 ,  H01L21/0217 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/02323 ,  H01L21/0234 ,  H01L21/31633 ,  H01L21/76825 ,  H01L21/76826 ,  H01L21/76828

    摘要： A low k interlevel dielectric layer fabrication method includes providing a substrate having integrated circuitry at least partially formed thereon. An oxide comprising interlevel dielectric layer comprising carbon and having a dielectric constant no greater than 3.5 is formed over the substrate. After forming the carbon comprising dielectric layer, it is exposed to a plasma comprising oxygen effective to reduce the dielectric constant to below what it was prior to said exposing. A low k interlevel dielectric layer fabrication method includes providing a substrate having integrated circuitry at least partially formed thereon. In a chamber, an interlevel dielectric layer comprising carbon and having a dielectric constant no greater than 3.5 is plasma enhanced chemical vapor deposited over the substrate at subatmospheric pressure. After forming the carbon comprising dielectric layer, it is exposed to a plasma comprising oxygen at a subatmospheric pressure effective to reduce the dielectric constant by at least 10% below what it was prior to said exposing. The exposing occurs without removing the substrate from the chamber between the depositing and the exposing, and pressure within the chamber is maintained at subatmospheric between the depositing and the exposing.

    摘要翻译： 低k层间电介质层制造方法包括提供具有至少部分地形成在其上的集成电路的衬底。 在衬底上形成包含碳并具有不大于3.5的介电常数的层间电介质层的氧化物。 在形成包含电介质层的碳之后，将其暴露于包含氧的等离子体中，以有效地将介电常数降低到低于所述曝光之前的介电常数。 低k层间电介质层制造方法包括提供具有至少部分地形成在其上的集成电路的衬底。 在室中，包含碳并具有不大于3.5的介电常数的层间介电层是在低于大气压的压力下沉积在衬底上的等离子体增强化学气相。 在形成包含电介质层的碳之后，将其暴露于含有氧的等离子体，该等离子体压力有效地将介电常数降低至低于所述暴露之前的10％。 在沉积和暴露之间不会从衬底移除衬底而露出曝光，并且室内的压力保持在沉积和暴露之间的低于大气压。

    Low k interlevel dielectric layer fabrication methods
    40.
    发明申请
    Low k interlevel dielectric layer fabrication methods 有权

    公开(公告)号：US20060068584A1

    公开(公告)日：2006-03-30

    申请号：US11266914

    申请日：2005-11-04

    申请人： Weimin Li ,  Zhiping Yin ,  William Budge

    发明人： Weimin Li ,  Zhiping Yin ,  William Budge

    IPC分类号： H01L21/4763 ,  H01L21/31

    CPC分类号： H01L21/02126 ,  H01L21/02167 ,  H01L21/0217 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/02323 ,  H01L21/0234 ,  H01L21/31633 ,  H01L21/76825 ,  H01L21/76826 ,  H01L21/76828

    摘要： A low k interlevel dielectric layer fabrication method includes providing a substrate having integrated circuitry at least partially formed thereon. An oxide comprising interlevel dielectric layer comprising carbon and having a dielectric constant no greater than 3.5 is formed over the substrate. After forming the carbon comprising dielectric layer, it is exposed to a plasma comprising oxygen effective to reduce the dielectric constant to below what it was prior to said exposing. A low k interlevel dielectric layer fabrication method includes providing a substrate having integrated circuitry at least partially formed thereon. In a chamber, an interlevel dielectric layer comprising carbon and having a dielectric constant no greater than 3.5 is plasma enhanced chemical vapor deposited over the substrate at subatmospheric pressure. After forming the carbon comprising dielectric layer, it is exposed to a plasma comprising oxygen at a subatmospheric pressure effective to reduce the dielectric constant by at least 10% below what it was prior to said exposing. The exposing occurs without removing the substrate from the chamber between the depositing and the exposing, and pressure within the chamber is maintained at subatmospheric between the depositing and the exposing.