公开(公告)号：US5289410A

公开(公告)日：1994-02-22

申请号：US905666

申请日：1992-06-29

申请人： Romney R. Katti ,  Henry L. Stadler ,  Jiin-Chuan Wu

发明人： Romney R. Katti ,  Henry L. Stadler ,  Jiin-Chuan Wu

IPC分类号： G11C11/14 ,  G11C11/18 ,  H01L43/06

CPC分类号： G11C11/14 ,  G11C11/18 ,  H01L43/065

摘要： Improvements are made in a non-volatile magnetic random access memory. Such a memory is comprised of an array of unit cells, each having a Hall-effect sensor and a thin-film magnetic element made of material having an in-plane, uniaxial anisotropy and in-plane, bipolar remanent magnetization states. The Hall-effect sensor is made more sensitive by using a 1 m thick molecular beam epitaxy grown InAs layer on a silicon substrate by employing a GaAs/AlGaAs/InAlAs superlattice buffering layer. One improvement avoids current shunting problems of matrix architecture. Another improvement reduces the required magnetizing current for the micromagnets. Another improvement relates to the use of GaAs technology wherein high electron-mobility GaAs MESFETs provide faster switching times. Still another improvement relates to a method for configuring the invention as a three-dimensional random access memory.

摘要翻译： 在非易失性磁性随机存取存储器中进行了改进。 这种存储器包括单元阵列阵列，每个单元阵列具有霍尔效应传感器和由具有面内，单轴各向异性和面内双极残余磁化状态的材料制成的薄膜磁性元件。 通过使用GaAs / AlGaAs / InAlAs超晶格缓冲层，通过在硅衬底上使用1μm厚的分子束外延生长InAs层，使霍尔效应传感器变得更加敏感。 一个改进可以避免矩阵结构的当前分流问题。 另一个改进降低了微型磁铁所需的磁化电流。 另一个改进涉及使用GaAs技术，其中高电子迁移率GaAs MESFET提供更快的切换时间。 另一个改进涉及将本发明配置为三维随机存取存储器的方法。

公开(公告)号：US09042164B2

公开(公告)日：2015-05-26

申请号：US13429761

申请日：2012-03-26

申请人： Romney R. Katti ,  James L. Tucker ,  Anuj Kohli

发明人： Romney R. Katti ,  James L. Tucker ,  Anuj Kohli

IPC分类号： G11C11/00 ,  H01L23/00 ,  H01L27/22 ,  H01L43/02 ,  H01L43/08

CPC分类号： H01L23/576 ,  G11C11/1657 ,  G11C11/1659 ,  G11C11/1673 ,  G11C11/1675 ,  G11C11/1695 ,  H01L27/228 ,  H01L43/02 ,  H01L43/08 ,  H01L2924/0002 ,  H01L2924/16152 ,  H01L2924/00

摘要： A system may include circuitry and a magnetoresistive random access memory (MRAM) die including at least one MRAM cell. The circuitry may be configured to detect attempted tampering with the MRAM die and generate a signal based on the detected attempted tampering. The signal may be sufficient to damage or destroy at least one layer of the at least one MRAM cell or a fuse electrically connected to a read line of the at least one MRAM cell.

摘要翻译： 系统可以包括电路和包括至少一个MRAM单元的磁阻随机存取存储器（MRAM）管芯。 电路可以被配置为检测对MRAM管芯的尝试篡改，并且基于检测到的尝试篡改产生信号。 所述信号可能足以损坏或破坏所述至少一个MRAM单元的至少一层或电连接到所述至少一个MRAM单元的读取线的保险丝。

公开(公告)号：US08730715B2

公开(公告)日：2014-05-20

申请号：US13429692

申请日：2012-03-26

申请人： Romney R. Katti ,  James L. Tucker ,  Anuj Kohli

发明人： Romney R. Katti ,  James L. Tucker ,  Anuj Kohli

IPC分类号： G11C11/00 ,  H01L23/00 ,  H01L23/02 ,  G11C11/16

CPC分类号： H01L23/57 ,  G11C11/16 ,  G11C11/1657 ,  G11C11/1659 ,  G11C11/1673 ,  G11C11/1675 ,  G11C11/1695 ,  H01L23/573 ,  H01L27/228 ,  H01L43/02 ,  H01L2924/0002 ,  H01L2924/16152 ,  H01L2924/00

摘要： A magnetoresistive random access memory (MRAM) die may include an MRAM cell, a reservoir defined by the MRAM die, and a chemical disposed in the reservoir. At least one boundary of the reservoir may be configured to be damaged in response to attempted tampering with the MRAM die, such that at least some of the chemical is released from the reservoir when the at least one boundary of the reservoir is damaged. In some examples, at least some of the chemical is configured to contact and alter or damage at least a portion of the MRAM cell when the chemical is released from the reservoir.

摘要翻译： 磁阻随机存取存储器（MRAM）管芯可以包括MRAM单元，由MRAM管芯限定的储存器和设置在贮存器中的化学物质。 储存器的至少一个边界可以被配置为响应于试图篡改MRAM管芯而被损坏，使得当储存器的至少一个边界被损坏时，至少一些化学物质从贮存器释放。 在一些实例中，当化学品从储存器中释放时，至少一些化学物质被配置为接触和改变或损坏MRAM单元的至少一部分。

公开(公告)号：US08415775B2

公开(公告)日：2013-04-09

申请号：US12953133

申请日：2010-11-23

申请人： Romney R. Katti

发明人： Romney R. Katti

IPC分类号： H01L23/552

CPC分类号： H01L23/13 ,  H01L23/053 ,  H01L23/552 ,  H01L25/0657 ,  H01L27/222 ,  H01L2224/48091 ,  H01L2224/49171 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06537 ,  H01L2225/06555 ,  H01L2924/3025 ,  H01L2924/00014 ,  H01L2924/00

摘要： A system comprises a plurality of stacked integrated circuit dice, each integrated circuit die comprising at least one circuit, a package enclosing the plurality of dice, and at least two magnetic shields configured to magnetically shield the at least one circuit of each of the plurality of integrate circuit dice. At least one of the magnetic shields is within the package, and at least two of the plurality of stacked integrated circuit dice are positioned between the at least two magnetic shields.

摘要翻译： 一种系统包括多个堆叠的集成电路芯片，每个集成电路管芯包括至少一个电路，封装多个裸片的封装以及至少两个磁屏蔽，所述至少两个磁屏蔽被构造成磁屏蔽所述多个芯片中的每一个的至少一个电路 集成电路骰子。 所述磁屏蔽中的至少一个在所述封装内，并且所述多个堆叠集成电路裸片中的至少两个被定位在所述至少两个磁屏蔽之间。

公开(公告)号：US08374020B2

公开(公告)日：2013-02-12

申请号：US12916238

申请日：2010-10-29

申请人： Romney R. Katti

发明人： Romney R. Katti

IPC分类号： G11C11/00 ,  G11C5/08 ,  G11C11/14

CPC分类号： H01L27/222 ,  G11C11/161 ,  H03K19/18

摘要： A system includes a continuous thin-film ferromagnetic layer, N magnetic tunnel junction (MTJ) devices, and N write structures. The continuous thin-film ferromagnetic layer includes N modified regions. Each of the N modified regions is configured to stabilize a magnetic domain wall located in the continuous thin-film ferromagnetic layer. Each of the N MTJ devices includes one of N portions of the continuous thin-film ferromagnetic layer. Adjacent MTJ devices of the N MTJ devices are separated by one of the N modified regions. Each of the N write structures is configured to receive current and generate a magnetic field that magnetizes a different one of the N portions of the continuous thin-film ferromagnetic layer. N is an integer greater than 2.

摘要翻译： 一种系统包括连续的薄膜铁磁层，N磁性隧道结（MTJ）器件和N个写入结构。 连续薄膜铁磁层包括N个改性区域。 N个修饰区域中的每一个被配置为稳定位于连续薄膜铁磁层中的磁畴壁。 N个MTJ装置中的每一个包括连续薄膜铁磁层的N个部分中的一个。 N个MTJ设备的相邻MTJ设备由N个修改区域之一分隔开。 N个写入结构中的每一个被配置为接收电流并且产生使连续薄膜铁磁层的N个部分中的不同一个磁化的磁场。 N是大于2的整数。

公开(公告)号：US08339843B2

公开(公告)日：2012-12-25

申请号：US12971244

申请日：2010-12-17

申请人： Romney R. Katti

发明人： Romney R. Katti

IPC分类号： G11C11/00

CPC分类号： G11C7/04 ,  G11C11/161 ,  G11C11/1675 ,  G11C11/1697

摘要： This disclosure describes write current temperature compensation techniques for use in programming a data storage device that includes one or more memory cells. The techniques may include programming a programmable magnetization state of a magnetoresistive device included within a resistance network based on a signal indicative of the operating temperature of a magnetic memory cell. The techniques may further include generating a write current having a magnitude that is determined at least in part by the programmable magnetization state of the magnetoresistive device. The techniques may further include supplying the write current to the magnetic memory cell for programming a programmable magnetization state of the magnetic memory cell.

摘要翻译： 本公开描述了用于编程包括一个或多个存储器单元的数据存储设备的写入当前温度补偿技术。 这些技术可以包括基于指示磁存储器单元的工作温度的信号来编程包括在电阻网络内的磁阻器件的可编程磁化状态。 这些技术可以进一步包括产生具有至少部分由磁阻器件的可编程磁化状态确定的幅度的写入电流。 这些技术可以进一步包括向磁性存储单元提供写入电流以编程磁性存储单元的可编程磁化状态。

公开(公告)号：US20090073755A1

公开(公告)日：2009-03-19

申请号：US11376433

申请日：2006-03-15

申请人： Romney R. Katti

发明人： Romney R. Katti

IPC分类号： G11C11/14 ,  H01L29/82

CPC分类号： G11C11/1673 ,  H01L43/08

摘要： A new read scheme is provided for an MRAM bit having a reference layer (fixed) and a storage layer (free) sandwiching a nonmagnetic spacer layer. The reference layer has a magnetization direction that is tilted with respect to an easy axis of the storage layer. By applying a magnetic field to the bit at least partially orthogonal to the easy axis, the magnetization direction of the storage layer can be partially rotated or canted without switching the logical state of the MRAM bit. The resistivity of the bit is measured (calculated based on a voltage/current relationship) in two ways: (i) with the magnetization direction of the storage layer partially rotated in a first direction and (ii) with the magnetization direction of the storage layer in its bi-stable orientation parallel to the easy axis. Those measures can then be used to compare and determine the logical state of the storage layer.

公开(公告)号：US20090034321A1

公开(公告)日：2009-02-05

申请号：US11832416

申请日：2007-08-01

申请人： Romney R. Katti

发明人： Romney R. Katti

IPC分类号： G11C11/00

CPC分类号： H01F10/3272 ,  B82Y25/00 ,  G11C11/161

摘要： An improved magnetoresistive element may include a pinned magnetic structure, a free magnetic structure, and a spacer layer coupled between the pinned magnetic structure and the free magnetic structure, where the free magnetic structure includes (i) a synthetic anti-ferromagnetic structure (SAF) including two or more anti-ferromagnetically coupled ferromagnetic layers, and (ii) a first biasing layer coupled to the SAF that impedes a decoupling of the two or more anti-ferromagnetically coupled ferromagnetic layers. The first biasing layer may be an anti-ferromagnetic layer, and may be weakly coupled to the SAF. The free magnetic structure may also include (i) a second biasing layer coupled to the SAF that further impedes a decoupling of the two or more anti-ferromagnetically coupled ferromagnetic layers, and/or (ii) a non-magnetic layer coupled between the first biasing layer and the SAF that controls a coupling strength between the first biasing layer and the SAF.

摘要翻译： 改进的磁阻元件可以包括钉扎磁结构，自由磁结构和耦合在钉扎磁结构和自由磁结构之间的间隔层，其中自由磁结构包括（i）合成反铁磁结构（SAF） 包括两个或更多个反铁磁耦​​合铁磁层，以及（ii）耦合到SAF的第一偏置层，其阻止两个或更多个反铁磁耦​​合的铁磁层的去耦合。 第一偏置层可以是反铁磁性层，并且可能弱耦合到SAF。 自由磁结构还可以包括（i）耦合到SAF的第二偏置层，其进一步阻碍两个或更多个反铁磁耦​​合的铁磁层的去耦合，和/或（ii）耦合在第一 偏压层和控制第一偏压层和SAF之间的耦合强度的SAF。

公开(公告)号：US07248496B2

公开(公告)日：2007-07-24

申请号：US11273214

申请日：2005-11-14

申请人： Romney R. Katti ,  Owen J. Hynes ,  Daniel S. Reed ,  Hassan Kaakani

发明人： Romney R. Katti ,  Owen J. Hynes ,  Daniel S. Reed ,  Hassan Kaakani

IPC分类号： G11C7/00

CPC分类号： G11C11/16

摘要： A new read scheme is provided for an MRAM bit having a pinned layer (fixed) and a storage layer (free) sandwiching a nonmagnetic spacer layer. By applying a magnetic field to the bit at least partially orthogonal to the easy axis of the bit, the magnetization direction of the storage layer can be partially rotated or canted without switching the logical state of the MRAM bit. The resistivity of the bit is measured (calculated based on a voltage/current relationship) in two ways: (i) with the magnetization direction of the storage layer partially rotated in a first direction and (ii) with the magnetization direction of the storage layer in its bi-stable orientation parallel to the easy axis. Those measures can then be used to compare and determine the logical state of the storage layer. For instance, if the canted resistivity is greater than the uncanted resistivity then the magnetization directions of the pinned and storage layer are parallel, and if the canted resistivity is less than the uncanted resistivity then the magnetization directions of the pinned and storage layer are opposite.

公开(公告)号：US07183042B2

公开(公告)日：2007-02-27

申请号：US10706067

申请日：2003-11-12

申请人： Romney R. Katti ,  Paul S. Fechner ,  Gordon A. Shaw ,  Daniel S. Reed ,  David W. Zou

发明人： Romney R. Katti ,  Paul S. Fechner ,  Gordon A. Shaw ,  Daniel S. Reed ,  David W. Zou

IPC分类号： G03F7/20

CPC分类号： G11C11/16

摘要： In a process of making a magnetoresistive memory device, a mask layout is produced by use of any suitable design tool. The mask layout is laid out in grids having a central grid forming a central section and grids forming bit end sections, and the grids of the bit end sections are rectangles. A mask is made by use of the mask layout, and the mask has stepped bit ends. The mask is used to make a magnetic storage layer having tapered bit ends, to make a magnetic sense layer having tapered bit ends, and to make a non-magnetic layer having tapered bit ends. The non-magnetic layer is between the magnetic sense layer and the magnetic storage layer.

摘要翻译： 在制造磁阻存储器件的过程中，通过使用任何合适的设计工具来生产掩模布局。 掩模布局布置在具有形成中心部分的中心格栅和形成钻头末端部分的格栅的格栅中，钻头端部的格栅为矩形。 使用掩模布局制作掩模，并且掩模具有阶梯位。 该掩模用于制造具有锥形位端的磁存储层，以形成具有锥形位端的磁感应层，并制成具有锥形位端的非磁性层。 非磁性层位于磁感应层和磁性存储层之间。