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114 条记录 (耗时 0.07 秒)

    Bicyclic amine derivative
    34.
    发明授权
    Bicyclic amine derivative 失效
    双环胺衍生物

    公开(公告)号：US06191129B1

    公开(公告)日：2001-02-20

    申请号：US09147893

    申请日：1999-03-18

    申请人： Makoto Takemura ,  Hisashi Takahashi ,  Katsuhiro Kawakami

    发明人： Makoto Takemura ,  Hisashi Takahashi ,  Katsuhiro Kawakami

    IPC分类号： A61K315383

    CPC分类号： C07D498/06

    摘要： A pyridobenzoxazine derivative having a bicyclic amine derivative as its substituent, represented by the formula (I): exhibiting antimcrobial activity, and useful in treating infectious diseases and preserving food and agricultural products.

    摘要翻译： 由式（I）表示的具有双环胺衍生物作为取代基的吡啶并苯并恶嗪衍生物：具有抗菌活性，可用于治疗感染性疾病和保存食品和农产品。

    Integrated high voltage capacitor having capacitance uniformity structures and a method of manufacture therefor
    35.
    发明授权
    Integrated high voltage capacitor having capacitance uniformity structures and a method of manufacture therefor 有权
    具有电容均匀性结构的集成高压电容器及其制造方法

    公开(公告)号：US08273623B2

    公开(公告)日：2012-09-25

    申请号：US13396159

    申请日：2012-02-14

    申请人： David L. Larkin ,  Lily X. Springer ,  Makoto Takemura ,  Ashish V. Gokhale ,  Dhaval A. Saraiya

    发明人： David L. Larkin ,  Lily X. Springer ,  Makoto Takemura ,  Ashish V. Gokhale ,  Dhaval A. Saraiya

    IPC分类号： H01L21/8242

    CPC分类号： H01L27/0688 ,  H01L23/5223 ,  H01L2924/0002 ,  H01L2924/00

    摘要： The present invention provides an integrated high voltage capacitor, a method of manufacture therefore, and an integrated circuit chip including the same. The integrated high voltage capacitor, among other features, includes a first capacitor plate (120) located over or in a semiconductor substrate (105), and an insulator (130) located over the first capacitor plate (120), at least a portion of the insulator (130) comprising an interlevel dielectric layer (135, 138, 143, or 148). The integrated high voltage capacitor further includes capacitance uniformity structures (910) located at least partially within the insulator (130) and a second capacitor plate (160) located over the insulator (130).

    摘要翻译： 本发明提供了一种集成的高压电容器，因此制造方法和包括其的集成电路芯片。 集成的高压电容器以及其它特征包括位于半导体衬底（105）上方或半导体衬底（105）中的第一电容器板（120）和位于第一电容器板（120）上方的绝缘体（130），至少一部分 绝缘体（130）包括层间介电层（135,138,143或148）。 集成高压电容器还包括至少部分位于绝缘体（130）内的电容均匀性结构（910）和位于绝缘体（130）上方的第二电容器板（160）。

    Manufacturing method for epitaxial wafer
    37.
    发明授权
    Manufacturing method for epitaxial wafer 有权
    外延晶圆的制造方法

    公开(公告)号：US07960254B2

    公开(公告)日：2011-06-14

    申请号：US12645744

    申请日：2009-12-23

    申请人： Naoyuki Wada ,  Makoto Takemura

    发明人： Naoyuki Wada ,  Makoto Takemura

    IPC分类号： H01L21/20 ,  C23C16/00

    CPC分类号： H01L21/68742 ,  C23C16/4411 ,  C23C16/481 ,  C23C24/082 ,  H01L21/02532 ,  H01L21/02579

    摘要： To provide a manufacturing method for an epitaxial wafer that alleviates distortions on a back surface thereof due to sticking between a wafer and a susceptor, thereby preventing decrease in flatness thereof due to a lift pin. A manufacturing method for an epitaxial wafer according to the present invention includes: an oxide film forming step in which an oxide film is formed on a back surface thereof; an etching step in which a hydrophobic portion exposing a back surface of the semiconductor wafer is provided by partially removing the oxide film; a wafer placing step in which the semiconductor wafer is placed; and an epitaxial growth step in which an epitaxial layer is grown on a main surface of the semiconductor wafer; and the diameter of the lift pin installation circle provided on a circle on a bottom face of a susceptor is smaller than that of the hydrophobic portion.

    摘要翻译： 为了提供一种外延晶片的制造方法，其能够缓和由于晶片和基座之间的粘附而引起的背面的变形，从而防止由于升降销引起的平坦度的降低。 根据本发明的外延晶片的制造方法包括：在其背面形成有氧化膜的氧化膜形成工序; 通过部分去除氧化膜来提供暴露半导体晶片的背面的疏水部分的蚀刻步骤; 放置半导体晶片的晶片放置步骤; 以及在半导体晶片的主表面上生长外延层的外延生长步骤; 并且设置在基座的底面上的圆上的提升销安装圈的直径小于疏水部分的直径。

    Semiconductor wafer treatment method and apparatus therefor
    38.
    发明授权
    Semiconductor wafer treatment method and apparatus therefor 有权
    半导体晶片处理方法及其装置

    公开(公告)号：US07731801B2

    公开(公告)日：2010-06-08

    申请号：US11213809

    申请日：2005-08-30

    申请人： Makoto Takemura ,  Yasuo Fukuda ,  Kazuaki Souda ,  Junichiro Iwahashi ,  Koichi Okuda

    发明人： Makoto Takemura ,  Yasuo Fukuda ,  Kazuaki Souda ,  Junichiro Iwahashi ,  Koichi Okuda

    IPC分类号： B08B6/00 ,  C25F1/00 ,  C25F3/30

    CPC分类号： H01L21/02052 ,  B08B3/04 ,  B08B2203/005 ,  H01L21/304

    摘要： In the ozone water treatment process, the silicon wafer is treated with the first ultra-pure water that includes ozone. The first ultra-pure water is refined by the ultraviolet ray sterilization method. The first ultra-pure water includes total organic carbon content of more than 1 μg/liter and not more than 20 μg/liter, so that the silicon wafer of the predetermined degree of cleanliness is obtained. The silicon wafer is treated by using the second ultra-pure water that has a lower TOC value than the first ultra-pure water in the ultra-pure water rinsing process (including the chemical solution cleaning process as required). The second ultra-pure water is refined by the ultraviolet ray oxidization method, and includes total organic carbon content with a concentration of 1 μg/liter or less. Thus the silicon wafer of the predetermined degree of cleanliness is obtained.

    摘要翻译： 在臭氧水处理工艺中，用包含臭氧的第一超纯水处理硅晶片。 第一超纯水通过紫外线灭菌法精制。 第一超纯水的总有机碳含量大于1μg/升且不大于20μg/升，从而获得预定清洁度的硅晶片。 在超纯水冲洗过程（包括所需的化学溶液清洗过程）中，使用具有比第一超纯水低的TOC值的第二超纯水处理硅晶片。 第二超纯水通过紫外线氧化法精制，其总有机碳含量为1μg/升以下。 因此，获得了预定清洁度的硅晶片。

    Pyridobenzoxazine derivative
    39.
    发明申请
    Pyridobenzoxazine derivative 审中-公开
    吡啶并苯并恶嗪衍生物

    公开(公告)号：US20070191356A1

    公开(公告)日：2007-08-16

    申请号：US10587946

    申请日：2005-02-01

    申请人： Makoto Takemura ,  Hitoshi Ohki

    发明人： Makoto Takemura ,  Hitoshi Ohki

    IPC分类号： A61K31/535 ,  C07D265/38

    CPC分类号： C07D498/06 ,  A23K20/111 ,  A23K20/195 ,  A23K50/80 ,  A23L3/3544 ,  A61K31/5383

    摘要： A quinolone antimicrobial agent having potent antimicrobial activity against gram positive and gram negative bacteria and having high safety is provided. A compound represented by the following formula (1): [Chemical formula 1] [wherein, R1: hydrogen, alkyl, cycloalkyl, or substituted carbonyl derived from amino acid, peptide or tripeptide; R2: hydrogen, alkyl, or cycloalkyl; R3: hydrogen, amino, halogen, or alkyl; R4: hydrogen, phenyl, acetoxymethyl, pivaloyloxymethyl, ethoxycarbonyl, choline, dimethylaminoethyl, 5-indanyl, phthalidinyl, 5-alkyl-2-oxo-1,3-dioxol-4-ylmethyl, 3-acetoxy-2-oxobutyl, alkyl, alkoxymethyl, or phenylalkyl; X, X1, X2: hydrogen or halogen] or salt thereof, or a hydrate thereof; and antimicrobial agent and therapeutic agent for infections, each containing the compound, salt thereof or a hydrate thereof.

    摘要翻译： 提供了对革兰氏阳性和革兰氏阴性细菌具有强抗微生物活性并具有高安全性的喹诺酮类抗微生物剂。 由下式（1）表示的化合物：[化学式1] [其中，R 1，H 2，氢，烷基，环烷基或衍生自氨基酸，肽或三肽的取代的羰基; R 2：氢，烷基或环烷基; 氢，氨基，卤素或烷基; 吡啶，二甲基氨基乙基，5-茚满基，邻苯二甲酰基，5-烷基-2-氧代-1,3-二氧杂环戊烯-4-基甲基，3-甲氧基羰基， 乙酰氧基-2-氧代丁基，烷基，烷氧基甲基或苯基烷基; X，X 1，X 2：氢或卤素]或其盐或其水合物; 和抗微生物剂和感染治疗剂，各自含有化合物，其盐或其水合物。

    Integrated high voltage capacitor and a method of manufacture therefor
    40.
    发明申请
    Integrated high voltage capacitor and a method of manufacture therefor 审中-公开
    集成式高压电容器及其制造方法

    公开(公告)号：US20060186450A1

    公开(公告)日：2006-08-24

    申请号：US11249535

    申请日：2005-10-13

    申请人： David Larkin ,  Lily Springer ,  Makoto Takemura ,  Ashish Gokhale ,  Dhaval Saraiya

    发明人： David Larkin ,  Lily Springer ,  Makoto Takemura ,  Ashish Gokhale ,  Dhaval Saraiya

    IPC分类号： H01L29/94

    CPC分类号： H01L29/94

    摘要： The present invention provides an integrated high voltage capacitor, a method of manufacture therefore, and an integrated circuit chip including the same. The integrated high voltage capacitor, among other features, includes a first capacitor plate (120) located over or in a semiconductor substrate (105), and an insulator (130) located over the first capacitor plate (120), at least a portion of the insulator (130) comprising an interlevel dielectric layer (135, 138, 143, or 148). The integrated high voltage capacitor further includes a second capacitor plate (160) located over the insulator (130).

    摘要翻译： 本发明提供了一种集成的高压电容器，因此制造方法和包括其的集成电路芯片。 集成的高压电容器以及其它特征包括位于半导体衬底（105）上方或半导体衬底（105）中的第一电容器板（120）和位于第一电容器板（120）上方的绝缘体（130），至少一部分 绝缘体（130）包括层间介电层（135,138,143或148）。 集成高压电容器还包括位于绝缘体（130）上方的第二电容器板（160）。