公开(公告)号：US20150188039A1

公开(公告)日：2015-07-02

申请号：US14140755

申请日：2013-12-26

Applicant: Intermolecular Inc.

Inventor： Yun Wang ,  Vidyut Gopal ,  Mihir Tendulkar

IPC: H01L45/00 ,  H01L27/24

CPC classification number: H01L45/12 ,  H01L27/2463 ,  H01L27/2481 ,  H01L45/08 ,  H01L45/145 ,  H01L45/146 ,  H01L45/16

Abstract: Provided are resistive random access memory (ReRAM) cells and methods of fabricating thereof. The ReRAM cells may include a first layer operable as a bottom electrode and a second layer operable to switch between at least a first resistive state and a second resistive state. The ReRAM cells may include a third layer including a first oxygen getter material and a fourth layer including a metal silicon nitride. The ReRAM cells may further include a fifth layer including a second oxygen getter material. The first oxygen getter material and the second oxygen getter material may be more reactive with oxygen than the metal silicon nitride. A work function of the first oxygen getter material and a work function of the second oxygen getter material may be substantially lower than a work function of the metal silicon nitride. The ReRAM cells may include a sixth layer operable as a top electrode.

Abstract translation: 提供了电阻随机存取存储器（ReRAM）单元及其制造方法。 ReRAM单元可以包括可操作为底部电极的第一层和可操作以在至少第一电阻状态和第二电阻状态之间切换的第二层。 ReRAM单元可以包括包括第一氧吸气材料的第三层和包括金属氮化硅的第四层。 ReRAM单元还可以包括第五层，其包括第二氧气吸气材料。 第一吸氧剂材料和第二氧气吸气材料可以比金属氮化硅更能反应氧气。 第一吸氧剂材料的功函数和第二吸氧剂材料的功函数可以基本上低于金属氮化硅的功函数。 ReRAM单元可以包括可操作为顶部电极的第六层。

公开(公告)号：US09065040B2

公开(公告)日：2015-06-23

申请号：US14510390

申请日：2014-10-09

Applicant: Intermolecular Inc. ,  Kabushiki Kaisha Toshiba ,  SanDisk 3D LLC

Inventor： Chien-Lan Hsueh ,  Vidyut Gopal ,  Randall J. Higuchi ,  Takeshi Yamaguchi

IPC: H01L21/00 ,  H01L21/16 ,  H01L29/06 ,  H01L47/02 ,  H01L45/00 ,  H01L27/24

CPC classification number: H01L45/085 ,  H01L27/2481 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/145 ,  H01L45/146 ,  H01L45/1616

Abstract: A method of fabricating a resistive random access memory (ReRAM) cell may include forming a set of nanolaminate structures over an electrode, such that each structure includes at least one first element oxide layer and at least one second element oxide layer. The overall set is operable as a resistive switching layer in a ReRAM cell. In this set, an average atomic ratio of the first element to the second element is different in at least two nanolaminate structures. This ratio may be less in nanolaminate structures that are closer to electrodes than in the middle nanolaminate structures. Alternatively, this ratio may increase from one end of the set to another. The first element may be less electronegative than the second elements. The first element may be hafnium, while the second element may be one of zirconium, aluminum, titanium, tantalum, or silicon.

Abstract translation: 制造电阻随机存取存储器（ReRAM）单元的方法可以包括在电极上形成一组纳米级氨基酸结构，使得每个结构包括至少一个第一元件氧化物层和至少一个第二元件氧化物层。 整个集合可用作ReRAM单元中的电阻式开关层。 在该组中，第一元素与第二元素的平均原子比在至少两个纳米层间结构中不同。 在比中间的Nanolaminate结构中更接近于电极的纳米酸盐结构中，该比例可能更小。 或者，该比率可以从集合的一端增加到另一端。 第一元素可能比第二元素具有更少的电负性。 第一元素可以是铪，而第二元素可以是锆，铝，钛，钽或硅中的一种。

公开(公告)号：US20150060753A1

公开(公告)日：2015-03-05

申请号：US14510390

申请日：2014-10-09

Applicant: Intermolecular Inc. ,  Kabushiki Kaisha Toshiba ,  SanDisk 3D LLC

Inventor： Chien-Lan Hsueh ,  Vidyut Gopal ,  Randall J. Higuchi ,  Takeshi Yamaguchi

IPC: H01L45/00

CPC classification number: H01L45/085 ,  H01L27/2481 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/145 ,  H01L45/146 ,  H01L45/1616

Abstract: A method of fabricating a resistive random access memory (ReRAM) cell may include forming a set of nanolaminate structures over an electrode, such that each structure includes at least one first element oxide layer and at least one second element oxide layer. The overall set is operable as a resistive switching layer in a ReRAM cell. In this set, an average atomic ratio of the first element to the second element is different in at least two nanolaminate structures. This ratio may be less in nanolaminate structures that are closer to electrodes than in the middle nanolaminate structures. Alternatively, this ratio may increase from one end of the set to another. The first element may be less electronegative than the second elements. The first element may be hafnium, while the second element may be one of zirconium, aluminum, titanium, tantalum, or silicon.

Abstract translation: 制造电阻随机存取存储器（ReRAM）单元的方法可以包括在电极上形成一组纳米级氨基酸结构，使得每个结构包括至少一个第一元件氧化物层和至少一个第二元件氧化物层。 整个集合可用作ReRAM单元中的电阻式开关层。 在该组中，第一元素与第二元素的平均原子比在至少两个纳米层间结构中不同。 在比中间的Nanolaminate结构中更接近于电极的纳米酸盐结构中，该比例可能更小。 或者，该比率可以从集合的一端增加到另一端。 第一元素可能比第二元素具有更少的电负性。 第一元素可以是铪，而第二元素可以是锆，铝，钛，钽或硅中的一种。

公开(公告)号：US20150034898A1

公开(公告)日：2015-02-05

申请号：US14519376

申请日：2014-10-21

Applicant: Intermolecular Inc. ,  Kabushiki Kaisha Toshiba ,  SanDisk 3D LLC

Inventor： Yun Wang ,  Vidyut Gopal ,  Chien-Lan Hsueh

IPC: H01L45/00

CPC classification number: H01L45/10 ,  G11C13/0002 ,  G11C13/0007 ,  G11C2213/15 ,  G11C2213/51 ,  G11C2213/56 ,  G11C2213/71 ,  G11C2213/77 ,  H01L45/08 ,  H01L45/1253 ,  H01L45/1266 ,  H01L45/145 ,  H01L45/146 ,  H01L45/1616 ,  H01L45/1625 ,  H01L45/1641

Abstract: Provided are resistive random access memory (ReRAM) cells and methods of fabricating thereof. A stack including a defect source layer, a defect blocking layer, and a defect acceptor layer disposed between the defect source layer and the defect blocking layer may be subjected to annealing. During the annealing, defects are transferred in a controllable manner from the defect source layer to the defect acceptor layer. At the same time, the defects are not transferred into the defect blocking layer thereby creating a lowest concentration zone within the defect acceptor layer. This zone is responsible for resistive switching. The precise control over the size of the zone and the defect concentration within the zone allows substantially improvement of resistive switching characteristics of the ReRAM cell. In some embodiments, the defect source layer includes aluminum oxynitride, the defect blocking layer includes titanium nitride, and the defect acceptor layer includes aluminum oxide.

Abstract translation: 提供了电阻随机存取存储器（ReRAM）单元及其制造方法。 可以对包括缺陷源层，缺陷阻挡层和设置在缺陷源层和缺陷阻挡层之间的缺陷受主层的堆叠进行退火。 在退火过程中，缺陷以可控方式从缺陷源层转移到缺陷受体层。 同时，缺陷不会转移到缺陷阻挡层中，从而在缺陷受体层内形成最低浓度区。 该区域负责电阻交换。 精确控制区域的尺寸和区域内的缺陷浓度允许ReRAM单元的电阻开关特性得到显着改善。 在一些实施例中，缺陷源层包括氮氧化铝，缺陷阻挡层包括氮化钛，缺陷受主层包括氧化铝。

公开(公告)号：US08912518B2

公开(公告)日：2014-12-16

申请号：US13671824

申请日：2012-11-08

Applicant: Intermolecular, Inc.

Inventor： David Chi ,  Vidyut Gopal ,  Minh Huu Le ,  Minh Anh Nguyen ,  Dipankar Pramanik ,  Milind Weling

IPC: H01L29/02 ,  H01L47/00 ,  G11C11/00 ,  H01L45/00 ,  G11C13/00

CPC classification number: H01L45/145 ,  G11C13/0007 ,  G11C2213/32 ,  H01L27/2409 ,  H01L27/2463 ,  H01L45/08 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/14 ,  H01L45/146 ,  H01L45/1616

Abstract: Provided are semiconductor devices, such as resistive random access memory (ReRAM) cells, that include current limiting layers formed from doped metal oxides and/or nitrides. These current limiting layers may have resistivities of at least about 1 Ohm-cm. This resistivity level is maintained even when the layers are subjected to strong electrical fields and/or high temperature annealing. In some embodiments, the breakdown voltage of a current limiting layer may be at least about 8V. Some examples of such current limiting layers include titanium oxide doped with niobium, tin oxide doped with antimony, and zinc oxide doped with aluminum. Dopants and base materials may be deposited as separate sub-layers and then redistributed by annealing or may be co-deposited using reactive sputtering or co-sputtering. The high resistivity of the layers allows scaling down the size of the semiconductor devices including these layer while maintaining their performance.

Abstract translation: 提供了诸如电阻随机存取存储器（ReRAM）单元的半导体器件，其包括由掺杂的金属氧化物和/或氮化物形成的限流层。 这些限流层可具有至少约1欧姆 - 厘米的电阻率。 即使当这些层受到强电场和/或高温退火时，也保持该电阻率水平。 在一些实施例中，限流层的击穿电压可以为至少约8V。 这种电流限制层的一些实例包括掺杂有铌的氧化钛，掺杂有锑的氧化锡和掺杂有铝的氧化锌。 掺杂剂和基材可以作为单独的子层沉积，然后通过退火重新分布，或者可以使用反应溅射或共溅射共沉积。 层的高电阻率允许在保持其性能的同时缩小包括这些层的半导体器件的尺寸。

公开(公告)号：US20140363920A1

公开(公告)日：2014-12-11

申请号：US14466695

申请日：2014-08-22

Applicant: Intermolecular Inc. ,  Kabushiki Kaisha Toshiba ,  SanDisk 3D LLC

Inventor： Zhendong Hong ,  Vidyut Gopal ,  Imran Hashim ,  Randall J. Higuchi ,  Tim Minvielle ,  Hieu Pham ,  Takeshi Yamaguchi

IPC: H01L45/00

CPC classification number: H01L45/146 ,  H01L27/2463 ,  H01L45/04 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/1616

Abstract: Embodiments of the invention generally relate to nonvolatile memory devices and methods for manufacturing such memory devices. The methods for forming improved memory devices, such as a ReRAM cells, provide optimized, atomic layer deposition (ALD) processes for forming a metal oxide film stack which contains at least one hard metal oxide film (e.g., metal is completely oxidized or substantially oxidized) and at least one soft metal oxide film (e.g., metal is less oxidized than hard metal oxide). The soft metal oxide film is less electrically resistive than the hard metal oxide film since the soft metal oxide film is less oxidized or more metallic than the hard metal oxide film. In one example, the hard metal oxide film is formed by an ALD process utilizing ozone as the oxidizing agent while the soft metal oxide film is formed by another ALD process utilizing water vapor as the oxidizing agent.

Abstract translation: 本发明的实施例一般涉及用于制造这种存储器件的非易失性存储器件和方法。 用于形成改进的存储器件（例如ReRAM单元）的方法提供优化的原子层沉积（ALD）工艺，用于形成金属氧化物膜堆叠，其包含至少一个硬金属氧化物膜（例如，金属被完全氧化或基本上被氧化 ）和至少一种软金属氧化物膜（例如，金属比硬金属氧化物氧化较少）。 由于软金属氧化物膜比硬金属氧化物膜氧化得更少或更金属，所以软金属氧化物膜的电阻小于硬金属氧化物膜。 在一个实例中，通过利用臭氧作为氧化剂的ALD工艺形成硬质金属氧化物膜，而通过利用水蒸汽作为氧化剂的另一ALD工艺形成软金属氧化物膜。

公开(公告)号：US20140217348A1

公开(公告)日：2014-08-07

申请号：US14252285

申请日：2014-04-14

Applicant: Intermolecular Inc. ,  Kabushiki Kaisha Toshiba ,  SanDisk 3D LLC

Inventor： Hieu Pham ,  Vidyut Gopal ,  Imran Hashim ,  Tim Minvielle ,  Yun Wang ,  Takeshi Yamaguchi ,  Hong Sheng Yang

IPC: H01L45/00

CPC classification number: H01L45/08 ,  H01L27/2409 ,  H01L27/2463 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/145 ,  H01L45/146 ,  H01L45/147 ,  H01L45/16 ,  H01L45/1616 ,  H01L45/1625 ,  H01L45/1641

Abstract: Embodiments of the invention include nonvolatile memory elements and memory devices comprising the nonvolatile memory elements. Methods for forming the nonvolatile memory elements are also disclosed. The nonvolatile memory element comprises a first electrode layer, a second electrode layer, and a plurality of layers of an oxide disposed between the first and second electrode layers. One of the oxide layers has linear resistance and substoichiometric composition, and the other oxide layer has bistable resistance and near-stoichiometric composition. Preferably, the sum of the two oxide layer thicknesses is between about 20 Å and about 100 Å, and the oxide layer with bistable resistance has a thickness between about 25% and about 75% of the total thickness. In one embodiment, the oxide layers are formed using reactive sputtering in an atmosphere with controlled flows of argon and oxygen.

Abstract translation: 本发明的实施例包括非易失性存储器元件和包括非易失性存储元件的存储器件。 还公开了形成非易失性存储元件的方法。 非易失性存储元件包括第一电极层，第二电极层和设置在第一和第二电极层之间的多个氧化物层。 氧化物层中的一个具有线性电阻和亚化学计量组成，另一个氧化物层具有双稳态电阻和近化学计量组成。 优选地，两个氧化物层厚度的总和在约和之间，并且具有双稳态电阻的氧化物层具有在总厚度的约25％至约75％之间的厚度。 在一个实施例中，氧化物层在具有受控的氩气和氧气的气氛中使用反应溅射形成。

公开(公告)号：US20140073107A1

公开(公告)日：2014-03-13

申请号：US13897050

申请日：2013-05-17

Applicant: Intermolecular Inc.

Inventor： Yun Wang ,  Tony P. Chiang ,  Vidyut Gopal ,  Imran Hashim ,  Dipankar Pramanik

IPC: H01L45/00

CPC classification number: H01L45/145 ,  C23C16/40 ,  C23C16/45525 ,  H01L21/02175 ,  H01L21/02178 ,  H01L21/02181 ,  H01L21/02186 ,  H01L21/02189 ,  H01L21/02192 ,  H01L21/02194 ,  H01L21/022 ,  H01L21/0228 ,  H01L27/2463 ,  H01L45/08 ,  H01L45/1266 ,  H01L45/146 ,  H01L45/1608 ,  H01L45/1616

Abstract: Embodiments of the invention generally relate to nonvolatile memory devices, such as a ReRAM cells, and methods for manufacturing such memory devices, which includes optimized, atomic layer deposition (ALD) processes for forming metal oxide film stacks. The metal oxide film stacks contain a metal oxide coupling layer disposed on a metal oxide host layer, each layer having different grain structures/sizes. The interface disposed between the metal oxide layers facilitates oxygen vacancy movement. In many examples, the interface is a misaligned grain interface containing numerous grain boundaries extending parallel to the electrode interfaces, in contrast to the grains in the bulk film extending perpendicular to the electrode interfaces. As a result, oxygen vacancies are trapped and released during switching without significant loss of vacancies. Therefore, the metal oxide film stacks have improved switching performance and reliability during memory cell applications compared to traditional hafnium oxide based stacks of previous memory cells.

Abstract translation: 本发明的实施例一般涉及非易失性存储器件，例如ReRAM单元，以及用于制造这种存储器件的方法，其包括用于形成金属氧化物膜堆叠的优化的原子层沉积（ALD）工艺。 金属氧化物膜堆叠包含设置在金属氧化物主体层上的金属氧化物耦合层，每个层具有不同的晶粒结构/尺寸。 设置在金属氧化物层之间的界面有助于氧空位移动。 在许多示例中，与垂直于电极界面延伸的体膜中的晶粒相反，界面是不对齐的晶粒界面，其包含平行于电极界面延伸的许多晶界。 因此，氧空缺在切换期间被捕获和释放，而空位明显损失。 因此，与以前的存储单元的传统的基于氧化铪的堆叠相比，金属氧化物膜堆叠在存储单元应用中具有改进的开关性能和可靠性。