公开(公告)号：US06794666B2

公开(公告)日：2004-09-21

申请号：US10160102

申请日：2002-06-04

Applicant: Won-bong Choi ,  In-kyeong Yoo

Inventor： Won-bong Choi ,  In-kyeong Yoo

IPC: G21G500

CPC classification number: B82Y30/00 ,  B82Y40/00 ,  C01B32/16 ,  H01J3/022 ,  H01J2237/06341 ,  H01J2237/3175 ,  Y10S977/901

Abstract: An electron emission lithography apparatus and method using a selectively grown carbon nanotube as an electron emission source, wherein the electron emission lithography apparatus includes an electron emission source installed within a chamber and a stage, which is separated from the electron emission source by a predetermined distance and on which a sample is mounted, and wherein the electron emission source is a carbon nanotube having electron emission power. Since a carbon nanotube is used as an electron emission source, a lithography process can be performed with a precise critical dimension that prevents a deviation from occurring between the center of a substrate and the edge thereof and may realize a high throughput.

Abstract translation: 一种使用选择性生长的碳纳米管作为电子发射源的电子发射光刻设备和方法，其中电子发射光刻设备包括安装在室内的电子发射源和与电子发射源分离预定距离的电台 并且其上安装有样品，并且其中所述电子发射源是具有电子发射能力的碳纳米管。 由于使用碳纳米管作为电子发射源，可以以精确的临界尺寸进行光刻处理，从而防止在基板的中心与其边缘之间发生偏差，并且可以实现高生产率。

公开(公告)号：US5699290A

公开(公告)日：1997-12-16

申请号：US659885

申请日：1996-06-07

Applicant: In-kyeong Yoo

Inventor： In-kyeong Yoo

IPC: G11C11/22 ,  H01L21/8242 ,  H01L21/8246 ,  H01L21/8247 ,  H01L27/10 ,  H01L27/105 ,  H01L27/108 ,  H01L29/788 ,  H01L29/792 ,  G11C11/50

CPC classification number: G11C11/22

Abstract: A ferroelectric read and write memory of a nondestructive write and read (NDWR) method in which charges of a gate insulating layer induced by a ferroelectric capacitor are discharged via a separate path, includes a source and a drain provided in both side of a well; a gate insulating layer provided on the well; a gate electrode provided on the gate insulating layer; a ferroelectric layer provided on the gate electrode, to which corresponding charges are induced in the gate electrode depending on its polar states; an upper electrode provided on the ferroelectric layer; and a charge discharging means electrically connected to the gate electrode for discharging charges induced in the gate insulating layer. In a driving method thereof, charges of the gate insulating layer induced by the ferroelectric layer are directly discharged via the gate electrode to make a logic "low" state by blocking the current flow between the source and insulating layer through the well during a binary logic information write operation. Therefore, if the information is written in a non-inversion state of the polarization, a fatigue of the ferroelectric layer can be prevented. Also, as described above, since the remained polarization still exists during the repeated information write operations, the information can be written at a low voltage.

Abstract translation: 一种非铁磁读写（NPWR）方法的铁电读和写存储器，其中由铁电电容器引起的栅极绝缘层的电荷通过单独的路径排出，包括设置在阱两侧的源极和漏极; 设在井上的栅绝缘层; 设置在所述栅极绝缘层上的栅电极; 设置在栅电极上的铁电层，根据极极状态在栅电极中引起相应的电荷; 设置在所述强电介质层上的上电极; 以及电连接到栅电极用于对栅极绝缘层中感应的电荷进行放电的电荷放电装置。 在其驱动方法中，由铁电体层引起的栅极绝缘层的电荷通过栅电极直接放电，以在二进制逻辑期间通过阱阻塞源极和绝缘层之间的电流流动而形成逻辑“低”状态 信息写入操作。 因此，如果信息被写入极化的非反转状态，则可以防止铁电层的疲劳。 此外，如上所述，由于在重复信息写入操作期间仍然存在剩余的极化，所以可以以低电压写入信息。

公开(公告)号：US07936044B2

公开(公告)日：2011-05-03

申请号：US11403902

申请日：2006-04-14

Applicant: Dong Chul Kim ,  In-kyeong Yoo ,  Myoung-jae Lee ,  Sun-ae Seo ,  In-gyu Baek ,  Seung-eon Ahn ,  Byoung-ho Park ,  Young-kwan Cha ,  Sang-jin Park

Inventor： Dong Chul Kim ,  In-kyeong Yoo ,  Myoung-jae Lee ,  Sun-ae Seo ,  In-gyu Baek ,  Seung-eon Ahn ,  Byoung-ho Park ,  Young-kwan Cha ,  Sang-jin Park

IPC: H01L29/00

CPC classification number: H01L45/04 ,  H01L27/2436 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/146

Abstract: A memory device may include a switching device and a storage node coupled with the switching device. The storage node may include a first electrode, a second electrode, a data storage layer and at least one contact layer. The data storage layer may be disposed between the first electrode and the second electrode and may include a transition metal oxide or aluminum oxide. The at least one contact layer may be disposed at least one of above or below the data storage layer and may include a conductive metal oxide.

Abstract translation: 存储器件可以包括与开关器件耦合的开关器件和存储节点。 存储节点可以包括第一电极，第二电极，数据存储层和至少一个接触层。 数据存储层可以设置在第一电极和第二电极之间，并且可以包括过渡金属氧化物或氧化铝。 至少一个接触层可以设置在数据存储层的上方或下方的至少一个上，并且可以包括导电金属氧化物。

公开(公告)号：US20110085368A1

公开(公告)日：2011-04-14

申请号：US12659516

申请日：2010-03-11

Applicant: Ho-jung Kim ,  In-kyeong Yoo ,  Chang-jung Kim ,  Ki-ha Hong

Inventor： Ho-jung Kim ,  In-kyeong Yoo ,  Chang-jung Kim ,  Ki-ha Hong

IPC: G11C5/06 ,  G11C11/00 ,  H01L21/82

CPC classification number: H01L27/222 ,  G11C13/0002 ,  G11C2213/71 ,  G11C2213/73 ,  G11C2213/79 ,  H01L27/24

Abstract: The non-volatile memory device may include a substrate, a plurality of first signal lines on the substrate in a vertical direction, a plurality of memory cells having ends connected to the plurality of first signal lines, a plurality of second signal lines perpendicular to the plurality of first signal lines on the substrate and each connected to other ends of the plurality of memory cells, and a plurality of selection elements on the substrate and connected to at least two of the plurality of first signal lines.

Abstract translation: 非易失性存储器件可以包括衬底，在垂直方向上的衬底上的多个第一信号线，具有连接到多个第一信号线的端部的多个存储器单元，垂直于第一信号线的多个第二信号线 基板上的多个第一信号线，并且各自连接到多个存储单元的另一端，以及多个选择元件，并且连接到多个第一信号线中的至少两个。

公开(公告)号：US20110059576A1

公开(公告)日：2011-03-10

申请号：US12926042

申请日：2010-10-22

Applicant: Sung-Il Cho ,  Choong-rae Cho ,  Eun-hong Lee ,  In-kyeong Yoo

Inventor： Sung-Il Cho ,  Choong-rae Cho ,  Eun-hong Lee ,  In-kyeong Yoo

IPC: H01L21/02

CPC classification number: H01L27/115 ,  G11C13/0007 ,  G11C2213/32 ,  G11C2213/51 ,  H01L27/112 ,  H01L27/2436 ,  H01L45/04 ,  H01L45/1233 ,  H01L45/146

Abstract: A nonvolatile memory device includes at least one switching device and at least one storage node electrically connected to the at least one switching device. The at least one storage node includes a lower electrode, one or more oxygen-deficient metal oxide layers, one or more data storage layers, and an upper electrode. At least one of the one or more metal oxide layers is electrically connected to the lower electrode. At least one of the one or more data storage layers is electrically connected to at least one of the one or more metal oxide layers. The upper electrode is electrically connected to at least one of the one or more data storage layers. A method of manufacturing the nonvolatile memory device includes preparing the at least one switching device and forming the lower electrode, one or more metal oxide layers, one or more data storage layers, and upper electrode.

Abstract translation: 非易失性存储器件包括至少一个开关器件和至少一个电连接到该至少一个开关器件的存储节点。 所述至少一个存储节点包括下电极，一个或多个缺氧金属氧化物层，一个或多个数据存储层和上电极。 一个或多个金属氧化物层中的至少一个电连接到下电极。 所述一个或多个数据存储层中的至少一个电连接到所述一个或多个金属氧化物层中的至少一个。 上电极电连接到一个或多个数据存储层中的至少一个。 制造非易失性存储器件的方法包括制备至少一个开关器件并形成下电极，一个或多个金属氧化物层，一个或多个数据存储层和上电极。

公开(公告)号：US07859035B2

公开(公告)日：2010-12-28

申请号：US11606889

申请日：2006-12-01

Applicant: Chang-wook Moon ,  Sang-mock Lee ,  In-kyeong Yoo ,  Seung-woon Lee ,  El Mostafa Bourim ,  Eun-hong Lee ,  Choong-rae Cho

Inventor： Chang-wook Moon ,  Sang-mock Lee ,  In-kyeong Yoo ,  Seung-woon Lee ,  El Mostafa Bourim ,  Eun-hong Lee ,  Choong-rae Cho

IPC: H01L27/108 ,  H01L29/94

CPC classification number: H01L27/115 ,  B82Y10/00 ,  G11C13/0007 ,  G11C2213/15 ,  G11C2213/32 ,  G11C2213/34 ,  G11C2213/35 ,  G11C2213/79 ,  H01L27/2436 ,  H01L45/04 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/146

Abstract: A storage node having a metal-insulator-metal structure, a non-volatile memory device including a storage node having a metal-insulator-metal (MIM) structure and a method of operating the same are provided. The memory device may include a switching element and a storage node connected to the switching element. The storage node may include a first metal layer, a first insulating layer and a second metal layer, sequentially stacked, and a nano-structure layer. The storage node may further include a second insulating layer and a third metal layer. The nano-structure layer, which is used as a carbon nano-structure layer, may include at least one fullerene layer.

Abstract translation: 提供一种具有金属 - 绝缘体 - 金属结构的存储节点，包括具有金属 - 绝缘体 - 金属（MIM）结构的存储节点的非易失性存储器件及其操作方法。 存储器件可以包括连接到开关元件的开关元件和存储节点。 存储节点可以包括依次层叠的第一金属层，第一绝缘层和第二金属层，以及纳米结构层。 存储节点还可以包括第二绝缘层和第三金属层。 用作碳纳米结构层的纳米结构层可以包括至少一个富勒烯层。

公开(公告)号：US07417271B2

公开(公告)日：2008-08-26

申请号：US11655193

申请日：2007-01-19

Applicant: Stefanovich Genrikh ,  Choong-rae Cho ,  In-kyeong Yoo ,  Eun-hong Lee ,  Sung-Il Cho ,  Chang-wook Moon

Inventor： Stefanovich Genrikh ,  Choong-rae Cho ,  In-kyeong Yoo ,  Eun-hong Lee ,  Sung-Il Cho ,  Chang-wook Moon

IPC: H01L31/062

CPC classification number: H01L27/115 ,  G11C2213/56 ,  H01L27/2436 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/146

Abstract: An electrode structure having at least two oxide layers that more reliably switch and operate without the use of additional devices and a non-volatile memory device having the same are provided. The electrode structure may include a lower electrode, a first oxide layer formed on the lower electrode, a second oxide layer formed on the first oxide layer and an upper electrode formed on the second oxide layer wherein at least one of the first and second oxide layers may be formed of a resistance-varying material. The first oxide layer may be formed of an oxide having a variable oxidation state.

Abstract translation: 提供具有至少两个氧化物层的电极结构，其更可靠地在不使用附加装置的情况下切换和操作，以及具有该氧化物层的非易失性存储装置。 电极结构可以包括下电极，形成在下电极上的第一氧化物层，形成在第一氧化物层上的第二氧化物层和形成在第二氧化物层上的上电极，其中第一氧化物层和第二氧化物层中的至少一个 可以由电阻变化材料形成。 第一氧化物层可以由具有可变氧化态的氧化物形成。

公开(公告)号：US20070278425A1

公开(公告)日：2007-12-06

申请号：US11882927

申请日：2007-08-07

Applicant: In-kyeong Yoo ,  Chang-wook Moon ,  Chang-hoon Choi

Inventor： In-kyeong Yoo ,  Chang-wook Moon ,  Chang-hoon Choi

IPC: G21K5/04

CPC classification number: H01J37/073 ,  H01J2237/31779

Abstract: An emitter for an electron-beam projection lithography system includes a photoconductor substrate, an insulating layer formed on a front surface of the photoconductor substrate, a gate electrode layer formed on the insulating layer, and a base electrode layer formed on a rear surface of the photoconductor substrate and formed of a transparent conductive material. In operation of the emitter, a voltage is applied between the base electrode and the gate electrode layer, light is projected onto a portion of the photoconductor substrate to convert the portion of the photoconductor substrate into a conductor such that electrons are emitted only from the partial portion where the light is projected. Since the emitter can partially emit electrons, partial correcting, patterning or repairing of a subject electron-resist can be realized.

Abstract translation: 用于电子束投影光刻系统的发射器包括：感光体基板，形成于感光体基板前表面的绝缘层，形成在绝缘层上的栅极电极层，以及形成在绝缘层的背面上的基极层 感光体基板并由透明导电材料形成。 在发射极的工作中，在基极和栅极电极层之间施加电压，光被投射到光电导体基底的一部分上，以将感光体基底的一部分转换为导体，使电子仅从部分 投射光的部分。 由于发射体可以部分地发射电子，所以可以实现对象电子抗蚀剂的部分校正，图案化或修复。

公开(公告)号：US20070267675A1

公开(公告)日：2007-11-22

申请号：US11798703

申请日：2007-05-16

Applicant: Sung-Il Cho ,  Choong-rae Cho ,  Eun-hong Lee ,  In-kyeong Yoo

Inventor： Sung-Il Cho ,  Choong-rae Cho ,  Eun-hong Lee ,  In-kyeong Yoo

IPC: H01L29/94 ,  H01L21/8242

CPC classification number: H01L27/115 ,  G11C13/0007 ,  G11C2213/32 ,  G11C2213/51 ,  H01L27/112 ,  H01L27/2436 ,  H01L45/04 ,  H01L45/1233 ,  H01L45/146

Abstract: A nonvolatile memory device includes at least one switching device and at least one storage node electrically connected to the at least one switching device. The at least one storage node includes a lower electrode, one or more oxygen-deficient metal oxide layers, one or more data storage layers, and an upper electrode. At least one of the one or more metal oxide layers is electrically connected to the lower electrode. At least one of the one or more data storage layers is electrically connected to at least one of the one or more metal oxide layers. The upper electrode is electrically connected to at least one of the one or more data storage layers. A method of manufacturing the nonvolatile memory device includes preparing the at least one switching device and forming the lower electrode, one or more metal oxide layers, one or more data storage layers, and upper electrode.

Abstract translation: 非易失性存储器件包括至少一个开关器件和至少一个电连接到该至少一个开关器件的存储节点。 所述至少一个存储节点包括下电极，一个或多个缺氧金属氧化物层，一个或多个数据存储层和上电极。 一个或多个金属氧化物层中的至少一个电连接到下电极。 所述一个或多个数据存储层中的至少一个电连接到所述一个或多个金属氧化物层中的至少一个。 上电极电连接到一个或多个数据存储层中的至少一个。 制造非易失性存储器件的方法包括制备至少一个开关器件并形成下电极，一个或多个金属氧化物层，一个或多个数据存储层和上电极。

公开(公告)号：US07282446B2

公开(公告)日：2007-10-16

申请号：US10819143

申请日：2004-04-07

Applicant: In-kyeong Yoo ,  Soo-hwan Jeong ,  Sun-ae Seo ,  In-sook Kim

Inventor： In-kyeong Yoo ,  Soo-hwan Jeong ,  Sun-ae Seo ,  In-sook Kim

IPC: H01L21/302

CPC classification number: B82B3/00 ,  B29C59/022 ,  B29C59/026 ,  B29C2059/023 ,  B82Y10/00 ,  B82Y30/00 ,  B82Y40/00 ,  H01L21/32139

Abstract: A method of manufacturing a nanochannel-array and a method of fabricating a nanodot using the nanochannel-array are provided. The nanochannel-array manufacturing method includes: performing first anodizing to form a first alumina layer having a channel array formed by a plurality of cavities on an aluminum substrate; etching the first alumina layer to a predetermined depth and forming a plurality of concave portions on the aluminum substrate, wherein each concave portion corresponds to the bottom of each channel of the first alumina layer; and performing second anodizing to form a second alumina layer having an array of a plurality of channels corresponding to the plurality of concave portions on the aluminum substrate. The array manufacturing method makes it possible to obtain finely ordered cavities and form nanoscale dots using the cavities.

Abstract translation: 提供一种制造纳米通道阵列的方法和使用纳米通道阵列制造纳米点的方法。 纳米通道阵列制造方法包括：执行第一阳极氧化以形成具有由铝基板上的多个空腔形成的沟道阵列的第一氧化铝层; 将第一氧化铝层蚀刻到预定深度并在铝基板上形成多个凹部，其中每个凹部对应于第一氧化铝层的每个通道的底部; 以及进行第二阳极氧化以形成具有与所述铝基板上的所述多个凹部对应的多个通道的阵列的第二氧化铝层。 阵列制造方法使得可以使用空腔获得精细排列的空腔并形成纳米级点。