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44 条记录 (耗时 0.024 秒)

    Metal-metal oxide etch stop/barrier for integrated circuit interconnects
    31.
    发明授权
    Metal-metal oxide etch stop/barrier for integrated circuit interconnects 有权
    用于集成电路互连的金属 - 金属氧化物蚀刻停止/屏障

    公开(公告)号：US07339271B2

    公开(公告)日：2008-03-04

    申请号：US10861657

    申请日：2004-06-03

    申请人： Xiaorong Morrow ,  Jihperng Leu ,  Markus Kuhn ,  Jose A. Maiz

    发明人： Xiaorong Morrow ,  Jihperng Leu ,  Markus Kuhn ,  Jose A. Maiz

    IPC分类号： H01L23/52

    CPC分类号： H01L21/76849 ,  H01L21/76829 ,  H01L21/76834 ,  H01L21/76855 ,  H01L21/76888 ,  H01L21/76897 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

    摘要： Described is a method and apparatus for forming interconnects with a metal-metal oxide electromigration barrier and etch-stop. In one embodiment of the invention, the method includes depositing a metal layer on the top of a planarized interconnect layer, the interconnect layer having an interlayer dielectric (ILD) with a top that is planar with the top of an electrically conductive interconnect. In one embodiment of the invention, the method includes reacting the metal layer with the ILD to form a metal oxide layer on the top of the ILD. At the same time, the metal layer will not be significantly oxidized by the electrically conductive interconnect, thus forming a metal barrier on the electrically conductive interconnect to improve electromigration performance. The metal barrier and metal oxide layer together comprise a protective layer. A second ILD may be subsequently formed on the protective layer, and the protective layer may act an etch-stop during a subsequent etch of the second ILD.

    摘要翻译： 描述了用于与金属 - 金属氧化物电迁移屏障和蚀刻停止形成互连的方法和装置。 在本发明的一个实施例中，该方法包括在平坦化的互连层的顶部上沉积金属层，所述互连层具有层间电介质（ILD），其顶部与导电互连的顶部是平面的。 在本发明的一个实施方案中，该方法包括使金属层与ILD反应以在ILD的顶部形成金属氧化物层。 同时，金属层不会被导电互连显着地氧化，从而在导电互连上形成金属阻挡层以改善电迁移性能。 金属屏障和金属氧化物层一起包括保护层。 随后可以在保护层上形成第二ILD，并且保护层可以在随后的第二ILD蚀刻期间进行蚀刻停止。

    Mechanically robust interconnect for low-k dielectric material using post treatment
    32.
    发明授权
    Mechanically robust interconnect for low-k dielectric material using post treatment 有权
    使用后处理的低k电介质材料的机械稳健互连

    公开(公告)号：US07175970B2

    公开(公告)日：2007-02-13

    申请号：US11286783

    申请日：2005-11-22

    申请人： Jun He ,  Jihperng Leu

    发明人： Jun He ,  Jihperng Leu

    IPC分类号： G03C5/00 ,  H01L21/31

    CPC分类号： H01L21/76831 ,  H01L21/76801 ,  H01L21/76808 ,  H01L21/7682 ,  H01L21/76825 ,  H01L23/5222 ,  H01L23/5226 ,  H01L2924/0002 ,  Y10S430/143 ,  H01L2924/00

    摘要： In an embodiment, a trench is formed above a via from a photo resist (PR) trench pattern in a dielectric layer. The trench is defined by two sidewall portions and base portions. The base portions of the sidewalls are locally treated by a post treatment using the PR trench pattern as mask to enhance mechanical strength of portions of the dielectric layer underneath the base portions. Seed and barrier layers are deposited on the trench and the via. The trench and via are filled with a metal layer. In another embodiment, a trench is formed from a PR trench pattern in a dielectric layer. A pillar PR is deposited and etched to define a pillar opening having a pillar surface. The pillar opening is locally treated on the pillar surface by a post treatment to enhance mechanical strength of portion of the dielectric layer underneath the pillar surface.

    摘要翻译： 在一个实施例中，在电介质层中的光致抗蚀剂（PR）沟槽图案的通孔上方形成沟槽。 沟槽由两个侧壁部分和基部限定。 通过使用PR沟槽图案作为掩模的后处理对侧壁的基部进行局部处理，以增强在基部下方的介电层的部分的机械强度。 种子和阻挡层沉积在沟槽和通孔上。 沟槽和通孔填充有金属层。 在另一个实施例中，沟槽由电介质层中的PR沟槽图案形成。 沉积并蚀刻柱PR以限定具有柱表面的柱开口。 通过后处理在柱面上局部处理立柱开口，以提高柱表面下方的电介质层的部分的机械强度。

    Mechanically robust dielectric film and stack
    37.
    发明授权
    Mechanically robust dielectric film and stack 有权
    机械坚固的电介质膜和叠层

    公开(公告)号：US07348283B2

    公开(公告)日：2008-03-25

    申请号：US11023801

    申请日：2004-12-27

    申请人： Jihperng Leu ,  Jun He

    发明人： Jihperng Leu ,  Jun He

    IPC分类号： H01L21/26

    CPC分类号： H01L21/02126 ,  H01L21/02216 ,  H01L21/02271 ,  H01L21/02321 ,  H01L21/02351 ,  H01L21/02362 ,  H01L21/31058 ,  H01L21/31155 ,  H01L21/312 ,  H01L21/3122 ,  H01L21/3127 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A method for forming a mechanically robust dielectric film comprises depositing a dielectric film on a substrate and then inducing a compressive strain in a top surface of the dielectric film to form a compressive strained surface. The compressive strain may be induced using an ion implantation process that bombards the dielectric film with ions that become implanted in the top surface of the dielectric film. The damage caused during ion implantation, as well as the implanted ions themselves, causes an expansion of the top surface which induces a biaxial compressive residual stress, thereby forming a compressive strained surface. The compressive strain reduces the amount of surface flaws present on the top surface, thereby improving the toughness of the dielectric film. In addition, the ion implantation process may modify the plasticity of the top surface and reduce the likelihood of fracture mechanisms based on dislocation pileup for crack initiation.

    摘要翻译： 用于形成机械坚固的电介质膜的方法包括在基底上沉积电介质膜，然后在电介质膜的顶表面中引起压缩应变以形成压缩应变表面。 可以使用离子注入工艺来诱导压缩应变，所述离子注入工艺用离子注入电介质膜的顶表面来轰击电介质膜。 离子注入过程中造成的损伤以及离子本身引起的顶表面的膨胀导致双轴压缩残余应力，从而形成压缩应变表面。 压缩应变减小了顶表面上存在的表面缺陷的量，从而提高了介电膜的韧性。 此外，离子注入工艺可以改变顶表面的可塑性，并降低基于位错堆积的断裂机理的可能性，用于裂纹开始。

    Low-k dielectric film with good mechanical strength
    39.
    发明授权
    Low-k dielectric film with good mechanical strength 失效
    低k电介质膜具有良好的机械强度

    公开(公告)号：US06964919B2

    公开(公告)日：2005-11-15

    申请号：US10217966

    申请日：2002-08-12

    申请人： Grant Kloster ,  Lee Rockford ,  Jihperng Leu

    发明人： Grant Kloster ,  Lee Rockford ,  Jihperng Leu

    IPC分类号： H01L21/316 ,  H01L21/768 ,  H01L23/532 ,  H01L21/4763 ,  H01L21/44

    CPC分类号： H01L21/7684 ,  H01L21/02131 ,  H01L21/02164 ,  H01L21/02203 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/31629 ,  H01L21/76808 ,  H01L23/53238 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

    摘要： The present invention discloses a method including providing a substrate; forming a dielectric over the substrate, the dielectric having a k value of about 2.5 or lower, the dielectric having a Young's modulus of elasticity of about 15 GigaPascals or higher; forming an opening in the dielectric; and forming a conductor in the opening.The present invention further discloses a structure including a substrate; a dielectric located over the substrate, the dielectric having a k value of 2.5 or lower, the dielectric having a Young's modulus of elasticity of about 15 GigaPascals or higher; an opening located in the dielectric; and a conductor located in the opening.

    摘要翻译： 本发明公开了一种提供基板的方法， 在所述基板上形成电介质，所述电介质具有约2.5或更低的k值，所述电介质具有约15千兆帕或更高的弹性模量; 在电介质中形成开口; 并在开口中形成导体。 本发明还公开了一种包括基板的结构; 电介质位于衬底上方，电介质的k值为2.5或更低，电介质具有约15千兆帕或更高的弹性模量; 位于电介质中的开口; 和位于开口中的导体。