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公开(公告)号：US20090327604A1
公开(公告)日：2009-12-31
申请号：US12396006
申请日：2009-03-02
IPC分类号： G06F12/06
CPC分类号： G06F3/0656 , G06F3/0614 , G06F3/0688
摘要： A size storage unit stores therein a block size of a memory element. A buffering unit executes buffer processing configured to store data received from a RAID (Redundant Arrays of Inexpensive/Independent Disks) controller into a buffer, and to write the data stored in the buffer into the memory element. A stripe-size receiving unit receives a stripe size that indicates a size of a unit of access at time of access to the memory element by the RAID controller. Writing processing is configured to write data received from the RAID controller into the memory element without executing the buffer processing by the buffering unit, when the stripe size is n times of the block size (n is a positive integer).
摘要翻译： 大小存储单元存储存储元件的块大小。 缓冲单元执行缓冲处理，其被配置为将从RAID（廉价/独立磁盘的冗余阵列）控制器接收的数据存储到缓冲器中，并且将存储在缓冲器中的数据写入存储器元件。 条形尺寸接收单元接收指示由RAID控制器访问存储器元件时的访问单元的大小的条带大小。 写入处理被配置为当条带大小是块大小的n倍（n为正整数）时，将从RAID控制器接收的数据写入存储元件，而不执行缓冲单元的缓冲器处理。
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公开(公告)号：US08549388B2
公开(公告)日：2013-10-01
申请号：US13035194
申请日：2011-02-25
申请人： Kazuhiro Fukutomi , Hiroshi Yao , Shinichi Kanno , Shigehiro Asano , Toshikatsu Hida , Yasuhiro Kimura
发明人： Kazuhiro Fukutomi , Hiroshi Yao , Shinichi Kanno , Shigehiro Asano , Toshikatsu Hida , Yasuhiro Kimura
IPC分类号： H03M13/00
CPC分类号： G06F11/108 , G06F2211/1059 , G06F2211/1073 , G06F2211/1092
摘要： According to one embodiment, a controller controls writing into and reading from a storage apparatus that includes a first data-storage unit and a second data-storage unit. The second data-storage unit stores user data and parity data of the user data. The first data-storage unit stores the parity data. The controller includes a parity updating unit and a parity writing unit. When parity data is updated, the parity updating unit writes the updated parity data into the first data-storage unit. When a certain requirement is satisfied, the parity writing unit reads the parity data written in the first data-storage unit, and writes the parity data thus read into the second data-storage unit.
摘要翻译： 根据一个实施例，控制器控制对包括第一数据存储单元和第二数据存储单元的存储装置的写入和读取。 第二数据存储单元存储用户数据和用户数据的奇偶校验数据。 第一数据存储单元存储奇偶校验数据。 控制器包括奇偶校验更新单元和奇偶校验写入单元。 当更新奇偶校验数据时，奇偶校验更新单元将更新的奇偶校验数据写入第一数据存储单元。 当满足特定要求时，奇偶写入单元读取写入第一数据存储单元中的奇偶校验数据，并将读出的奇偶校验数据写入第二数据存储单元。
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公开(公告)号：US20130238838A1
公开(公告)日：2013-09-12
申请号：US13603989
申请日：2012-09-05
IPC分类号： G06F12/02
CPC分类号： G06F12/0246 , G06F12/02 , G06F12/0802 , G06F12/0859 , G06F12/0868 , G06F12/0871 , G06F12/0873 , G06F2212/604 , G06F2212/7202 , G06F2212/7203
摘要： According to an embodiment, a controller is connected to an external storage device and controls access to a semiconductor storage device including blocks each including memory cell groups each having memory cells. The block includes pages associated with each memory cell group. A writing process for each memory cell group includes writing stages. The controller includes a determining unit configured to determine data to be transferred to the page required in the writing process for a first memory cell group before the writing stage first starts when the writing stage is performed; a reading unit configured to read the determined data from the semiconductor storage device and to store the read data in the external storage device before the writing stage starts; and a writing unit configured to perform the writing process using the data stored in the external storage device when the writing stage is performed.
摘要翻译： 根据实施例，控制器连接到外部存储装置，并且控制对包括各自包含存储单元的存储单元组的块的半导体存储装置的访问。 该块包括与每个存储器单元组相关联的页面。 每个存储单元组的写入过程包括写入阶段。 控制器包括：确定单元，被配置为在执行写入阶段时，在写入阶段首先开始之前，确定要传送到第一存储单元组的写入处理所需的页面的数据; 读取单元，其被配置为从所述半导体存储装置读取所确定的数据，并且在所述写入阶段开始之前将读取的数据存储在所述外部存储装置中; 以及写入单元，被配置为当执行写入阶段时，使用存储在外部存储装置中的数据执行写入处理。
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公开(公告)号：US08453033B2
公开(公告)日：2013-05-28
申请号：US12885962
申请日：2010-09-20
IPC分类号： H03M13/09
CPC分类号： G06F11/1048
摘要： According to one embodiment, a semiconductor memory device includes semiconductor memory chips having writable storage regions in which data is written. The data has one or more pieces of first data, and one or more pieces of the first data includes second data. The device includes a determining unit that determines a prescribed number or fewer of semiconductor memory chips to which the first data is written; a write controller that writes the the first data and redundant information calculated from the second data and used for correcting an error in the second data into the writable storage regions in the determined semiconductor memory chips; and a storage unit that stores identification information and region specifying information associated with each other. The identification information associates the second data and the redundant information, and the region specifying information specifies the storage regions in the semiconductor memory chips to which the first data included in the second data and the redundant information are written.
摘要翻译： 根据一个实施例，半导体存储器件包括具有可写入存储区域的数据被写入的半导体存储器芯片。 数据具有一个或多个第一数据，并且一个或多个第一数据包括第二数据。 该装置包括：确定单元，其确定写入第一数据的半导体存储器芯片的规定数量以下; 写入控制器，其将从第二数据计算出的第一数据和冗余信息写入第二数据中的错误，并将其写入到所确定的半导体存储器芯片中的可写入存储区域中; 以及存储单元，其存储彼此相关联的识别信息和区域指定信息。 所述识别信息将所述第二数据和所述冗余信息相关联，并且所述区域指定信息指定在所述第二数据中包含的所述第一数据和所述冗余信息被写入的所述半导体存储器芯片中的存储区域。
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公开(公告)号：US08392476B2
公开(公告)日：2013-03-05
申请号：US12885941
申请日：2010-09-20
IPC分类号： G06F17/30
CPC分类号： G06F12/0246 , G06F2212/7205
摘要： According to one embodiment, a semiconductor memory device performs writing of data to a semiconductor memory element in response to a request to write the data with a specified logical block address from a host and performs writing of valid data to the semiconductor memory element for compaction according to a log-structured method. The semiconductor memory device adjusts a frequency of the writing response to a request from the host and a frequency of the writing for compaction according to a predetermined ratio.
摘要翻译： 根据一个实施例，半导体存储器件响应于从主机以指定的逻辑块地址写入数据的请求，执行将数据写入到半导体存储器元件，并且执行将有效数据写入半导体存储元件以进行压缩 以日志结构的方式。 半导体存储器装置根据预定的比例调整来自主机的请求的写入响应的频率和用于压缩的写入频率。
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公开(公告)号：US08341497B2
公开(公告)日：2012-12-25
申请号：US12713631
申请日：2010-02-26
CPC分类号： G06F11/108 , G06F11/1052
摘要： A semiconductor storage includes a receiver configured to receive a write request from a host device; a storage unit configured to hold redundancy data generation/non-generation information; a writing unit configured to write data in a semiconductor memory array and write redundancy data generation/non-generation information of the written data in the storage unit; a first data extracting unit configured to extract data whose redundancy data is not generated from among the data held by the semiconductor memory array; a first redundancy data generating unit configured to generate redundancy data; a first redundancy data writing unit configured to write the generated redundancy data in the semiconductor memory array; and a first redundancy data generation/non-generation information updating unit configured to update the redundancy data generation/non-generation information of the data whose redundancy data held by the storage unit is generated.
摘要翻译： 半导体存储器包括被配置为从主机设备接收写请求的接收器; 存储单元，被配置为保存冗余数据生成/非生成信息; 写入单元，被配置为在半导体存储器阵列中写入数据，并将写入的数据的冗余数据生成/非生成信息写入存储单元中; 第一数据提取单元，被配置为从半导体存储器阵列保存的数据中提取不产生冗余数据的数据; 第一冗余数据生成单元，被配置为生成冗余数据; 第一冗余数据写入单元，被配置为将所生成的冗余数据写入所述半导体存储器阵列中; 以及第一冗余数据生成/非生成信息更新单元，被配置为更新由所述存储单元保持的冗余数据生成的数据的冗余数据生成/非生成信息。
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公开(公告)号：US08219861B2
公开(公告)日：2012-07-10
申请号：US13270788
申请日：2011-10-11
申请人： Toshikatsu Hida , Shinichi Kanno , Hirokuni Yano , Kazuya Kitsunai , Shigehiro Asano , Junji Yano
发明人： Toshikatsu Hida , Shinichi Kanno , Hirokuni Yano , Kazuya Kitsunai , Shigehiro Asano , Junji Yano
IPC分类号： G11C29/00
CPC分类号： G06F11/1412 , G06F11/1068 , G06F11/1402 , G06F12/02 , G11C16/0483 , G11C16/3418 , G11C16/3431
摘要： As a semiconductor storage device that can efficiently perform a refresh operation, provided is a semiconductor storage device comprising a non-volatile semiconductor memory storing data in blocks, the block being a unit of data erasing, and a controlling unit monitoring an error count of data stored in a monitored block selected from the blocks and refreshing data in the monitored block in which the error count is equal to or larger than a threshold value.
摘要翻译： 作为可以有效地执行刷新操作的半导体存储装置，提供了一种半导体存储装置，其包括以块为单位存储数据的非易失性半导体存储器，该块是数据擦除单元，以及监视数据的错误计数的控制单元 存储在从所述块中选择的监视块和所述监视块中的刷新数据中，其中所述错误计数等于或大于阈值。
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公开(公告)号：US08060797B2
公开(公告)日：2011-11-15
申请号：US12529282
申请日：2008-09-22
申请人： Toshikatsu Hida , Shinichi Kanno , Hirokuni Yano , Kazuya Kitsunai , Shigehiro Asano , Junji Yano
发明人： Toshikatsu Hida , Shinichi Kanno , Hirokuni Yano , Kazuya Kitsunai , Shigehiro Asano , Junji Yano
IPC分类号： G06F11/00
CPC分类号： G06F11/1412 , G06F11/1068 , G06F11/1402 , G06F12/02 , G11C16/0483 , G11C16/3418 , G11C16/3431
摘要： A semiconductor storage device can efficiently perform a refresh operation. A semiconductor storage device is provided which includes a non-volatile semiconductor memory storing data in blocks, the block being a unit of data erasing. A controlling unit is further included monitoring an error count of data stored in a monitored block selected from the blocks and for refreshing data in the monitored block in which the error count is equal to or larger than a threshold value.
摘要翻译： 半导体存储装置可以有效地执行刷新操作。 提供一种半导体存储装置，其包括以块为单位存储数据的非易失性半导体存储器，该块是数据擦除的单位。 还包括控制单元，用于监视存储在从块中选择的监视块中的数据的错误计数，以及用于刷新其中错误计数等于或大于阈值的监视块中的数据。
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公开(公告)号：US20110202812A1
公开(公告)日：2011-08-18
申请号：US12888822
申请日：2010-09-23
IPC分类号： G06F11/14
CPC分类号： G11C29/52 , G06F11/1008 , G06F11/1068
摘要： According to one embodiment, a semiconductor memory device includes semiconductor memory chips in which data requested to be written. The data has one or more pieces of first data in a predetermined unit. The device includes a write controller that writes the first data and redundancy information calculated by using a predetermined number of pieces of the first data and used for correcting an error in the predetermined number of pieces of the first data into different semiconductor memory chips; and a storage unit that stores identification information and region specifying information so as to be associated with each other. The identification information associates the first data and the redundancy information, and the region specifying information specifies a plurality of storage regions in the semiconductor memory chips to which the pieces of the first data and the redundancy information associated with each other are written.
摘要翻译： 根据一个实施例，半导体存储器件包括要求写入数据的半导体存储器芯片。 数据具有预定单元中的一个或多个第一数据。 该装置包括写入控制器，其写入通过使用预定数量的第一数据计算出的第一数据和冗余信息，并将其用于将预定数量的第一数据中的错误校正到不同的半导体存储器芯片中; 以及存储单元，其存储相互关联的识别信息和区域指定信息。 所述识别信息将所述第一数据和所述冗余信息相关联，并且所述区域指定信息指定所述第一数据和所述冗余信息相互写入的所述半导体存储器芯片中的多个存储区域。
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公开(公告)号：US20110202578A1
公开(公告)日：2011-08-18
申请号：US12885941
申请日：2010-09-20
IPC分类号： G06F17/30
CPC分类号： G06F12/0246 , G06F2212/7205
摘要： According to one embodiment, a semiconductor memory device performs writing of data to a semiconductor memory element in response to a request to write the data with a specified logical block address from a host and performs writing of valid data to the semiconductor memory element for compaction according to a log-structured method. The semiconductor memory device adjusts a frequency of the writing response to a request from the host and a frequency of the writing for compaction according to a predetermined ratio.
摘要翻译： 根据一个实施例，半导体存储器件响应于从主机以指定的逻辑块地址写入数据的请求，执行将数据写入到半导体存储器元件，并且执行将有效数据写入半导体存储元件以进行压缩 以日志结构的方式。 半导体存储器装置根据预定的比例调整来自主机的请求的写入响应的频率和用于压缩的写入频率。
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