公开(公告)号：US20050173068A1

公开(公告)日：2005-08-11

申请号：US11077753

申请日：2005-03-11

申请人： Ling Chen ,  Vincent Ku ,  Dien-Yeh Wu ,  Hua Chung ,  Alan Ouye ,  Norman Nakashima

发明人： Ling Chen ,  Vincent Ku ,  Dien-Yeh Wu ,  Hua Chung ,  Alan Ouye ,  Norman Nakashima

IPC分类号： C23C16/34 ,  C23C16/44 ,  C23C16/455 ,  H01L21/285 ,  H01L21/768 ,  C23F1/00

CPC分类号： H01L21/28562 ,  C23C16/34 ,  C23C16/4411 ,  C23C16/4412 ,  C23C16/45504 ,  C23C16/45508 ,  C23C16/45512 ,  C23C16/45525 ,  C23C16/45544 ,  C23C16/45563 ,  C23C16/45582 ,  H01L21/76843 ,  H01L21/76846 ,  H01L21/76871

摘要： One embodiment of the gas delivery assembly comprises a covering member having an expanding channel at a central portion of the covering member and having a bottom surface extending from the expanding channel to a peripheral portion of the covering member. One or more gas conduits are coupled to the expanding channel in which the one or more gas conduits are positioned at an angle from a center of the expanding channel. One embodiment of a chamber comprises a substrate support having a substrate receiving surface. The chamber further includes a chamber lid having a passageway at a central portion of the chamber lid and a tapered bottom surface extending from the passageway to a peripheral portion of the chamber lid. The bottom surface of the chamber lid is shaped and sized to substantially cover the substrate receiving surface. One or more valves are coupled to the passageway, and one or more gas sources are coupled to each valve. In one aspect, the bottom surface of the chamber lid may be tapered. In another aspect, a reaction zone defined between the chamber lid and the substrate receiving surface may comprise a small volume. In still another aspect, the passageway may comprise a tapered expanding channel extending from the central portion of the chamber lid. Another embodiment of the chamber comprises a substrate support having a substrate receiving surface. The chamber further comprises a chamber lid having an expanding channel extending from a central portion of the chamber lid and having a tapered bottom surface extending from the expanding channel to a peripheral portion of the chamber lid. One or more gas conduits are disposed around an upper portion of the expanding channel in which the one or more gas conduits are disposed at an angle from a center of the expanding channel. A choke is disposed on the chamber lid adjacent a perimeter of the tapered bottom surface.

公开(公告)号：US20050129238A1

公开(公告)日：2005-06-16

申请号：US11047177

申请日：2005-01-31

申请人： Boyd Multerer ,  Ling Chen

发明人： Boyd Multerer ,  Ling Chen

IPC分类号： A63F13/00 ,  A63F13/12 ,  G06F21/33 ,  G09C1/00 ,  H04L9/32 ,  H04L9/00

CPC分类号： A63F13/71 ,  A63F13/12 ,  A63F13/335 ,  G06F21/33 ,  G06F2221/2129

摘要： An architecture is described to manufacture console-based gaming systems in a manner that allows them to be authenticated to a remote entity for online participation. The architecture involves placing pre-established secrets on the game console during console manufacturing that may be subsequently used to guarantee the authenticity of the game console during registration time.

公开(公告)号：US20050074968A1

公开(公告)日：2005-04-07

申请号：US10693775

申请日：2003-10-25

申请人： Ling Chen ,  Seshadri Ganguli ,  Wei Cao ,  Christophe Marcadal

发明人： Ling Chen ,  Seshadri Ganguli ,  Wei Cao ,  Christophe Marcadal

IPC分类号： H01L21/285 ,  H01L21/4763 ,  H01L21/768 ,  H01L21/44

CPC分类号： H01L21/76844 ,  H01L21/2855 ,  H01L21/28556 ,  H01L21/76843 ,  H01L21/76846 ,  H01L21/76856 ,  H01L21/76865

摘要： A method of forming barrier layers in a via hole extending through an inter-level dielectric layer and including a preformed first barrier coated onto the bottom and sidewalls of the via holes. In a single plasma sputter reactor, a first step sputters the wafer rather than the target with high energy ions to remove the barrier layer from the bottom of the via but not from the sidewalls and a second step sputter deposits a second barrier layer, for example of Ta/TaN, onto the via bottom and sidewalls. The two steps may be differentiated by power applied to the target, by chamber pressure, or by wafer bias. The second step may include the simultaneous removal of the first barrier layer from the via bottom and sputter deposition of the second barrier layer onto the via sidewalls.

摘要翻译： 在穿过层间电介质层的通孔中形成阻挡层的方法，包括涂覆在通孔的底部和侧壁上的预先形成的第一屏障。 在单个等离子体溅射反应器中，第一步骤以高能离子将晶片而不是目标物喷射，以从通孔的底部除去阻挡层，而不是从侧壁排出，第二步骤溅射沉积第二阻挡层，例如 的Ta / TaN，通过底部和侧壁。 这两个步骤可以通过施加到靶，通过室压力或通过晶片偏置的功率来区分。 第二步骤可以包括从通孔底部同时移除第一阻挡层并将第二阻挡层溅射到通孔侧壁上。

公开(公告)号：US06787351B2

公开(公告)日：2004-09-07

申请号：US09818443

申请日：2001-03-27

申请人： Ling Chen ,  John W. Shiver ,  Andrew J. Bett ,  Danilo R. Casimiro ,  Michael J. Caulfield ,  Michael A. Chastain ,  Emilio A. Emini

发明人： Ling Chen ,  John W. Shiver ,  Andrew J. Bett ,  Danilo R. Casimiro ,  Michael J. Caulfield ,  Michael A. Chastain ,  Emilio A. Emini

IPC分类号： C12N1574

CPC分类号： C12N15/86 ,  A61K2039/5256 ,  A61K2039/53 ,  C07K14/005 ,  C12N2710/10343 ,  C12N2740/16122 ,  C12N2740/16134 ,  C12Q1/703

摘要： An adenoviral vector is described which carries a codon-optimized gag gene, along with a heterologous promoter and transcription terminator. This viral vaccine can effectively prevent HIV infection when administered to humans either alone or as part of a prime and boost regime also with a vaccine plasmid.

摘要翻译： 描述了携带密码子优化的gag基因以及异源启动子和转录终止子的腺病毒载体。 当病毒疫苗单独使用或作为初始和加强方案的一部分也可用疫苗质粒时，可有效预防HIV感染。

公开(公告)号：US06451252B1

公开(公告)日：2002-09-17

申请号：US09488690

申请日：2000-01-20

申请人： R. Roger Ruan ,  Hongbin Ma ,  Ling Chen ,  Philip R. Goodrich ,  Shaobo Deng ,  Ye Wang

发明人： R. Roger Ruan ,  Hongbin Ma ,  Ling Chen ,  Philip R. Goodrich ,  Shaobo Deng ,  Ye Wang

IPC分类号： B01J1908

CPC分类号： A61L9/22 ,  A61L9/015 ,  A61L9/16 ,  B01D53/32 ,  C01B13/11 ,  C01B2201/12

摘要： An odor removal system includes an odorous gas inlet, a treated gas outlet and a gas treatment flow path from the odorous gas inlet to the treated gas outlet. A mixer is coupled in series with the gas treatment flow path and has an ozone inlet coupled to an ozone outlet of an ozone generator. A non-thermal plasma reactor is also coupled in series with the gas treatment flow path.

摘要翻译： 气味去除系统包括气味气体入口，经处理的气体出口和从恶臭气体入口到经处理的气体出口的气体处理流路。 混合器与气体处理流动路径串联耦合，并且具有耦合到臭氧发生器的臭氧出口的臭氧入口。 非热等离子体反应器也与气体处理流动路径串联耦合。

公开(公告)号：US06402806B1

公开(公告)日：2002-06-11

申请号：US09608659

申请日：2000-06-30

申请人： John Vincent Schmitt ,  Ling Chen ,  George Michael Bleyle ,  Yu Cong ,  Alfred Mak ,  Mei Chang

发明人： John Vincent Schmitt ,  Ling Chen ,  George Michael Bleyle ,  Yu Cong ,  Alfred Mak ,  Mei Chang

IPC分类号： C22B1500

CPC分类号： C23C16/45561 ,  B01D53/002 ,  B01D53/72 ,  C23C16/4412 ,  C30B25/14 ,  H01J37/32834

摘要： A hot trap converts unreacted organic metal-film precursor from the exhaust stream of a CVD process. The converted precursor forms a metal film on the surface of the hot trap, thereby protecting hot vacuum pump surfaces from metal build up. A cold trap downstream from the hot trap freezes effluents from the exhaust stream. The metal captured by the hot trap and the effluents captured by the cold trap may then be recycled, rather than being released as environmental emissions.

摘要翻译： 热阱从CVD工艺的排气流转换未反应的有机金属膜前体。 转化的前体在热阱的表面上形成金属膜，从而保护热真空泵表面免受金属积聚。 热阱下游的冷阱将废气排出的废水冻结。 由热阱捕获的金属和由冷阱捕获的流出物可以被再循环，而不是作为环境排放而被释放。

公开(公告)号：US06200861B1

公开(公告)日：2001-03-13

申请号：US09276646

申请日：1999-03-26

申请人： Shye-Lin Wu ,  Ling Chen

发明人： Shye-Lin Wu ,  Ling Chen

IPC分类号： H01L218236

CPC分类号： H01L27/11246 ,  H01L27/112 ,  H01L27/1126

摘要： A method of fabricating high density multiple states mask ROM cells on a semiconductor substrate is disclosed. The method comprises the following steps. Firstly, the array of buried bit line is formed on semiconductor substrate. Then, a CVD oxide film is deposited on said substrate. The first coding mask is applied to dip out the CVD oxide film on the uncoded regions. Then, a thin gate oxide film is thermally grown on said substrate. At the same time, the CVD oxide film is densified and the N+source/drain junction of buried bit lines is formed. A conductive layer is then deposited on all area followed by defining the word lines. The second coding process is performed by using a high energy boron ion implantation through the conductive layer and gate oxide film into said predetermined regions. By combination of the first CVD oxide coding process and the second boron ion implantation coding process, a high density mask ROM with a multiple states is fabricated.

摘要翻译： 公开了一种在半导体衬底上制造高密度多态掩模ROM单元的方法。 该方法包括以下步骤。 首先，在半导体衬底上形成掩埋位线阵列。 然后，CVD氧化膜沉积在所述衬底上。 应用第一编码掩模以在未编码区域上浸出CVD氧化物膜。 然后，在所述衬底上热生长薄栅氧化膜。 同时CVD氧化膜致密化，形成掩埋位线的N +源极/漏极结。 然后将导电层沉积在所有区域上，然后定义字线。 通过使用通过导电层和栅极氧化物膜的高能量硼离子注入到所述预定区域来执行第二编码处理。 通过第一CVD氧化物编码处理和第二硼离子注入编码处理的组合，制造具有多个状态的高密度掩模ROM。

公开(公告)号：US5858464A

公开(公告)日：1999-01-12

申请号：US791131

申请日：1997-02-13

申请人： Karl Littau ,  Dashun S. Zhou ,  Alfred Mak ,  Ling Chen

发明人： Karl Littau ,  Dashun S. Zhou ,  Alfred Mak ,  Ling Chen

IPC分类号： C23C16/20 ,  C23C16/44 ,  H01L21/28 ,  H01L21/285 ,  H01L21/3205 ,  H01L23/52

CPC分类号： H01L21/28556 ,  C23C16/4401 ,  C23C16/4404

摘要： A method and apparatus for minimizing excess aluminum deposition that can build up inside a substrate processing chamber during an aluminum CVD substrate processing operation. The method of the present invention periodically introduces nitrogen into the processing chamber after aluminum CVD processing of at least a single wafer in order to minimize unwanted aluminum accumulation in various parts of the chamber. According to one embodiment, the present invention provides a method of minimizing excess metal deposition inside a substrate processing chamber after a substrate processing operation. The method includes the steps of introducing a nitrogen-containing passivating gas into a chamber after the substrate processing operation, and maintaining at least a portion of the chamber at a second temperature during the introducing step thereby reducing excess metal build up within the chamber. In preferred embodiments, the method is performed after removal of the substrate from the processing chamber. In other preferred embodiments, the second temperature ranges from about 200.degree.-300.degree. C.

摘要翻译： 一种用于最小化在铝CVD衬底处理操作期间可以在衬底处理室内形成的多余铝沉积的方法和装置。 本发明的方法在对至少一个晶片进行铝CVD处理之后，将氮气周期性地引入处理室中，以便最小化腔室各部分中不希望的铝积聚。 根据一个实施例，本发明提供一种在衬底处理操作之后使衬底处理室内的多余金属沉积最小化的方法。 该方法包括以下步骤：在基板处理操作之后将含氮钝化气体引入室中，并且在引入步骤期间将室的至少一部分保持在第二温度，从而减少室内过量的金属积聚。 在优选的实施方案中，在从处理室中除去基材之后进行该方法。 在其它优选实施方案中，第二温度范围为约200-300℃

公开(公告)号：US5777919A

公开(公告)日：1998-07-07

申请号：US713741

申请日：1996-09-13

申请人： Wu Chi-Yung ,  Ling Chen ,  Tony Peng

发明人： Wu Chi-Yung ,  Ling Chen ,  Tony Peng

IPC分类号： G11C7/18 ,  G11C17/12 ,  H01L27/115 ,  G11C17/00

CPC分类号： H01L27/115 ,  G11C17/126 ,  G11C7/18

摘要： The present invention is related to an enhanced high density Read-Only-Memory (ROM) device with select gate. A thin oxide layer is deposited on the ROM cell matrix and it is extended to the select lines which is on the top and bottom side of the ROM cell matrix to form the select gate. The ROM cell matrix can be organized more flexible by using the buried layers to pick out the unwanted gates. The metal contact can be directly made in this extended region too. Thereafter it reduces the manufacturing cost and achieves a high speed and density and simple process device.

摘要翻译： 本发明涉及具有选择门的增强型高密度只读存储器（ROM）器件。 在ROM单元矩阵上沉积薄的氧化物层，并将其延伸到位于ROM单元矩阵的顶部和底部的选择线以形成选择栅极。 通过使用埋层挑出不想要的栅极，ROM单元矩阵可以更灵活地组织起来。 金属接触可以直接在这个扩展区域制造。 此后，它降低了制造成本，并实现了高速度和密度以及简单的工艺装置。

公开(公告)号：US5751040A

公开(公告)日：1998-05-12

申请号：US716809

申请日：1996-09-16

申请人： Ling Chen ,  Hung-Cheng Sung ,  Chi-Shiung Lo

发明人： Ling Chen ,  Hung-Cheng Sung ,  Chi-Shiung Lo

IPC分类号： H01L21/8246 ,  H01L27/112 ,  H01L27/02 ,  H01L27/10

CPC分类号： H01L27/1128 ,  H01L27/112

摘要： A device and a method are provided for manufacture of that semiconductor memory device on a silicon semiconductor substrate with a vertical channel. A dielectric layer pattern with openings through it is formed. Trenches are formed in the surface of the semiconductor substrate. The trenches have sidewalls. A spacer layer is formed on the surface of the device. The spacer layer is shaped to form spacers in the trenches on the sidewalls. Source/drain regions are formed by ion implanting ions to deposit dopant into the substrate. The device is annealed to form source/drain regions in the substrate. A dielectric layer is formed over the device. A conductive word-line is formed and patterned over the dielectric layer.

摘要翻译： 提供了一种用于在具有垂直通道的硅半导体衬底上制造该半导体存储器件的装置和方法。 形成具有穿过其的开口的电介质层图案。 沟槽形成在半导体衬底的表面中。 沟槽有侧壁。 在装置的表面上形成间隔层。 间隔层被成形为在侧壁上的沟槽中形成间隔物。 源/漏区通过离子注入离子形成以将掺杂剂沉积到衬底中。 该器件退火以在衬底中形成源极/漏极区域。 在该器件上形成介电层。 在电介质层上形成并图案化导电字线。