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公开(公告)号：US20150049556A1
公开(公告)日：2015-02-19
申请号：US14528251
申请日：2014-10-30
Applicant: MICRON TECHNOLOGY, INC.
Inventor： Violante Moschiano , Giovanni Santin , Michele Incarnati
CPC classification number: G11C16/3459 , G11C11/5628 , G11C16/26
Abstract: Methods for program verifying a memory cell include generating an access line voltage in response to a count and applying the access line voltage to a control gate of the memory cell, and generating a pass signal in response to the access line voltage activating the memory cell. Methods further include comparing at least a portion of the count to an indication of a desired threshold voltage of the memory cell, and when the at least a portion of the count matches the indication of the desired threshold voltage of the memory cell, determining if the pass signal is present. Methods further include generating a signal indicative of a desire to inhibit further programming of the memory cell if the pass signal is present when the match is indicated.
Abstract translation: 用于程序验证存储器单元的方法包括响应于计数产生访问线电压并将存取线电压施加到存储器单元的控制栅极，并且响应于启动存储器单元的存取线电压而产生通过信号。 方法还包括将计数的至少一部分与存储器单元的期望阈值电压的指示进行比较，并且当计数的至少一部分与存储器单元的期望阈值电压的指示匹配时，确定是否 存在通过信号。 如果在指示匹配时存在通过信号，那么方法还包括产生指示禁止进一步编程存储器单元的信号的信号。
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公开(公告)号：US10885987B2
公开(公告)日：2021-01-05
申请号：US16226713
申请日：2018-12-20
Applicant: MICRON TECHNOLOGY, INC.
Inventor： Violante Moschiano , Andrea D'Alessandro , Tommaso Vali , Giovanni Santin
Abstract: A method for reading an array of memory cells includes enabling a current to flow through even data lines of the array of memory cells. The method includes blocking a current from flowing through odd data lines of the array of memory cells. The method includes sensing data stored in memory cells coupled to the even data lines.
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33.发明申请APPARATUS AND METHODS FOR DETERMINING A PASS/FAIL CONDITION OF A MEMORY DEVICE 有权用于确定存储器件的通过/失败条件的装置和方法公开(公告)号：US20160211034A1
公开(公告)日：2016-07-21
申请号：US15084943
申请日：2016-03-30
Applicant: MICRON TECHNOLOGY, INC.
Inventor： Violante Moschiano , Giovanni Santin
CPC classification number: G11C16/3436 , G11C11/56 , G11C11/5628 , G11C16/00 , G11C16/06 , G11C16/10 , G11C16/24 , G11C16/3454 , G11C16/3481 , G11C2029/0409
Abstract: Memory devices including an array of memory cells, a first buffer selectively connected to the array of memory cells and corresponding to a particular bit rank of a byte of information of a programming operation of the memory device, and a second buffer selectively connected to the array of memory cells and corresponding to the particular bit rank of a different byte of information of the programming operation of the memory device, wherein an output of the first buffer and an output of the second buffer are connected in parallel to a common line, as well as methods of their operation to indicate a pass/fail condition of the programming operation.
Abstract translation: 包括存储器单元阵列的存储器件，选择性地连接到存储器单元阵列并对应于存储器件的编程操作的一字节信息的特定位等级的第一缓冲器，以及选择性地连接到阵列的第二缓冲器 并且对应于存储器件的编程操作的不同字节的信息的特定位等级，其中第一缓冲器的输出和第二缓冲器的输出与公共线并联连接 作为其操作的方法来指示编程操作的通过/失败状态。
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公开(公告)号：US20160203875A1
公开(公告)日：2016-07-14
申请号：US15075768
申请日：2016-03-21
Applicant: MICRON TECHNOLOGY, INC.
Inventor： Tommaso Vali , Giovanni Santin , Massimo Rossini , William H. Radke , Violante Moschiano
CPC classification number: G11C16/3436 , G11C11/5628 , G11C16/10 , G11C16/26 , G11C16/34 , G11C16/3418 , G11C16/3422
Abstract: A memory device has a controller. The controller is configured to cause the memory device to inhibit programming of a group of memory cells. The controller is configured to cause the memory device to apply a programming pulse to control gates of the group of memory cells. The controller is configured to determine an amount of disturb experienced by the group of memory cells responsive to the programming pulse. The controller is configured to determine a program window responsive to the amount of disturb.
Abstract translation: 存储器件具有控制器。 控制器被配置为使得存储器件禁止对一组存储器单元进行编程。 控制器被配置为使存储器件施加编程脉冲来控制该组存储器单元的栅极。 控制器被配置为确定响应于编程脉冲的存储器单元组经历的干扰量。 控制器被配置为响应于干扰量来确定程序窗口。
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公开(公告)号：US09343169B2
公开(公告)日：2016-05-17
申请号：US14162278
申请日：2014-01-23
Applicant: Micron Technology, Inc.
Inventor： Tommaso Vali , Giovanni Santin , Michele Incarnati , Violante Moschiano
CPC classification number: G11C16/3427 , G11C11/5628 , G11C16/10 , G11C16/3418 , G11C27/02 , G11C2211/5642 , G11C2211/5646
Abstract: Methods of programming a memory, memory devices, and systems are disclosed, for example. In one such method, each data line of a memory to be programmed is biased differently depending upon whether one or more of the data lines adjacent the data line are inhibited. In one such system, a connection circuit provides data corresponding to the inhibit status of a target data line to page buffers associated with data lines adjacent to the target data line.
Abstract translation: 例如，公开了存储器，存储器件和系统的编程方法。 在一种这样的方法中，根据是否禁止与数据线相邻的一条或多条数据线，要编程的存储器的每条数据线被不同地偏置。 在一个这样的系统中，连接电路将对应于目标数据线的禁止状态的数据提供给与与目标数据线相邻的数据线相关联的寻呼缓冲器。
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Patent Agency Ranking
公开(公告)号：US09245646B2
公开(公告)日：2016-01-26
申请号：US14528251
申请日：2014-10-30
Applicant: MICRON TECHNOLOGY, INC.
Inventor： Violante Moschiano , Giovanni Santin , Michele Incarnati
CPC classification number: G11C16/3459 , G11C11/5628 , G11C16/26
Abstract: Methods for program verifying a memory cell include generating an access line voltage in response to a count and applying the access line voltage to a control gate of the memory cell, and generating a pass signal in response to the access line voltage activating the memory cell. Methods further include comparing at least a portion of the count to an indication of a desired threshold voltage of the memory cell, and when the at least a portion of the count matches the indication of the desired threshold voltage of the memory cell, determining if the pass signal is present. Methods further include generating a signal indicative of a desire to inhibit further programming of the memory cell if the pass signal is present when the match is indicated.
Abstract translation: 用于程序验证存储器单元的方法包括响应于计数产生访问线电压并将存取线电压施加到存储器单元的控制栅极，并且响应于启动存储器单元的存取线电压而产生通过信号。 方法还包括将计数的至少一部分与存储器单元的期望阈值电压的指示进行比较，并且当计数的至少一部分与存储器单元的期望阈值电压的指示匹配时，确定是否 存在通过信号。 如果在指示匹配时存在通过信号，那么方法还包括产生指示禁止进一步编程存储器单元的信号的信号。
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公开(公告)号：US20150348643A1
公开(公告)日：2015-12-03
申请号：US14826298
申请日：2015-08-14
Applicant: MICRON TECHNOLOGY, INC.
Inventor： Tommaso Vali , Giovanni Santin , Massimo Rossini , William H. Radke , Violante Moschiano
CPC classification number: G11C16/3436 , G11C11/5628 , G11C16/10 , G11C16/26 , G11C16/34 , G11C16/3418 , G11C16/3422
Abstract: A memory device has an array of memory cells and a controller coupled to the array of memory cells. The controller is configured to determine a program window after a portion of a particular programing operation performed on the memory device is performed and before a subsequent portion of the particular programing operation performed on the memory device is performed. The controller is configured to determine the program window responsive to an amount of program disturb experienced by a particular state of a memory cell. The controller is configured to perform the subsequent portion of the particular programing operation performed on the memory device using the determined program window.
Abstract translation: 存储器件具有存储器单元的阵列和耦合到存储器单元阵列的控制器。 控制器被配置为在执行对存储器件执行的特定编程操作的一部分之后以及在执行对存储器件执行的特定编程操作的后续部分之后确定程序窗口。 控制器被配置为响应于由存储器单元的特定状态经历的程序干扰的量来确定程序窗口。 控制器被配置为使用所确定的程序窗口来执行在存储器设备上执行的特定编程操作的后续部分。
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公开(公告)号：US09129684B2
公开(公告)日：2015-09-08
申请号：US14538020
申请日：2014-11-11
Applicant: MICRON TECHNOLOGY, INC.
Inventor： Tommaso Vali , Giovanni Santin , Massimo Rossini , William H. Radke , Violante Moschiano
CPC classification number: G11C16/3436 , G11C11/5628 , G11C16/10 , G11C16/26 , G11C16/34 , G11C16/3418 , G11C16/3422
Abstract: A memory device has an array of memory cells and a controller coupled to the array of memory cells. The controller is configured to determine a program window after a portion of a particular programming operation performed on the memory device is performed and before a subsequent portion of the particular programming operation performed on the memory device is performed. The controller is configured to determine the program window responsive to an amount of program disturb experienced by a particular state of a memory cell. The controller is configured to perform the subsequent portion of the particular programming operation performed on the memory device using the determined program window.
Abstract translation: 存储器件具有存储器单元的阵列和耦合到存储器单元阵列的控制器。 控制器被配置为在执行对存储器件执行的特定编程操作的一部分之后以及在执行对存储器件执行的特定编程操作的后续部分之后确定程序窗口。 控制器被配置为响应于由存储器单元的特定状态经历的程序干扰的量来确定程序窗口。 控制器被配置为使用所确定的程序窗口执行在存储器设备上执行的特定编程操作的后续部分。
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公开(公告)号：US20140219032A1
公开(公告)日：2014-08-07
申请号：US13758379
申请日：2013-02-04
Applicant: MICRON TECHNOLOGY, INC.
Inventor： Violante Moschiano , Giovanni Santin
IPC: G11C16/10
CPC classification number: G11C16/10 , G11C16/3454
Abstract: Methods for programming memory cells and memory devices are disclosed. One such method for programming includes performing a program verify operation of a group of memory cells. A number of potential CS2 situations are detected. If the number of detected potential CS2 situations is greater than a threshold, programming compensation for a CS2 situation is used in a subsequent programming operation.
Abstract translation: 公开了用于编程存储器单元和存储器件的方法。 一种用于编程的方法包括执行一组存储器单元的程序验证操作。 检测到一些潜在的CS2情况。 如果检测到的潜在CS2情况的数量大于阈值，则在随后的编程操作中使用针对CS2情况的编程补偿。
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公开(公告)号：US08717815B2
公开(公告)日：2014-05-06
申请号：US13790393
申请日：2013-03-08
Applicant: Micron Technology, Inc.
Inventor： Tommaso Vali , Violente Moschiano , Giovanni Santin
CPC classification number: G11C16/04 , G11C16/0483 , G11C16/06 , G11C16/10 , G11C16/26 , G11C29/76 , G11C29/789 , G11C29/82 , G11C2211/5621 , G11C2211/5642
Abstract: In one or more of the disclosed embodiments, a read operation is compensated for back pattern effect. A bit line current is generated by a read operation that biases the word lines. As part of a back pattern effect measurement phase, at predetermined time intervals an indication of the discharge status of the bit line is stored in a latch of a set of N latches coupled to each bit line. At the end of the measurement phase, the set of latches contains a multiple bit word that is an indication of the back pattern effect experienced by that particular series string of memory cells. This back pattern effect indication is used in subsequent read operations to adjust the timing of the operation.
Abstract translation: 在所公开的一个或多个实施例中，读取操作被补偿以用于背面图案效果。 通过偏置字线的读取操作产生位线电流。 作为背景图案效果测量阶段的一部分，在预定的时间间隔，将位线的放电状态的指示存储在耦合到每个位线的一组N个锁存器的锁存器中。 在测量阶段结束时，锁存器组包含一个多位字，它是该特定串行存储单元所经历的反向图案效应的指示。 这种背面图案效果指示用于随后的读取操作以调整操作的时间。
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