公开(公告)号：US08017492B2

公开(公告)日：2011-09-13

申请号：US12222598

申请日：2008-08-12

申请人： Yasumori Fukushima ,  Masao Moriguchi ,  Yutaka Takafuji

发明人： Yasumori Fukushima ,  Masao Moriguchi ,  Yutaka Takafuji

IPC分类号： H01L21/76

CPC分类号： H01L21/84 ,  H01L21/32 ,  H01L21/76254 ,  H01L27/1203 ,  H01L29/78654

摘要： A method for fabricating a semiconductor device according to the present invention is a method for fabricating a semiconductor device including a substrate layer including a plurality of first regions each having an active region and a plurality of second regions each being provided between adjacent ones of the first region. The fabrication method includes an isolation insulation film formation step of forming an isolation insulation film in each of the second regions so that a surface of the isolation insulation film becomes at the same height as that of a surface of a gate oxide film covering the active region, a peeling layer formation step of forming a peeling layer by ion-implanting hydrogen into the substrate layer after the isolation insulation film formation step, and a separation step of separating part of the substrate layer along the peeling layer.

摘要翻译： 根据本发明的制造半导体器件的方法是一种半导体器件的制造方法，该半导体器件包括：衬底层，该衬底层包括多个第一区域，每个第一区域具有有源区域和多个第二区域， 地区。 制造方法包括隔离绝缘膜形成步骤，在每个第二区域中形成隔离绝缘膜，使得隔离绝缘膜的表面变得与覆盖有源区域的栅极氧化物膜的表面相同的高度 剥离层形成步骤，在隔离绝缘膜形成步骤之后，通过将氢离子注入到衬底层中形成剥离层，以及分离步骤，用于沿剥离层分离衬底层的一部分。

公开(公告)号：US20080128807A1

公开(公告)日：2008-06-05

申请号：US11792487

申请日：2005-11-15

申请人： Yasumori Fukushima ,  Yutaka Takafuji ,  Masao Moriguchi

发明人： Yasumori Fukushima ,  Yutaka Takafuji ,  Masao Moriguchi

IPC分类号： H01L27/00 ,  H01L21/00

CPC分类号： H01L27/1203 ,  H01L21/02164 ,  H01L21/02271 ,  H01L21/265 ,  H01L21/31662 ,  H01L21/32 ,  H01L21/76254 ,  H01L21/84 ,  H01L29/7833

摘要： In fabricating a semiconductor device, an element forming surface formation step of forming a plurality of element forming surfaces of different heights on a semiconductor layer to have different levels, a semiconductor element formation step of forming a plurality of semiconductor elements and, one in each of a corresponding number of regions of the semiconductor layer, each region including an associated one of the plurality of element forming surfaces, a level-difference compensation insulating film formation step of forming a level-difference compensation insulating film on the semiconductor layer to cover the semiconductor elements and have a surface with different levels along the element forming surfaces, a release layer formation step of forming a release layer in the semiconductor layer by ion-implanting a peeling material through the level-difference compensation insulating film into the semiconductor layer, and a separation step of separating part of the semiconductor layer along the release layer are performed.

摘要翻译： 在制造半导体器件时，在半导体层上形成具有不同高度的多个元件形成表面以形成不同电平的元件形成表面形成步骤，形成多个半导体元件的半导体元件形成步骤和 所述半导体层的相应数量的区域，每个区域包括所述多个元件形成表面中的相关联的一个元件形成表面;电平差补偿绝缘膜形成步骤，在所述半导体层上形成电平差补偿绝缘膜以覆盖所述半导体 元件，并且具有沿着元件形成表面具有不同水平的表面;剥离层形成步骤，通过将剥离材料通过电位差补偿绝缘膜离子注入到半导体层中而在半导体层中形成剥离层，以及 分离半导体层的一部分的分离步骤 沿着释放层进行。

公开(公告)号：US20050245046A1

公开(公告)日：2005-11-03

申请号：US11086680

申请日：2005-03-23

申请人： Yutaka Takafuji ,  Yasumori Fukushima ,  Masao Moriguchi

发明人： Yutaka Takafuji ,  Yasumori Fukushima ,  Masao Moriguchi

IPC分类号： G02F1/1368 ,  G02F1/136 ,  G09F9/30 ,  G09G3/00 ,  H01L21/00 ,  H01L21/02 ,  H01L21/316 ,  H01L21/336 ,  H01L21/469 ,  H01L21/76 ,  H01L21/762 ,  H01L21/77 ,  H01L21/8234 ,  H01L21/8238 ,  H01L21/84 ,  H01L27/08 ,  H01L27/088 ,  H01L27/092 ,  H01L27/10 ,  H01L27/12 ,  H01L29/00 ,  H01L29/786

CPC分类号： H01L27/1266 ,  H01L21/76202 ,  H01L21/76254 ,  H01L27/1203 ,  H01L27/1214 ,  H01L29/78603 ,  H01L29/78609

摘要： The present invention provides a semiconductor substrate, which comprises a singlecrystalline Si substrate which includes an active layer having a channel region, a source region, and a drain region, the singlecrystalline Si substrate including at least a part of a device structure not containing a well-structure or a channel stop region; a gate insulating film formed on the singlecrystalline Si substrate; a gate electrode formed on the gate insulating film; a LOCOS oxide film whose thickness is more than a thickness of the gate insulating film, the LOCOS oxide film being formed on the singlecrystalline Si substrate by surrounding the active layer; and an insulating film formed over the gate electrode and the LOCOS oxide film. On this account, on fabricating the semiconductor device having a high-performance integration system by forming the non-singlecrystalline Si semiconductor element and the singlecrystalline Si semiconductor element on the large insulating substrate, the process for making the singlecrystalline Si is simplified. Further, the foregoing arrangement provides a semiconductor substrate and a fabrication method thereof, which ensures device isolation of the minute singlecrystalline Si semiconductor element without highly-accurate photolithography, when the singlecrystalline Si semiconductor element is transferred onto the large insulating substrate.

摘要翻译： 本发明提供一种半导体衬底，其包括单晶Si衬底，其包括具有沟道区，源极区和漏极区的有源层，所述单晶Si衬底包括至少部分不包含阱的器件结构 结构或通道停止区域; 形成在单晶Si衬底上的栅极绝缘膜; 形成在栅极绝缘膜上的栅电极; LOCOS氧化物膜的厚度大于栅极绝缘膜的厚度，LOCOS氧化物膜通过围绕有源层而形成在单晶Si衬底上; 以及形成在栅电极和LOCOS氧化物膜上的绝缘膜。 因此，通过在大的绝缘基板上形成非单晶Si半导体元件和单晶Si半导体元件来制造具有高性能的集成系统的半导体器件，简化了制造单晶硅的工艺。 此外，上述结构提供半导体衬底及其制造方法，当将单晶硅半导体元件转印到大绝缘衬底上时，确保了微单晶Si半导体元件的器件隔离而没有高精度光刻。

公开(公告)号：US20100252885A1

公开(公告)日：2010-10-07

申请号：US12742463

申请日：2008-09-19

申请人： Yasumori Fukushima ,  Yutaka Takafuji ,  Kenshi Tada

发明人： Yasumori Fukushima ,  Yutaka Takafuji ,  Kenshi Tada

IPC分类号： H01L27/12

CPC分类号： H01L21/84 ,  H01L21/76254 ,  H01L27/12 ,  H01L29/78603 ,  H01L29/78621

摘要： A semiconductor device (10) is formed by bonding a semiconductor substrate (1) including a CMOS transistor (3) to a glass substrate (2). The semiconductor substrate (1) is formed by partial separation at a separation layer. A P-type high concentration impurity region (39n) is formed in electric connection with a channel region (35n) of an NMOS transistor (3n) so that an electric potential of the channel region (35n) is fixed. The P-type high concentration impurity region (39n) has the same P conductive type as that of the channel region (35n) and also has a concentration higher than that of the channel region (35n). An N-type high concentration impurity region (39p) is formed in electric connection with a channel region (35p) of a PMOS transistor (3p) so that an electric potential of the channel region (35p) is fixed. The N-type high concentration impurity region (39p) has the same N conductive type as that of the channel region (35p) and also has a concentration higher than that of the channel region (35p). This makes it possible to provide a semiconductor device whose performance can be enhanced by restraint on variation in a characteristic of a thin film transistor and a display device including the semiconductor device.

摘要翻译： 半导体器件（10）通过将包括CMOS晶体管（3）的半导体衬底（1）结合到玻璃衬底（2）而形成。 半导体衬底（1）通过在分离层处的部分分离而形成。 形成与NMOS晶体管（3n）的沟道区（35n）电连接的P型高浓度杂质区（39n），使得沟道区（35n）的电位固定。 P型高浓度杂质区域（39n）具有与沟道区域（35n）相同的P导电型，并且其浓度高于沟道区域（35n）的浓度。 形成与PMOS晶体管（3p）的沟道区（35p）电连接的N型高浓度杂质区（39p），使得沟道区（35p）的电位固定。 N型高浓度杂质区（39p）具有与沟道区（35p）相同的N导电型，其浓度高于沟道区（35p）。 这使得可以提供一种通过限制薄膜晶体管的特性变化和包括半导体器件的显示装置来提高其性能的半导体器件。

公开(公告)号：US20120326264A1

公开(公告)日：2012-12-27

申请号：US13497807

申请日：2010-05-18

申请人： Yasumori Fukushima ,  Yutaka Takafuji ,  Kenshi Tada

发明人： Yasumori Fukushima ,  Yutaka Takafuji ,  Kenshi Tada

IPC分类号： H01L21/58 ,  H01L25/00

CPC分类号： H01L27/1266 ,  H01L27/1218 ,  H01L29/66772

摘要： A method of fabricating a semiconductor device of the present invention includes the steps of forming a single crystal semiconductor device, attaching the single crystal semiconductor device on a substrate, forming a TFT on a glass substrate, and electrically connecting the single crystal semiconductor device and the TFT. In the step of forming a single crystal semiconductor device, an alignment mark is provided at the single crystal semiconductor device. In the step of attaching a single crystal semiconductor device, the single crystal semiconductor device is positioned and attached on the glass substrate based on the machining accuracy of an attachment device. In the step of forming a TFT, the TFT is positioned and provided on the glass substrate based on the alignment mark provided at the single crystal semiconductor device.

摘要翻译： 制造本发明的半导体器件的方法包括以下步骤：形成单晶半导体器件，将单晶半导体器件安装在衬底上，在玻璃衬底上形成TFT，并将单晶半导体器件和 TFT。 在形成单晶半导体器件的步骤中，在单晶半导体器件上设置对准标记。 在安装单晶半导体器件的步骤中，单晶半导体器件基于安装器件的加工精度被定位并附着在玻璃基板上。 在形成TFT的步骤中，基于设置在单晶半导体器件上的对准标记，将TFT设置在玻璃基板上。

公开(公告)号：US08293621B2

公开(公告)日：2012-10-23

申请号：US13150620

申请日：2011-06-01

申请人： Yutaka Takafuji ,  Yasumori Fukushima ,  Masao Moriguchi

发明人： Yutaka Takafuji ,  Yasumori Fukushima ,  Masao Moriguchi

IPC分类号： H01L21/322

CPC分类号： H01L27/1266 ,  H01L21/76202 ,  H01L21/76254 ,  H01L27/1203 ,  H01L27/1214 ,  H01L29/78603 ,  H01L29/78609

摘要： The present invention provides a semiconductor substrate, which comprises a singlecrystalline Si substrate which includes an active layer having a channel region, a source region, and a drain region, the singlecrystalline Si substrate including at least a part of a device structure not containing a well-structure or a channel stop region; a gate insulating film formed on the singlecrystalline Si substrate; a gate electrode formed on the gate insulating film; a LOCOS oxide film whose thickness is more than a thickness of the gate insulating film, the LOCOS oxide film being formed on the singlecrystalline Si substrate by surrounding the active layer; and an insulating film formed over the gate electrode and the LOCOS oxide film. On this account, on fabricating the semiconductor device having a high-performance integration system by forming the non-singlecrystalline Si semiconductor element and the singlecrystalline Si semiconductor element on the large insulating substrate, the process for making the singlecrystalline Si is simplified. Further, the foregoing arrangement provides a semiconductor substrate and a fabrication method thereof, which ensures device isolation of the minute singlecrystalline Si semiconductor element without highly-accurate photolithography, when the singlecrystalline Si semiconductor element is transferred onto the large insulating substrate.

摘要翻译： 本发明提供了一种半导体衬底，其包括单晶Si衬底，其包括具有沟道区，源极区和漏极区的有源层，所述单晶Si衬底包括不包含阱的器件结构的至少一部分 结构或通道停止区域; 形成在单晶Si衬底上的栅极绝缘膜; 形成在栅极绝缘膜上的栅电极; LOCOS氧化物膜的厚度大于栅极绝缘膜的厚度，LOCOS氧化物膜通过围绕有源层而形成在单晶Si衬底上; 以及形成在栅电极和LOCOS氧化物膜上的绝缘膜。 因此，通过在大的绝缘基板上形成非单晶Si半导体元件和单晶Si半导体元件来制造具有高性能的集成系统的半导体器件，简化了制造单晶硅的工艺。 此外，上述结构提供半导体衬底及其制造方法，当将单晶硅半导体元件转印到大绝缘衬底上时，确保了微单晶Si半导体元件的器件隔离而没有高精度光刻。

公开(公告)号：US20110278678A1

公开(公告)日：2011-11-17

申请号：US13146176

申请日：2009-12-17

申请人： Yasumori Fukushima ,  Yutaka Takafuji

发明人： Yasumori Fukushima ,  Yutaka Takafuji

IPC分类号： H01L27/092 ,  H01L21/28 ,  H01L29/772

CPC分类号： H01L27/1203 ,  H01L21/76898 ,  H01L21/84 ,  H01L27/1229 ,  H01L27/1251 ,  H01L27/1266

摘要： This invention provides a semiconductor device having a semiconductor element that has low-resistance and a stable contact connection, even when the wiring is connected from the side of the single-crystal silicon layer on which the impurity concentration is lower. This invention provides a semiconductor device comprising, on a substrate, a semiconductor device having a single-crystal semiconductor film and a wiring connected to the single-crystal semiconductor film, and in the single-crystal semiconductor film, an impurity concentration on one surface side is different from an impurity concentration on another surface side, the wiring being connected to the surface side on which the impurity concentration is lower, the resistivity of a region of the single-crystal semiconductor film to which the wiring is connected being no less than 1 μΩcm and no more than 0.01 Ωcm.

摘要翻译： 本发明提供一种半导体器件，其具有具有低电阻和稳定的接触连接的半导体元件，即使当布线从其上杂质浓度较低的单晶硅层的一侧连接时。 本发明提供了一种半导体器件，在衬底上包括具有单晶半导体膜的半导体器件和连接到单晶半导体膜的布线，在单晶半导体膜中，在一个表面侧的杂质浓度 与另一个表面侧的杂质浓度不同，该布线与杂质浓度较低的表面侧连接，配线所连接的单晶半导体膜的区域的电阻率不小于1 μ＆OHgr; cm和不大于0.01＆OHgr; cm。

公开(公告)号：US07563693B2

公开(公告)日：2009-07-21

申请号：US11147359

申请日：2005-06-08

申请人： Yasumori Fukushima ,  Yutaka Takafuji

发明人： Yasumori Fukushima ,  Yutaka Takafuji

IPC分类号： H01L21/30 ,  H01L21/322

CPC分类号： H01L21/6835 ,  H01L24/97 ,  H01L2221/68363 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/0101 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/01033 ,  H01L2924/01054 ,  H01L2924/01057 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/04953 ,  H01L2924/12042 ,  H01L2924/1301 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/30105 ,  H01L2924/00

摘要： A method for manufacturing a semiconductor substrate comprises the steps of: forming a gate oxide film as an insulating layer on the surface of a semiconductor substrate; implanting boron ions for inhibiting the migration of a peeling substance in the semiconductor substrate to form an anti-diffusion layer in the semiconductor substrate; activating boron in the anti-diffusion layer by heat treatment; implanting hydrogen ions into the semiconductor substrate to form a peel layer in part of the semiconductor substrate at a side of the anti-diffusion layer opposite to the gate oxide film; bonding a glass substrate to the surface of the semiconductor substrate where the gate oxide film has been formed; and heat-treating the semiconductor substrate to separate part of the semiconductor substrate along the peel layer.

摘要翻译： 一种制造半导体衬底的方法包括以下步骤：在半导体衬底的表面上形成作为绝缘层的栅极氧化膜; 注入硼离子以抑制半导体衬底中的剥离物质的迁移，以在半导体衬底中形成抗扩散层; 通过热处理在反扩散层中活化硼; 将氢离子注入到半导体衬底中以在与半导体衬底相反的一侧的反扩散层的一部分半导体衬底中形成剥离层; 将玻璃基板结合到已经形成栅极氧化膜的半导体基板的表面上; 并且对半导体衬底进行热处理以沿着剥离层分离半导体衬底的一部分。

公开(公告)号：US20110269284A1

公开(公告)日：2011-11-03

申请号：US13150620

申请日：2011-06-01

申请人： Yutaka Takafuji ,  Yasumori Fukushima ,  Masao Moriguchi

发明人： Yutaka Takafuji ,  Yasumori Fukushima ,  Masao Moriguchi

IPC分类号： H01L21/336

CPC分类号： H01L27/1266 ,  H01L21/76202 ,  H01L21/76254 ,  H01L27/1203 ,  H01L27/1214 ,  H01L29/78603 ,  H01L29/78609

摘要： The present invention provides a semiconductor substrate, which comprises a singlecrystalline Si substrate which includes an active layer having a channel region, a source region, and a drain region, the singlecrystalline Si substrate including at least a part of a device structure not containing a well-structure or a channel stop region; a gate insulating film formed on the singlecrystalline Si substrate; a gate electrode formed on the gate insulating film; a LOCOS oxide film whose thickness is more than a thickness of the gate insulating film, the LOCOS oxide film being formed on the singlecrystalline Si substrate by surrounding the active layer; and an insulating film formed over the gate electrode and the LOCOS oxide film. On this account, on fabricating the semiconductor device having a high-performance integration system by forming the non-singlecrystalline Si semiconductor element and the singlecrystalline Si semiconductor element on the large insulating substrate, the process for making the singlecrystalline Si is simplified. Further, the foregoing arrangement provides a semiconductor substrate and a fabrication method thereof, which ensures device isolation of the minute singlecrystalline Si semiconductor element without highly-accurate photolithography, when the singlecrystalline Si semiconductor element is transferred onto the large insulating substrate.

摘要翻译： 本发明提供了一种半导体衬底，其包括单晶Si衬底，其包括具有沟道区，源极区和漏极区的有源层，所述单晶Si衬底包括不包含阱的器件结构的至少一部分 结构或通道停止区域; 形成在单晶Si衬底上的栅极绝缘膜; 形成在栅极绝缘膜上的栅电极; LOCOS氧化物膜的厚度大于栅极绝缘膜的厚度，LOCOS氧化物膜通过围绕有源层而形成在单晶Si衬底上; 以及形成在栅电极和LOCOS氧化物膜上的绝缘膜。 因此，通过在大的绝缘基板上形成非单晶Si半导体元件和单晶Si半导体元件来制造具有高性能的集成系统的半导体器件，简化了制造单晶硅的工艺。 此外，上述结构提供半导体衬底及其制造方法，当将单晶硅半导体元件转印到大绝缘衬底上时，确保了微单晶Si半导体元件的器件隔离而没有高精度光刻。

公开(公告)号：US20110006376A1

公开(公告)日：2011-01-13

申请号：US12922119

申请日：2009-03-03

申请人： Yasumori Fukushima ,  Yutaka Takafuji ,  Masao Moriguchi ,  Kenshi Tada ,  Steven Roy Droes

发明人： Yasumori Fukushima ,  Yutaka Takafuji ,  Masao Moriguchi ,  Kenshi Tada ,  Steven Roy Droes

IPC分类号： H01L27/092 ,  H01L29/78 ,  H01L21/30 ,  H01L29/739

CPC分类号： H01L27/124 ,  H01L27/1214 ,  H01L27/1225 ,  H01L27/1266 ,  H01L29/4908 ,  H01L29/66772

摘要： The present invention provides a semiconductor device capable of improving subthreshold characteristics of a PMOS transistor that is included in a thinned base layer and bonded to another substrate, a production method of such a semiconductor device, and a display device. The semiconductor device of the present invention is a semiconductor device, including: a substrate; and a device part bonded to the substrate, the device part including a base layer and a PMOS transistor, the PMOS transistor including a first electrical conduction path and a first gate electrode, the first electrical conduction path being provided inside the base layer on a side where the first gate electrode is disposed.

摘要翻译： 本发明提供一种半导体器件，其能够改善包括在薄化的基底层中并结合到另一衬底的PMOS晶体管的亚阈值特性，这种半导体器件的制造方法和显示器件。 本发明的半导体器件是半导体器件，包括：衬底; 以及与基板接合的器件部件，所述器件部件包括基极层和PMOS晶体管，所述PMOS晶体管包括第一导电路径和第一栅电极，所述第一导电路径设置在所述基极层的侧面 其中设置第一栅电极。