公开(公告)号：US08384263B2

公开(公告)日：2013-02-26

申请号：US12370082

申请日：2009-02-12

申请人： Hiromichi Hiramatsu ,  Takashi Ishigami ,  Yasuyuki Saito ,  Yuichiro Tanaka ,  Kenichi Nakayama ,  Yutaka Matsunobu ,  Noriaki Hino

发明人： Hiromichi Hiramatsu ,  Takashi Ishigami ,  Yasuyuki Saito ,  Yuichiro Tanaka ,  Kenichi Nakayama ,  Yutaka Matsunobu ,  Noriaki Hino

IPC分类号： H02K3/28 ,  H02K3/00 ,  H02K3/04

CPC分类号： H02K3/28 ,  H02K15/066

摘要： A rotating electrical machine includes a stator including at least two element coils of the same phase each having a plurality of turns and connected to each other through a coil-to-coil connection wire, the element coils being arranged in adjacent slots, respectively; and a rotor rotatably provided to the stator through a gap. The element coils of the same phase are fitted in the adjacent slots so that wound around portions of the element coils partially overlap each other. The coil-to-coil connection wire connects at a coil end portion conductor wires extending from linear conductor wire portions of innermost wires of the element coils contained in the slots.

摘要翻译： 旋转电机包括：定子，其包括相同相的至少两个元件线圈，每个元件线圈具有多个匝并且通过线圈与线圈连接线彼此连接，元件线圈分别布置在相邻的插槽中; 以及通过间隙可旋转地设置在定子上的转子。 相同相位的元件线圈被装配在相邻的槽中，使得围绕元件线圈的部分缠绕部分地彼此重叠。 线圈到线圈连接线在线圈端部处连接，导线从包含在槽中的元件线圈的最内部线的线性导线部分延伸。

公开(公告)号：US07462380B2

公开(公告)日：2008-12-09

申请号：US11296448

申请日：2005-12-08

申请人： Junri Ishikura ,  Makoto Kameyama ,  Yasuyuki Saito

发明人： Junri Ishikura ,  Makoto Kameyama ,  Yasuyuki Saito

IPC分类号： H01T14/00

CPC分类号： C23C14/228 ,  C23C14/325 ,  H05H1/48 ,  H05H2001/483 ,  H05H2245/124

摘要： A particle film deposition method provides ultrafine particles generated by arc heating. An electrode is employed with at least two sub-electrodes each radially aligned toward the same part of a material. The material is evaporated by an arc discharge via the electrode, particles are generated from the evaporated material and the particles collide against a substrate.

摘要翻译： 颗粒膜沉积方法提供通过电弧加热产生的超微粒子。 使用电极，其中至少两个子电极各自朝向材料的相同部分径向对准。 通过电极通过电弧放电来蒸发材料，从蒸发的材料产生颗粒，并且颗粒与基板碰撞。

公开(公告)号：US07277039B2

公开(公告)日：2007-10-02

申请号：US11369753

申请日：2006-03-08

申请人： Naoki Yada ,  Yasuyuki Saito

发明人： Naoki Yada ,  Yasuyuki Saito

IPC分类号： H03M1/12

CPC分类号： H03M1/1023 ,  H03M1/46 ,  H03M1/682 ,  H03M1/765

摘要： A semiconductor integrated circuit including an A/D converter capable of converting an analog signal accepted through an external terminal into a digital signal. The A/D converter includes: a ladder-type resistor for generating a reference voltage; a set of first operational amplifiers, each accepts an output voltage of the ladder-type resistor; a set of first switches, each capable of short-circuiting an input terminal and an output terminal of corresponding one of the first operational amplifiers thereby to allow an offset correction of the corresponding first operational amplifier to be made; and a comparator circuit for comparing an output voltage of each of the first operational amplifiers with the analog signal. The A/D converter can reduce a current output from the ladder-type resistor and speed up charge and discharge of the sampling capacitor.

摘要翻译： 一种包括能够将通过外部端子接收的模拟信号转换为数字信号的A / D转换器的半导体集成电路。 A / D转换器包括：用于产生参考电压的梯形电阻器; 一组第一运算放大器，每个接收梯形电阻器的输出电压; 一组第一开关，每个能够使第一运算放大器的相应一个输入端子和输出端子短路，从而允许相应的第一运算放大器的偏移校正; 以及用于将每个第一运算放大器的输出电压与模拟信号进行比较的比较器电路。 A / D转换器可以减少梯形电阻器的电流输出，并加快采样电容器的充放电。

公开(公告)号：US07277037B2

公开(公告)日：2007-10-02

申请号：US11369751

申请日：2006-03-08

申请人： Naoki Yada ,  Yasuyuki Saito

发明人： Naoki Yada ,  Yasuyuki Saito

IPC分类号： H03M1/78 ,  H03M1/12

CPC分类号： H03M1/1023 ,  H03M1/46 ,  H03M1/682 ,  H03M1/765

摘要： A semiconductor integrated circuit including an A/D converter capable of converting an analog signal accepted through an external terminal into a digital signal. The A/D converter includes: a ladder-type resistor for generating a reference voltage; a set of first operational amplifiers, each accepts an output voltage of the ladder-type resistor; a set of first switches, each capable of short-circuiting an input terminal and an output terminal of corresponding one of the first operational amplifiers thereby to allow an offset correction of the corresponding first operational amplifier to be made; and a comparator circuit for comparing an output voltage of each of the first operational amplifiers with the analog signal. The A/D converter can reduce a current output from the ladder-type resistor and speed up charge and discharge of the sampling capacitor.

摘要翻译： 一种包括能够将通过外部端子接收的模拟信号转换为数字信号的A / D转换器的半导体集成电路。 A / D转换器包括：用于产生参考电压的梯形电阻器; 一组第一运算放大器，每个接收梯形电阻器的输出电压; 一组第一开关，每个能够使第一运算放大器的相应一个输入端子和输出端子短路，从而允许相应的第一运算放大器的偏移校正; 以及用于将每个第一运算放大器的输出电压与模拟信号进行比较的比较器电路。 A / D转换器可以减少梯形电阻器的电流输出，并加快采样电容器的充电和放电。

公开(公告)号：US20070206432A1

公开(公告)日：2007-09-06

申请号：US11797579

申请日：2007-05-04

申请人： Eiichi Ishikawa ,  Yasuyuki Saito ,  Masanao Sato ,  Naoki Yada ,  Kiyoshi Matsubara

发明人： Eiichi Ishikawa ,  Yasuyuki Saito ,  Masanao Sato ,  Naoki Yada ,  Kiyoshi Matsubara

IPC分类号： G11C16/06

CPC分类号： G11C16/12 ,  G11C5/14 ,  G11C5/145 ,  G11C5/147 ,  G11C16/30

摘要： A data processing apparatus supplied a first voltage from outside, includes a CPU, a first voltage generating circuit, a second voltage generating circuit, a clock generating circuit, and, a nonvolatile memory which can be accessed by the CPU. The first voltage generating circuit generates a second voltage, a voltage level of which is lower than that of the first voltage. The clock generating circuit is supplied the second voltage from the first voltage generating circuit and generates a clock signal, and the second voltage generating circuit is supplied the second voltage from the first voltage generating circuit and the clock signal from the clock generating circuit, and generates a second voltage, a voltage level of which is higher than that of the first voltage, for supplying to the nonvolatile memory.

摘要翻译： 从外部提供第一电压的数据处理装置包括CPU，第一电压产生电路，第二电压产生电路，时钟发生电路和可被CPU访问的非易失性存储器。 第一电压产生电路产生其电压电平低于第一电压的第二电压。 时钟发生电路从第一电压产生电路提供第二电压并产生时钟信号，并且第二电压产生电路从第一电压产生电路提供第二电压和来自时钟发生电路的时钟信号，并产生 其电压电平高于第一电压的第二电压，用于提供给非易失性存储器。

公开(公告)号：US07193929B2

公开(公告)日：2007-03-20

申请号：US11446219

申请日：2006-06-05

申请人： Naoki Yada ,  Yasuyuki Saito ,  Yasushi Shibatsuka ,  Katsunori Koike ,  Mitsuhiko Okutsu

发明人： Naoki Yada ,  Yasuyuki Saito ,  Yasushi Shibatsuka ,  Katsunori Koike ,  Mitsuhiko Okutsu

IPC分类号： G11C8/18

CPC分类号： H03L7/08 ,  G06F1/08 ,  G11C7/04 ,  G11C7/22 ,  G11C7/222 ,  G11C2207/2254 ,  H03K3/0315 ,  H03K5/133 ,  H03K5/2481 ,  H03K2005/00039 ,  H03K2005/00143 ,  H03L7/085

摘要： A semiconductor integrated circuit includes a memory circuit, an oscillator circuit which generates an internal clock signal, based on control information held in the memory circuit, and a logic circuit which generates control information that causes the frequency of the internal clock signal to coincide with the frequency of an external clock signal. The internal clock signal is used for a synchronous operation of an internal circuit. Even if an error (undesired variation) occurs in the oscillation characteristic of the oscillator circuit due to process variations, it is possible to cause an internal clock signal frequency to coincide with an external clock signal frequency corresponding to a target frequency without the need for external attachment of a crystal oscillator and the input of an external clock signal.

摘要翻译： 半导体集成电路包括存储电路，基于存储电路中保存的控制信息产生内部时钟信号的振荡电路，以及产生控制信息的逻辑电路，该控制信息使内部时钟信号的频率与 外部时钟信号的频率。 内部时钟信号用于内部电路的同步操作。 即使由于过程变化而在振荡电路的振荡特性中出现误差（不期望的变化），也可能使内部时钟信号频率与对应于目标频率的外部时钟信号频率一致，而不需要外部 晶体振荡器的附件和外部时钟信号的输入。

公开(公告)号：US20060152400A1

公开(公告)日：2006-07-13

申请号：US11369752

申请日：2006-03-08

申请人： Naoki Yada ,  Yasuyuki Saito

发明人： Naoki Yada ,  Yasuyuki Saito

IPC分类号： H03M1/12

CPC分类号： H03M1/1023 ,  H03M1/46 ,  H03M1/682 ,  H03M1/765

摘要： A semiconductor integrated circuit including an A/D converter capable of converting an analog signal accepted through an external terminal into a digital signal. The A/D converter includes: a ladder-type resistor for generating a reference voltage; a set of first operational amplifiers, each accepts an output voltage of the ladder-type resistor; a set of first switches, each capable of short-circuiting an input terminal and an output terminal of corresponding one of the first operational amplifiers thereby to allow an offset correction of the corresponding first operational amplifier to be made; and a comparator circuit for comparing an output voltage of each of the first operational amplifiers with the analog signal. The A/D converter can reduce a current output from the ladder-type resistor and speed up charge and discharge of the sampling capacitor.

公开(公告)号：US06975262B2

公开(公告)日：2005-12-13

申请号：US10878250

申请日：2004-06-29

申请人： Naoki Yada ,  Yasuyuki Saito

发明人： Naoki Yada ,  Yasuyuki Saito

IPC分类号： H03M1/14 ,  G11C7/00 ,  G11C7/16 ,  H03M1/10 ,  H03M1/46 ,  H03M1/68 ,  H03M1/76 ,  H03M1/78

CPC分类号： H03M1/1023 ,  H03M1/46 ,  H03M1/682 ,  H03M1/765

摘要： A semiconductor integrated circuit including an A/D converter capable of converting an analog signal accepted through an external terminal into a digital signal. The A/D converter includes: a ladder-type resistor for generating a reference voltage; a set of first operational amplifiers, each accepts an output voltage of the ladder-type resistor; a set of first switches, each capable of short-circuiting an input terminal and an output terminal of corresponding one of the first operational amplifiers thereby to allow an offset correction of the corresponding first operational amplifier to be made; and a comparator circuit for comparing an output voltage of each of the first operational amplifiers with the analog signal. The A/D converter can reduce a current output from the ladder-type resistor and speed up charge and discharge of the sampling capacitor.

摘要翻译： 一种包括能够将通过外部端子接收的模拟信号转换为数字信号的A / D转换器的半导体集成电路。 A / D转换器包括：用于产生参考电压的梯形电阻器; 一组第一运算放大器，每个接收梯形电阻器的输出电压; 一组第一开关，每个能够使第一运算放大器的相应一个输入端子和输出端子短路，从而允许相应的第一运算放大器的偏移校正; 以及用于将每个第一运算放大器的输出电压与模拟信号进行比较的比较器电路。 A / D转换器可以减少梯形电阻器的电流输出，并加快采样电容器的充电和放电。

公开(公告)号：US06787811B2

公开(公告)日：2004-09-07

申请号：US10191565

申请日：2002-07-10

申请人： Yasuyuki Saito ,  Satoko Omizu

发明人： Yasuyuki Saito ,  Satoko Omizu

IPC分类号： H01L2715

CPC分类号： H01L27/3288

摘要： A wire connection structure has light-emitting points formed by third electrodes and second electrodes, each second electrode being electrically connected to a first electrode functioning as a lead-out electrode by way of an electro-conductive member, and comprises electro-conductive members for respectively connecting the second electrodes and the first electrodes. The electro-conductive members are formed either by an ink-jet method or a gas deposition method. Thus, an electro-conductive member directly contacts with an end of each of the first electrodes to establish an excellent electric connection between the first electrode and the corresponding second electrode without using an insulating member.

摘要翻译： 导线连接结构具有由第三电极和第二电极形成的发光点，每个第二电极通过导电构件电连接到用作引出电极的第一电极，并且包括用于 分别连接第二电极和第一电极。 导电构件通过喷墨法或气相沉积法形成。 因此，导电构件直接与每个第一电极的端部接触，以在不使用绝缘构件的情况下在第一电极和对应的第二电极之间建立良好的电连接。

公开(公告)号：US06577263B2

公开(公告)日：2003-06-10

申请号：US10283110

申请日：2002-10-30

申请人： Yasuyuki Saito

发明人： Yasuyuki Saito

IPC分类号： H03M100

CPC分类号： H03K17/162 ,  G11C27/02 ,  G11C27/024 ,  H03K17/6872 ,  H03K17/6874 ,  H03K17/6877 ,  H03K17/693 ,  H03M1/46

摘要： An analog switch and an analog multipleplexer are realized by which electron charges which have been stored in a stray capacitance provided on the output side thereof before a switch is conducted do not give an adverse influence to a level of such an analog input voltage which is subsequently entered after the switch has been switched. An analog switch circuit is arranged by insulating gate type transistors and a voltage follower which is parallel-connected to these insulating type transistors. When the analog switch circuit is turned ON, the voltage follower is firstly brought into an active state, and thereafter, these insulating gate type transistors are brought into conductive conditions.

摘要翻译： 实现模拟开关和模拟多路复用器，其中在开关导通之前已经存储在设置在其输出侧的杂散电容中的电子电荷对这种模拟输入电压的电平没有不利影响，随后 开关切换后输入。 模拟开关电路通过绝缘栅型晶体管和与这些绝缘型晶体管并联连接的电压跟随器来布置。 当模拟开关电路接通时，电压跟随器首先进入有效状态，此后，这些绝缘栅型晶体管进入导通状态。