公开(公告)号：US11935777B2

公开(公告)日：2024-03-19

申请号：US17457155

申请日：2021-12-01

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： HyeonChul Lee ,  HunTeak Lee ,  HyunSu Tak ,  Wanil Lee ,  InHo Seo

IPC: H01L21/683 ,  H01L21/56 ,  H01L21/77

CPC classification number: H01L21/6835 ,  H01L21/561 ,  H01L21/77

Abstract: A semiconductor device is manufactured using a support base and a filling material formed on the support base. The filling material can be a plurality of protrusions or penetrable film. The protrusions are attached to the support base with an adhesive. The protrusions have a variety of shapes such as square frustum, conical frustum, three-sided pyramid with a flat top, four-sided rectangular body, and elongated square frustum. A semiconductor wafer is disposed over the support base with the filling material extending into openings in the semiconductor wafer. The openings in the semiconductor wafer can have slanted sidewalls, or a more complex shape such as ledges and vertical projections. The filling material may substantially fill the openings in the semiconductor wafer. The protrusions may partially fill the openings in the semiconductor wafer. The protrusions occupy at least a center of the openings in the semiconductor wafer.

公开(公告)号：US11887863B2

公开(公告)日：2024-01-30

申请号：US17447029

申请日：2021-09-07

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： HunTeak Lee ,  Gwang Kim ,  Junho Ye

IPC: H01L21/48 ,  H01L21/56 ,  H01L23/60 ,  H01L23/00 ,  H01L25/065 ,  H01L25/00 ,  H01L23/498 ,  H01L23/31

CPC classification number: H01L21/4853 ,  H01L21/561 ,  H01L21/565 ,  H01L23/3121 ,  H01L23/49811 ,  H01L23/60 ,  H01L24/81 ,  H01L24/97 ,  H01L25/0652 ,  H01L25/50 ,  H01L2224/81815 ,  H01L2924/1532

Abstract: A semiconductor device has a substrate and a first component disposed over a first surface of the substrate. A connector is disposed over the first surface of the substrate. A first encapsulant is deposited over the first component while the connector remains outside of the first encapsulant. A shielding layer is formed over the first encapsulant while the connector remains outside of the shielding layer. A second component is disposed over a second surface of the substrate. A solder bump is disposed over the second surface of the substrate. A second encapsulant is deposited over the second surface of the substrate. An opening is formed through the second encapsulant to expose the solder bump. A solder ball is disposed in the opening. The solder ball and solder bump are reflowed to form a combined solder bump.

公开(公告)号：US20230343732A1

公开(公告)日：2023-10-26

申请号：US18343606

申请日：2023-06-28

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： HunTeak Lee ,  Choon Heung Lee ,  JunHo Ye

IPC: H01L23/66 ,  H01L23/31 ,  H01L23/538 ,  H01L21/48 ,  H01L21/56 ,  H01Q1/22 ,  H01L23/552

CPC classification number: H01L23/66 ,  H01L23/3121 ,  H01L23/5386 ,  H01L21/4853 ,  H01L21/565 ,  H01Q1/2283 ,  H01L23/552 ,  H01L2223/6677

Abstract: A semiconductor device has an electrical component assembly, and a plurality of discrete antenna modules disposed over the electrical component assembly. Each discrete antenna module is capable of providing RF communication for the electrical component assembly. RF communication can be enabled for a first one of the discrete antenna modules, while RF communication is disabled for a second one of the discrete antenna modules. Alternatively, RF communication is enabled for the second one of the discrete antenna modules, while RF communication is disabled for the first one of the discrete antenna modules. A bump is formed over the discrete antenna modules. An encapsulant is deposited around the discrete antenna modules. A shielding layer is formed over the electrical components assembly. A stud or core ball can be formed internal to a bump connecting the discrete antenna modules to the electrical component assembly.

公开(公告)号：US20230275034A1

公开(公告)日：2023-08-31

申请号：US18303308

申请日：2023-04-19

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： HunTeak Lee ,  KyungHwan Kim ,  HeeSoo Lee ,  ChangOh Kim ,  KyoungHee Park ,  JinHee Jung ,  OMin Kwon ,  JiWon Lee ,  YuJeong Jang

IPC: H01L23/552 ,  H01L21/56

CPC classification number: H01L23/552 ,  H01L21/56 ,  H01L21/561 ,  H01L21/568 ,  H01L23/49822

Abstract: A semiconductor package has a substrate, a first component disposed over the substrate, an encapsulant deposited over the first component, and a second component disposed over the substrate outside the encapsulant. A metal mask is disposed over the second component. A shielding layer is formed over the semiconductor package. The metal mask after forming the shielding layer. The shielding layer is optionally formed on a contact pad of the substrate while a conic area above the contact pad that extends 40 degrees from vertical remains free of the encapsulant and metal mask while forming the shielding layer. Surfaces of the metal mask and encapsulant oriented toward the contact pad can be sloped. The metal mask can be disposed and removed using a pick-and-place machine.

公开(公告)号：US11587882B2

公开(公告)日：2023-02-21

申请号：US17163776

申请日：2021-02-01

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： DeokKyung Yang ,  HunTeak Lee ,  HeeSoo Lee ,  Wanil Lee ,  SangDuk Lee

IPC: H01L23/552 ,  H01L23/31 ,  H01L21/56 ,  H01L23/66

Abstract: A semiconductor device has a substrate comprising a carrier and an interposer disposed on the carrier. An electrical component is disposed over a first surface of the interposer. An interconnect structure is disposed over the first surface of the interposer. An encapsulant is deposited over the electrical component, interconnect structure, and substrate. A trench is formed through the encapsulant and interposer into the carrier. A shielding layer is formed over the encapsulant and into the trench. The carrier is removed after forming the shielding layer.

公开(公告)号：US11342294B2

公开(公告)日：2022-05-24

申请号：US16821093

申请日：2020-03-17

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： DeokKyung Yang ,  HunTeak Lee ,  OhHan Kim ,  HeeSoo Lee ,  DaeHyeok Ha ,  Wanil Lee

IPC: H01L23/00 ,  H01L23/538 ,  H01L23/31

Abstract: A semiconductor device has a first substrate and a semiconductor die disposed over the first substrate. A second substrate has a multi-layered conductive post. The conductive post has a first conductive layer and a second conductive layer formed over the first conductive layer. The first conductive layer is wider than the second conductive layer. A portion of the conductive post can be embedded within the second substrate. The second substrate is disposed over the first substrate adjacent to the semiconductor die. An encapsulant is deposited around the second substrate and semiconductor die. An opening is formed in the second substrate aligned with the conductive post. An interconnect structure is formed in the opening to contact the conductive post. A discrete electrical component is disposed over a surface of the first substrate opposite the semiconductor die. A shielding layer is formed over the discrete electrical component.

公开(公告)号：US10804119B2

公开(公告)日：2020-10-13

申请号：US15459997

申请日：2017-03-15

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： OhHan Kim ,  KyungHwan Kim ,  WoonJae Beak ,  HunTeak Lee ,  InSang Yoon

IPC: H01L21/00 ,  H01L21/56 ,  H01L23/58 ,  H01L23/552 ,  H01L23/31 ,  H01L21/683 ,  H01L23/00 ,  H01L25/16

Abstract: A semiconductor device has a semiconductor die or component, including an IPD, disposed over an attach area of a penetrable film layer with a portion of the semiconductor die or component embedded in the penetrable film layer. A conductive layer is formed over a portion of the film layer within the attach area and over a portion of the film layer outside the attach area. An encapsulant is deposited over the film layer, conductive layer, and semiconductor die or component. The conductive layer extends outside the encapsulant. An insulating material can be disposed under the semiconductor die or component. A shielding layer is formed over the encapsulant. The shielding layer is electrically connected to the conductive layer. The penetrable film layer is removed. The semiconductor die or component disposed over the film layer and covered by the encapsulant and shielding layer form an SIP module without a substrate.

公开(公告)号：US10790268B2

公开(公告)日：2020-09-29

申请号：US16821202

申请日：2020-03-17

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： DeokKyung Yang ,  HunTeak Lee ,  HeeSoo Lee

IPC: H01L23/552 ,  H01L25/10 ,  H01L25/00 ,  H01L23/538 ,  H01L21/48 ,  H01L23/00 ,  H01L21/56 ,  H01L23/31

Abstract: A semiconductor device has a first substrate and a semiconductor die disposed over the first substrate. A conductive pillar is formed on the first substrate. A first encapsulant is deposited over the first substrate and semiconductor die after forming the conductive pillar. A groove is formed in the first encapsulant around the conductive pillar. A first passive device is disposed over a second substrate. A second encapsulant is deposited over the first passive device and second substrate. The first substrate is mounted over the second substrate. A shielding layer is formed over the second encapsulant. A second passive device can be mounted over the second substrate opposite the first passive device and outside a footprint of the first substrate.

公开(公告)号：US20200219859A1

公开(公告)日：2020-07-09

申请号：US16821202

申请日：2020-03-17

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： DeokKyung Yang ,  HunTeak Lee ,  HeeSoo Lee

IPC: H01L25/10 ,  H01L25/00 ,  H01L23/538 ,  H01L23/552 ,  H01L21/48 ,  H01L23/00 ,  H01L21/56

Abstract: A semiconductor device has a first substrate and a semiconductor die disposed over the first substrate. A conductive pillar is formed on the first substrate. A first encapsulant is deposited over the first substrate and semiconductor die after forming the conductive pillar. A groove is formed in the first encapsulant around the conductive pillar. A first passive device is disposed over a second substrate. A second encapsulant is deposited over the first passive device and second substrate. The first substrate is mounted over the second substrate. A shielding layer is formed over the second encapsulant. A second passive device can be mounted over the second substrate opposite the first passive device and outside a footprint of the first substrate.

公开(公告)号：US20200013738A1

公开(公告)日：2020-01-09

申请号：US16027731

申请日：2018-07-05

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： DeokKyung Yang ,  HunTeak Lee ,  OhHan Kim ,  HeeSoo Lee ,  DaeHyeok Ha ,  Wanil Lee

IPC: H01L23/00 ,  H01L23/538

Abstract: A semiconductor device has a first substrate and a semiconductor die disposed over the first substrate. A second substrate has a multi-layered conductive post. The conductive post has a first conductive layer and a second conductive layer formed over the first conductive layer. The first conductive layer is wider than the second conductive layer. A portion of the conductive post can be embedded within the second substrate. The second substrate is disposed over the first substrate adjacent to the semiconductor die. An encapsulant is deposited around the second substrate and semiconductor die. An opening is formed in the second substrate aligned with the conductive post. An interconnect structure is formed in the opening to contact the conductive post. A discrete electrical component is disposed over a surface of the first substrate opposite the semiconductor die. A shielding layer is formed over the discrete electrical component.