公开(公告)号：US20180005964A1

公开(公告)日：2018-01-04

申请号：US15446472

申请日：2017-03-01

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Thomas Ordas ,  Alexandre Sarafianos ,  Fabrice Marinet ,  Stephane Chesnais

IPC: H01L23/00 ,  H01L23/528 ,  H01L23/62 ,  H01L27/02

CPC classification number: H01L23/576 ,  G06F21/75 ,  G06F21/87 ,  G06K19/07327 ,  G06K19/07363 ,  H01L23/5227 ,  H01L23/528 ,  H01L23/62 ,  H01L27/0255

Abstract: An integrated circuit includes a number of components disposed at a surface of a semiconductor body and an interconnect region connecting the components into a functional circuit. A metallic shield is also produced in the interconnect region. A configurable stage is configurable to operate in a receiving antenna configuration or in a detection configuration during which the integrated circuit is configured to detect a presence of an external electromagnetic radiation representative of an attack by injection of faults

公开(公告)号：US09716502B1

公开(公告)日：2017-07-25

申请号：US15379155

申请日：2016-12-14

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Alexandre Sarafianos ,  Bruno Nicolas

IPC: H03K19/00 ,  G01T1/24 ,  H03K19/177 ,  H01L23/00 ,  H03K19/003

CPC classification number: H03K19/17768 ,  G06F21/75 ,  G06F21/87 ,  G09C1/00 ,  H01L23/576 ,  H03K19/0033 ,  H03K19/17704 ,  H04L9/004 ,  H04L2209/12

Abstract: An integrated circuit protection device, including: groups of radiation detection elements distributed in a matrix array; logic gates combining outputs of the detection elements in rows and in columns, each output of a detection element being connected to a gate combining a row and to a gate combining a column; and a circuit for interpreting signals supplied by said logic gates and including an event counter and a delay element.

公开(公告)号：US09379066B2

公开(公告)日：2016-06-28

申请号：US14686908

申请日：2015-04-15

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Fabrice Marinet ,  Julien Mercier ,  Jimmy Fort ,  Alexandre Sarafianos

IPC: H01L29/76 ,  H01L23/00 ,  H01L27/06 ,  H01L27/092 ,  H01L29/732

CPC classification number: H01L23/576 ,  G09C1/00 ,  H01L23/57 ,  H01L27/0635 ,  H01L27/0658 ,  H01L27/092 ,  H01L29/7322 ,  H01L2924/0002 ,  H04L9/004 ,  H04L2209/12 ,  H01L2924/00

Abstract: A device for detecting a laser attack made on an integrated circuit chip comprises a bipolar transistor of a first type formed in a semiconductor substrate, that bipolar transistor comprising a parasitic bipolar transistor of a second type. A buried region, forming the base of the parasitic bipolar transistor, operates as a detector of the variations in current flowing caused by impingement of laser light on the substrate.

公开(公告)号：US09224701B2

公开(公告)日：2015-12-29

申请号：US14667232

申请日：2015-03-24

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Mathieu Lisart ,  Sylvie Wuidart ,  Alexandre Sarafianos

IPC: H01L23/58 ,  H01L23/00 ,  H01L21/66 ,  G06F21/75

CPC classification number: H01L23/576 ,  G06F21/75 ,  H01L22/14 ,  H01L22/30 ,  H01L22/34 ,  H01L2924/0002 ,  Y10T307/76 ,  H01L2924/00

Abstract: An integrated circuit, including: a semiconductor substrate of a first conductivity type; a plurality of regions of the first conductivity type vertically extending from the surface of the substrate, each of the regions being laterally delimited all along its periphery by a region of the second conductivity type; and a device for detecting a variation of the substrate resistance between each region of the first conductivity type and an area for biasing the substrate to a reference voltage.

公开(公告)号：US20150048459A1

公开(公告)日：2015-02-19

申请号：US14531025

申请日：2014-11-03

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Fabrice Marinet ,  Jimmy Fort ,  Alexandre Sarafianos ,  Julien Mercier

IPC: H01L23/00 ,  H01L29/732 ,  H01L27/092 ,  H01L27/06

CPC classification number: H01L23/576 ,  G09C1/00 ,  H01L23/57 ,  H01L27/0635 ,  H01L27/0658 ,  H01L27/092 ,  H01L29/7322 ,  H01L2924/0002 ,  H04L9/004 ,  H04L2209/12 ,  H01L2924/00

Abstract: A device for detecting a laser attack made on an integrated circuit chip comprises a bipolar transistor of a first type formed in a semiconductor substrate, that bipolar transistor comprising a parasitic bipolar transistor of a second type. A buried region, forming the base of the parasitic bipolar transistor, operates as a detector of the variations in current flowing caused by impingement of laser light on the substrate.

Abstract translation: 用于检测在集成电路芯片上进行的激光攻击的装置包括形成在半导体衬底中的第一类型的双极晶体管，该双极晶体管包括第二类型的寄生双极晶体管。 形成寄生双极晶体管的基极的掩埋区域作为由激光照射在衬底上引起的电流变化的检测器。

公开(公告)号：US20130200371A1

公开(公告)日：2013-08-08

申请号：US13751549

申请日：2013-01-28

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Fabrice Marinet ,  Jimmy Fort ,  Alexandre Sarafianos ,  Julien Mercier

IPC: H01L23/00

CPC classification number: H01L23/576 ,  G09C1/00 ,  H01L23/57 ,  H01L27/0635 ,  H01L27/0658 ,  H01L27/092 ,  H01L29/7322 ,  H01L2924/0002 ,  H04L9/004 ,  H04L2209/12 ,  H01L2924/00

Abstract: A device for detecting a laser attack in an integrated circuit chip formed in the upper P-type portion of a semiconductor substrate incorporating an NPN bipolar transistor having an N-type buried layer, including a detector of the variations of the current flowing between the base of said NPN bipolar transistor and the substrate.

Abstract translation: 一种用于检测形成在具有N型掩埋层的NPN双极晶体管的半导体衬底的上部P型部分中形成的集成电路芯片中的激光攻击的装置，包括：检测器， 的NPN双极晶体管和衬底。

公开(公告)号：US12142536B2

公开(公告)日：2024-11-12

申请号：US18082155

申请日：2022-12-15

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Alexandre Sarafianos ,  Abderrezak Marzaki

IPC: H01L21/66 ,  H01L23/00 ,  H01L29/00 ,  H03K19/00

Abstract: A semiconductor substrate includes a buried semiconductor layer and semiconductor wells. A device for detecting a possible thinning of the semiconductor substrate via the rear face thereof is formed on and in the semiconductor wells. The device is a non-inverting buffer including an input terminal and an output terminal, the device being powered between a supply terminal and a reference terminal where the buried semiconductor layer provides the supply terminal. A control circuit delivers an input signal in a first state to the input terminal and outputs a control signal indicating a detection of a thinning of the substrate if a signal generated at the output terminal in response to the input signal is in a second state different from the first state.

公开(公告)号：US11270957B2

公开(公告)日：2022-03-08

申请号：US16267573

申请日：2019-02-05

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Alexandre Sarafianos ,  Bruno Nicolas ,  Daniele Fronte

IPC: H01L23/00 ,  G06F21/77 ,  G06F21/75 ,  G06K19/073

Abstract: A semiconductor substrate of an integrated circuit is protected by a coating. The semiconductor includes a front face and a rear face. To detect a breach of the integrity of a semiconductor substrate of an integrated circuit from the rear face, an opening of the coating facing the rear face of the substrate is detected. In response thereto, an alarm is generated. The detection is performed by making resistance measurements with respect to the semiconductor substrate and comparing the measured resistance to a nominal resistive value of the semiconductor substrate.

公开(公告)号：US10734329B2

公开(公告)日：2020-08-04

申请号：US15801517

申请日：2017-11-02

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Alexandre Sarafianos ,  Thomas Ordas

IPC: H01L21/56 ,  H01L23/00 ,  H01L27/118 ,  H01L27/02

Abstract: In some embodiments, an electronic chip includes a doped semiconductor substrate of a first conductivity type, and wells of the second conductivity type on the side of the front face of the chip, in and on which wells circuit elements are formed. One or more slabs of a second conductivity type are buried under the wells and are separated from the wells. The electronic chip also includes, for each buried slab, a biasable section of the second conductivity type, which extends from the front face of the substrate to the buried slab. A first MOS transistor with a channel of the first conductivity type is disposed in the upper portion of each section, where the first transistor is an element of a flip-flop. A circuit is used for detecting a change in the logic level of one of the flip-flops.

公开(公告)号：US10685923B2

公开(公告)日：2020-06-16

申请号：US15916183

申请日：2018-03-08

Applicant: STMICROELECTRONICS (ROUSSET) SAS

Inventor： Alexandre Sarafianos ,  Jimmy Fort ,  Thierry Soude

IPC: H01L23/00 ,  H01L23/60 ,  G01R31/26 ,  H01L21/74 ,  H01L21/66 ,  H01L29/36

Abstract: An electronic chip including a plurality of buried doped bars and a circuit for detecting an anomaly of an electric characteristic of the bars.