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公开(公告)号：US20170092973A1
公开(公告)日：2017-03-30
申请号：US15161682
申请日：2016-05-23
Applicant: Samsung Electronics Co., Ltd.
Inventor： Dongjoon Lee , Eunha Park , Kihyun Kim , Taeyoung Kim , Victor ROEV , Hyunpyo Lee , Heungchan Lee , Dongmin Im
IPC: H01M8/1016 , C07C211/63 , C07C311/48 , H01M12/08
CPC classification number: H01M8/1016 , C07C211/63 , C07C311/48 , H01M10/0569 , H01M12/08 , H01M2008/1095 , H01M2300/0025 , Y02E60/128
Abstract: An electrolyte for a lithium air battery includes a compound represented by Formula 1 wherein the definitions of A and R1-R10 are disclosed herein. Also a lithium air battery including an anode, a cathode, and at least one selected from the herein-described electrolyte and a reaction product thereof.
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32.发明授权公开(公告)号：US09331095B2
公开(公告)日：2016-05-03
申请号：US14921845
申请日：2015-10-23
Applicant: Samsung Electronics Co., Ltd.
Inventor： Sunil Shim , Jaehun Jeong , Jaehoon Jang , Kihyun Kim
IPC: G11C11/34 , H01L27/115 , G11C16/04
CPC classification number: H01L27/11582 , G11C16/0408 , G11C16/0466 , G11C16/0483 , H01L27/11519 , H01L27/11551 , H01L27/11556 , H01L27/1157
Abstract: Nonvolatile memory devices utilize vertically-stacked strings of nonvolatile memory cells (e.g., NAND-type strings) that can be selectively coupled to common source lines within a substrate. This selective coupling may be provided by lateral ground select transistors having different threshold voltages that account for different lateral spacings between the vertically-stacked strings of nonvolatile memory cells and the common source lines.
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33.发明申请VERTICALLY-INTEGRATED NONVOLATILE MEMORY DEVICES HAVING LATERALLY-INTEGRATED GROUND SELECT TRANSISTORS 审中-公开具有横向集成式接地选择晶体管的垂直集成非易失性存储器件公开(公告)号：US20160056172A1
公开(公告)日：2016-02-25
申请号：US14921845
申请日：2015-10-23
Applicant: Samsung Electronics Co., Ltd.
Inventor： Sunil Shim , Jaehun Jeong , Jaehoon Jang , Kihyun Kim
IPC: H01L27/115
CPC classification number: H01L27/11582 , G11C16/0408 , G11C16/0466 , G11C16/0483 , H01L27/11519 , H01L27/11551 , H01L27/11556 , H01L27/1157
Abstract: Nonvolatile memory devices utilize vertically-stacked strings of nonvolatile memory cells (e.g., NAND-type strings) that can be selectively coupled to common source lines within a substrate. This selective coupling may be provided by lateral ground select transistors having different threshold voltages that account for different lateral spacings between the vertically-stacked strings of nonvolatile memory cells and the common source lines.
Abstract translation: 非易失性存储器件利用垂直堆叠的非易失性存储器单元串（例如，NAND型串），其可选择性地耦合到衬底内的公共源极线。 该选择耦合可以由具有不同阈值电压的横向接地选择晶体管提供，这些阈值电压考虑了非垂直堆叠的非易失性存储单元串与公共源极线之间的不同横向间隔。
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34.发明授权Vertically-integrated nonvolatile memory devices having laterally-integrated ground select transistors 有权具有横向集成的地选择晶体管的垂直集成的非易失性存储器件公开(公告)号：US08743614B2
公开(公告)日：2014-06-03
申请号：US14095597
申请日：2013-12-03
Applicant: Samsung Electronics Co., Ltd.
Inventor： Sunil Shim , Jaehun Jeong , Jaehoon Jang , Kihyun Kim
IPC: G11C11/34
CPC classification number: H01L27/11582 , G11C16/0408 , G11C16/0466 , G11C16/0483 , H01L27/11519 , H01L27/11551 , H01L27/11556 , H01L27/1157
Abstract: Nonvolatile memory devices utilize vertically-stacked strings of nonvolatile memory cells (e.g., NAND-type strings) that can be selectively coupled to common source lines within a substrate. This selective coupling may be provided by lateral ground select transistors having different threshold voltages that account for different lateral spacings between the vertically-stacked strings of nonvolatile memory cells and the common source lines.
Abstract translation: 非易失性存储器件利用垂直堆叠的非易失性存储器单元串（例如，NAND型串），其可选择性地耦合到衬底内的公共源极线。 该选择耦合可以由具有不同阈值电压的横向接地选择晶体管提供，这些阈值电压考虑了非垂直堆叠的非易失性存储单元串与公共源极线之间的不同横向间隔。
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公开(公告)号：US12205267B2
公开(公告)日：2025-01-21
申请号：US17737494
申请日：2022-05-05
Inventor： Nohong Kwak , Donyun Kim , Kihyun Kim , Yunhyoung Nam
IPC: G06V10/762 , G06T7/00
Abstract: A pattern inspection method includes converting sample patterns of a sample image into training images, extracting feature values of the training patterns, setting feature vectors of the training patterns on the basis of the feature values, converting the feature vectors into Gaussian vectors, clustering the Gaussian vectors, thereby sorting the Gaussian vectors into clusters, selecting a select vector from each of the clusters, storing, as a pattern model, the training pattern corresponding to the select vector in a database, converting a target pattern of a target image into an inspection pattern on the basis of the pattern model, and inspecting the inspection pattern.
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Patent Agency Ranking
公开(公告)号：US12136835B2
公开(公告)日：2024-11-05
申请号：US18178545
申请日：2023-03-06
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Yunjeong Noh , Kihyun Kim , Dongzo Kim , Jihye Kim , Keyic Son , Taehyeon Yu , Kyungmin Lee , Hyungkoo Chung , Mincheol Ha
Abstract: An electronic device includes: coils; power conversion circuits configured to receive direct current (DC) power, convert the DC power into alternating current (AC) power, and output the AC power to the coils; and a processor. The processor is configured to: apply to the coils a ping signal of which a ping power section is repeated periodically and which has a plurality of ping power levels increasing in phases; confirm an SSP signal responding to the ping signal; and perform wireless power transmission by the coils on the basis of a ping power level in which the SSP signal is confirmed from among the plurality of ping power levels.
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公开(公告)号：US20240164103A1
公开(公告)日：2024-05-16
申请号：US18418720
申请日：2024-01-22
Applicant: Samsung Electronics Co., Ltd.
Inventor： Soodoo Chae , Myoungbum Lee , HuiChang Moon , Hansoo Kim , JinGyun Kim , Kihyun Kim , Siyoung Choi , Hoosung Cho
IPC: H10B43/27 , H01L23/498 , H01L23/522 , H01L23/535 , H01L29/40 , H01L29/423 , H10B43/10 , H10B43/20 , H10B43/50
CPC classification number: H10B43/27 , H01L23/49844 , H01L23/5226 , H01L23/535 , H01L29/408 , H01L29/4234 , H10B43/10 , H10B43/20 , H10B43/50 , H01L2924/0002
Abstract: A three-dimensional nonvolatile memory device and a method for fabricating the same include a semiconductor substrate, a plurality of active pillars, a plurality of gate electrodes, and a plurality of supporters. The semiconductor substrate includes a memory cell region and a contact region. The active pillars extend in the memory cell region perpendicularly to the semiconductor substrate. The gate electrodes intersect the active pillars, extend from the memory cell region to the contact region and are stacked on the semiconductor substrate. The supporters extend in the contact region perpendicularly to the semiconductor substrate to penetrate at least one or more of the gate electrodes.
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公开(公告)号：US11482886B2
公开(公告)日：2022-10-25
申请号：US16784432
申请日：2020-02-07
Applicant: Samsung Electronics Co., Ltd.
Inventor： Yunjeong Noh , Dongzo Kim , Mincheol Ha , Kwangseob Kim , Kihyun Kim , Jihye Kim , Kyungmin Lee , Wooram Lee , Yongsang Yun
Abstract: One or more disclosed embodiments relate to a wireless charging transmitter and a wireless power transfer method. The wireless charging transmitter includes a first charging pad including a first wireless power circuit, a second charging pad including a second wireless power circuit, and a controller configured to, in response to detection of a first electronic device being placed on the first charging pad, transfer power at a first designated wireless power level via the first wireless power circuit, in response to detection of a second electronic device being placed on the second charging pad, transmit a first command for decreasing power transferred to the first electronic device, and transfer, upon receipt of a first request for power at a second designated wireless power level from the first electronic device in response to the first command, the power at the second designated wireless power level via the first and second wireless power circuits. The disclosure may further include other various embodiments.
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公开(公告)号：US11450963B2
公开(公告)日：2022-09-20
申请号：US17270829
申请日：2019-06-10
Applicant: Samsung Electronics Co., Ltd.
Inventor： Joohoan Do , Seonghoon Kang , Kihyun Kim , Sujin Paik , Kumjong Sun , Yongsang Yun
Abstract: An electronic device, according to various embodiments, may comprise: a first antenna for obtaining power to be used for executing a function from a wireless signal transmitted from an external electronic device; and a second antenna for identifying information related to the function from the wireless signal. The first antenna, which is relatively larger than the second antenna, may be selectively opened or connected by means of a switch. When the wireless signal transmitted from the external electronic device includes identification information corresponding to the electronic device, the first antenna may be electrically connected to thus have a closed loop structure. The electronic device may electrically separate the first antenna. The first antenna may be electrically separated to thus have an open loop structure. The first antenna having an open loop structure may not interfere with wireless communication between the external electronic device and another external electronic device.
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公开(公告)号：US20220197149A1
公开(公告)日：2022-06-23
申请号：US17406529
申请日：2021-08-19
Applicant: Samsung Electronics Co., Ltd.
Inventor： Kihyun Kim
IPC: G03F7/20 , G01N23/2251 , H01J37/28
Abstract: Provided is an inspection method including providing a pattern layout including measurement points, generating a first measurement map including first measurement regions that overlap the measurement points and do not overlap each other in a two-dimensional plan view, providing preliminary measurement regions on the measurement points, producing a polygon by grouping ones of the preliminary measurement regions that overlap each other in the two-dimensional plan view, providing a second measurement region on a center of the polygon, selecting the second measurement region when all of the measurement points in the polygon overlap the second measurement region in the two-dimensional plan view, generating a second measurement map including the selected second measurement region, generating a third measurement map by using the first and second measurement maps, and inspecting patterns on a semiconductor substrate by using the third measurement map. The third measurement map includes the selected second measurement region and ones of the first measurement regions that do not overlap the selected second measurement region in the two-dimensional plan view.
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