公开(公告)号：US20170141701A1

公开(公告)日：2017-05-18

申请号：US15351125

申请日：2016-11-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Bongjae RHEE ,  Sungsoo Moon ,  Kemsuk Seo ,  Sangmoon Lee ,  Changsu Lee ,  Jihun Heo

IPC: H02N1/08

Abstract: An electrostatic induction device is provided which includes at least one first element including a first electrode, a second electrode electrically connected to the first electrode, and a third electrode electrically connected to the first electrode and the second electrode, at least one second element including a charged area having been charged with positive or negative charges and moves while adjacent to the first element so as to cause an electrostatic induction action with the first element, and a third element which is electrically connected to the first element, and receives, from the first element, a first electric current generated between the first and the second electrode, a second electric current generated between the first and the third electrode, and a third electric current generated between the second and the third electrode, by the movement of the second element, and rectifies the received first, second and third electric currents.

公开(公告)号：US12159938B2

公开(公告)日：2024-12-03

申请号：US17711914

申请日：2022-04-01

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hyojin Kim ,  Sangmoon Lee ,  Jinbum Kim ,  Yongjun Nam

IPC: H01L29/786 ,  H01L21/02 ,  H01L21/265 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/06 ,  H01L29/417 ,  H01L29/423 ,  H01L29/66

Abstract: A semiconductor device includes; a first fin vertically protruding from a substrate and extending in a first horizontal direction, a second fin vertically protruding from the substrate, an isolation layer contacting side surfaces of the first fin and the second fin, a first lower barrier layer on the first fin, a second lower barrier layer on the second fin, source/drain regions spaced apart in the first horizontal direction on the first lower barrier layer, channel layers disposed between the source/drain regions and vertically spaced apart on the first barrier layer, a gate structure intersecting the first lower barrier layer, surrounding each of the channel layers, and extending in a second horizontal direction, an upper barrier layer on the second lower barrier layer, and first semiconductor layers and second semiconductor layers stacked on the upper barrier layer.

公开(公告)号：US20240170554A1

公开(公告)日：2024-05-23

申请号：US18511553

申请日：2023-11-16

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hyojin Kim ,  Jinbum Kim ,  Sangmoon Lee ,  Dongwoo Kim ,  Sungmin Kim ,  Yongjun Nam ,  Ingeon Hwang

IPC: H01L29/423 ,  H01L29/06 ,  H01L29/08 ,  H01L29/66 ,  H01L29/775 ,  H01L29/786

CPC classification number: H01L29/42392 ,  H01L29/0673 ,  H01L29/0847 ,  H01L29/66545 ,  H01L29/775 ,  H01L29/78696

Abstract: A semiconductor device is provided. The semiconductor device includes: an active pattern extending in a first direction on a substrate; channel layers arranged on the active pattern; a gate structure crossing the active pattern, and surrounding the plurality of channel layers, the gate structure extending in a second direction that crosses the first direction; and source/drain regions provided on the active pattern on both sides of the gate structure, and including a first epitaxial layer connected to each of side surfaces of the channel layers, and a second epitaxial layer provided on the first epitaxial layer and having a composition different from that of the first epitaxial layer. Each of the side surfaces of the plurality of channel layers has a crystal plane of (111) or (100). The first epitaxial layer extends in the second direction and has a first thickness in the first direction that is substantially constant.

公开(公告)号：US11961839B2

公开(公告)日：2024-04-16

申请号：US18133156

申请日：2023-04-11

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hyojin Kim ,  Jihye Lee ,  Sangmoon Lee ,  Seung Hun Lee

IPC: H01L29/161 ,  H01L27/092

CPC classification number: H01L27/092 ,  H01L29/161

Abstract: A semiconductor device including a substrate; a first active pattern on the substrate and extending in a first direction, an upper portion of the first active pattern including a first channel pattern; first source/drain patterns in recesses in an upper portion of the first channel pattern; and a gate electrode on the first active pattern and extending in a second direction crossing the first direction, the gate electrode being on a top surface and on a side surface of the at least one first channel pattern, wherein each of the first source/drain patterns includes a first, second, and third semiconductor layer, which are sequentially provided in the recesses, each of the first channel pattern and the third semiconductor layers includes silicon-germanium (SiGe), and the first semiconductor layer has a germanium concentration higher than those of the first channel pattern and the second semiconductor layer.

公开(公告)号：US20240087884A1

公开(公告)日：2024-03-14

申请号：US18513297

申请日：2023-11-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： GYEOM KIM ,  Dongwoo Kim ,  Jihye Yi ,  JINBUM KIM ,  Sangmoon Lee ,  Seunghun Lee

IPC: H01L21/02 ,  H01L21/285 ,  H01L21/768 ,  H01L21/8234 ,  H01L23/485 ,  H01L29/06 ,  H01L29/08 ,  H01L29/165 ,  H01L29/417 ,  H01L29/423 ,  H01L29/66 ,  H01L29/775 ,  H01L29/78 ,  H01L29/786

CPC classification number: H01L21/02293 ,  H01L21/28518 ,  H01L21/76897 ,  H01L21/823431 ,  H01L21/823481 ,  H01L23/485 ,  H01L29/0673 ,  H01L29/0847 ,  H01L29/165 ,  H01L29/41766 ,  H01L29/41791 ,  H01L29/42392 ,  H01L29/66439 ,  H01L29/66553 ,  H01L29/6656 ,  H01L29/775 ,  H01L29/7848 ,  H01L29/78696

Abstract: A semiconductor device is provided. The semiconductor device includes: an active region on a semiconductor substrate; a channel region on the active region; a source/drain region adjacent to the channel region on the active region; a gate structure overlapping the channel region, on the channel region; a contact structure on the source/drain region; a gate spacer between the contact structure and the gate structure; and a contact spacer surrounding a side surface of the contact structure. The source/drain region includes a first epitaxial region having a recessed surface and a second epitaxial region on the recessed surface of the first epitaxial region, and the second epitaxial region includes an extended portion, extended from a portion overlapping the contact structure in a vertical direction, in a horizontal direction and overlapping the contact spacer in the vertical direction.

公开(公告)号：US11881213B2

公开(公告)日：2024-01-23

申请号：US17405792

申请日：2021-08-18

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hyundon Yoon ,  Sangmoon Lee

IPC: G10L15/20 ,  G06F3/16 ,  G10L15/22 ,  G10L25/51 ,  H02J9/00

CPC classification number: G10L15/20 ,  G06F3/165 ,  G10L15/22 ,  G10L25/51 ,  H02J9/005

Abstract: A first electronic device includes an audio outputter; a communicator configured to transmit data to and receive data from a second electronic device; a memory storing one or more instructions; and at least one processor configured to execute the one or more instructions to: obtain an audio output level of an audio that is output through the audio outputter; obtain a spacing distance between the second electronic device and the first electronic device; based on the obtained audio output level and the obtained spacing distance, obtain a voice reception notification indicating whether a voice can be accurately received by the second electronic device, and control the communicator to transmit the obtained voice reception notification to the second electronic device.

公开(公告)号：US11869765B2

公开(公告)日：2024-01-09

申请号：US17853990

申请日：2022-06-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Gyeom Kim ,  Dongwoo Kim ,  Jihye Yi ,  Jinbum Kim ,  Sangmoon Lee ,  Seunghun Lee

IPC: H01L21/02 ,  H01L21/285 ,  H01L21/768 ,  H01L21/8234 ,  H01L23/485 ,  H01L29/06 ,  H01L29/08 ,  H01L29/165 ,  H01L29/417 ,  H01L29/423 ,  H01L29/66 ,  H01L29/775 ,  H01L29/78 ,  H01L29/786 ,  H01L23/532 ,  B82Y10/00 ,  H01L29/10 ,  H01L29/161 ,  H01L21/28

CPC classification number: H01L21/02293 ,  H01L21/28518 ,  H01L21/76897 ,  H01L21/823431 ,  H01L21/823481 ,  H01L23/485 ,  H01L29/0673 ,  H01L29/0847 ,  H01L29/165 ,  H01L29/41766 ,  H01L29/41791 ,  H01L29/42392 ,  H01L29/6656 ,  H01L29/66439 ,  H01L29/66553 ,  H01L29/775 ,  H01L29/7848 ,  H01L29/78696

Abstract: A semiconductor device is provided. The semiconductor device includes: an active region on a semiconductor substrate; a channel region on the active region; a source/drain region adjacent to the channel region on the active region; a gate structure overlapping the channel region, on the channel region; a contact structure on the source/drain region; a gate spacer between the contact structure and the gate structure; and a contact spacer surrounding a side surface of the contact structure. The source/drain region includes a first epitaxial region having a recessed surface and a second epitaxial region on the recessed surface of the first epitaxial region, and the second epitaxial region includes an extended portion, extended from a portion overlapping the contact structure in a vertical direction, in a horizontal direction and overlapping the contact spacer in the vertical direction.

公开(公告)号：US20230317792A1

公开(公告)日：2023-10-05

申请号：US18073806

申请日：2022-12-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： Gyeom Kim ,  Jinbum Kim ,  Sangmoon Lee ,  Dahye Kim ,  Kyungbin Chun

IPC: H01L29/423 ,  H01L29/775 ,  H01L29/06 ,  H01L29/167 ,  H01L29/08 ,  H01L29/417

CPC classification number: H01L29/0847 ,  H01L29/0673 ,  H01L29/167 ,  H01L29/41733 ,  H01L29/42392 ,  H01L29/775

Abstract: A semiconductor device includes an active region, a plurality of channel layers disposed to be spaced apart from each other in a vertical direction on the active region, a gate structure extending in a second direction to intersect the active region and the plurality of channel layers and surrounding the plurality of channel layers, a source/drain region disposed on the active region on at least one side of the gate structure and contacting the plurality of channel layers, and a contact plug connected to the source/drain region. The source/drain region includes a first epitaxial layer disposed on the active region and extending to contact the plurality of channel layers, second epitaxial layers disposed on the first epitaxial layer, each including impurities in a first concentration, and doping layers stacked alternately with the second epitaxial layers, each including the impurities in a second concentration higher than the first concentration.

公开(公告)号：US20230065755A1

公开(公告)日：2023-03-02

申请号：US17709940

申请日：2022-03-31

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sangmoon Lee ,  Jinbum Kim ,  Dongsuk Shin

IPC: H01L29/417 ,  H01L29/78 ,  H01L29/15

Abstract: A semiconductor device includes: an active region extending on a substrate in a first direction; a gate structure intersecting the active region and extending on the substrate in a second direction; and a source/drain region on the active region on at least one side of the gate structure. The source/drain region may include a first epitaxial layer on the active region and including impurities of a first conductivity type in a first concentration, a second epitaxial layer on the first epitaxial layer and including the impurities of the first conductivity type in a second concentration, and a first barrier layer between the first epitaxial layer and the second epitaxial layer, wherein the first barrier layer includes doped oxygen.

公开(公告)号：US20230051602A1

公开(公告)日：2023-02-16

申请号：US17725180

申请日：2022-04-20

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Beomjin PARK ,  Hyojin Kim ,  Myung Gil Kang ,  Jinbum Kim ,  Sangmoon Lee ,  Dongwon Kim ,  Keun Hwi Cho

IPC: H01L29/423 ,  H01L29/786 ,  H01L29/66

Abstract: A semiconductor device is provided. The semiconductor device includes: an active pattern provided on a substrate and extending in a first direction; a pair of source/drain patterns provided on the active pattern and spaced apart from each other in the first direction; a plurality of channel layers vertically stacked and spaced apart from each other on the active pattern between the pair of source/drain patterns; a gate electrode extending in a second direction between the pair of source/drain patterns, the gate electrode being provided on the active pattern and surrounding the plurality of channel layers, and the second direction intersecting the first direction; and a gate spacer provided between the plurality of channel layers, and between the gate electrode and the pair of source/drain patterns. The gate spacer includes a plurality of first spacer patterns and a plurality of second spacer patterns that are alternately stacked on sidewalls of the pair of source/drain patterns.