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78 条记录 (耗时 0.029 秒)

    Semiconductor memory device having a clock alignment training circuit and method for operating the same
    32.
    发明授权
    Semiconductor memory device having a clock alignment training circuit and method for operating the same 有权
    具有时钟对准训练电路的半导体存储器件及其操作方法

    公开(公告)号：US08125251B2

    公开(公告)日：2012-02-28

    申请号：US12630443

    申请日：2009-12-03

    申请人： Jung-Hoon Park

    发明人： Jung-Hoon Park

    IPC分类号： G11C8/18 ,  H03L7/00

    CPC分类号： H03K23/44 ,  G06F1/08 ,  G06F1/12 ,  G11C7/222

    摘要： A semiconductor device includes a clock input block to receive a system clock and a data clock, a clock frequency dividing block to generate a plurality of multi-phase data frequency division clocks each of which has the phase difference of a predetermined size by dividing a frequency of the data clock and to determine whether or not phases of the plurality of multi-phase data frequency division clocks are reversed in response to a frequency division control signal, and a first phase detecting block to detect a phase of the system clock based on a phase of a first selected clock that is predetermined among the plurality of multi-phase data frequency division clocks and to determine a logic level of the frequency division control signal in response to the detected result.

    摘要翻译： 半导体器件包括用于接收系统时钟和数据时钟的时钟输入块，时钟分频块，用于产生多个多相数据分频时钟，每个时钟分频时钟具有预定大小的相位差， 并且确定多个多相数据分频时钟的相位是否响应于分频控制信号反相;以及第一相位检测块，用于基于一个第一相位检测块检测系统时钟的相位 在多个多相数据分频时钟之间预定的第一选定时钟的相位，并响应于检测结果来确定分频控制信号的逻辑电平。

    Phase-change random access memory device
    33.
    发明申请
    Phase-change random access memory device 审中-公开
    相变随机存取存储器件

    公开(公告)号：US20100243981A1

    公开(公告)日：2010-09-30

    申请号：US12730460

    申请日：2010-03-24

    申请人： Dae-Hwan Kang ,  Jung-Hoon Park

    发明人： Dae-Hwan Kang ,  Jung-Hoon Park

    IPC分类号： H01L45/00

    CPC分类号： H01L45/1273 ,  G11C13/0004 ,  H01L27/2409 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/144 ,  H01L45/1675

    摘要： A phase-change random access memory device includes an isolation layer structure, an insulating interlayer, a spacer, a switching element and a phase-change material (PCM) layer. The isolation layer structure is in a trench on a substrate, defines an active region in the substrate, and has a recess at an upper portion thereof. The insulating interlayer has an opening partially exposing the active region and the isolation layer structure. The spacer is on a sidewall of the opening and fills the recess. The switching element is in the opening on the exposed active region. The PCM layer is electrically connected to the switching element.

    摘要翻译： 相变随机存取存储器件包括隔离层结构，绝缘中间层，间隔物，开关元件和相变材料（PCM）层。 隔离层结构在衬底上的沟槽中，在衬底中限定有源区，并且在其上部具有凹部。 绝缘中间层具有部分地暴露有源区和隔离层结构的开口。 间隔件位于开口的侧壁上并填充凹部。 开关元件在暴露的有源区域上的开口中。 PCM层与开关元件电连接。

    On-die termination circuit and method for semiconductor memory apparatus
    34.
    发明授权
    On-die termination circuit and method for semiconductor memory apparatus 有权
    半导体存储装置的片上终端电路和方法

    公开(公告)号：US07525337B2

    公开(公告)日：2009-04-28

    申请号：US11602284

    申请日：2006-11-21

    申请人： Jung-Hoon Park ,  Sun-Suk Yang

    发明人： Jung-Hoon Park ,  Sun-Suk Yang

    IPC分类号： H03K17/16 ,  H03K19/003

    CPC分类号： H03K19/0005 ,  G11C5/063 ,  G11C7/1051 ,  G11C7/1057 ,  G11C7/1078 ,  G11C7/1084 ,  H04L25/0272 ,  H04L25/0298 ,  H04L25/063

    摘要： An on-die termination circuit for semiconductor memory apparatus includes an ODT (On Die Termination) input driving unit that divides an input voltage on the basis of a resistance ratio according to a first code Pcode having at least two bits and outputs a first line voltage, a first ODT control unit that counts the first code or resets the first code to a first set value according to whether or not the first line voltage and a reference voltage match with each other, an ODT output driving unit that divides an input voltage on the basis of the resistance ratio according to the first code and a resistance ratio according to a second code having at least two bits and outputs a second line voltage, and a second ODT control unit that counts the second code or resets the second code to a second set value according to whether or not the second line voltage and the reference voltage are consistent with each other.

    摘要翻译： 用于半导体存储装置的片上终端电路包括：ODT（On Die Termination）输入驱动单元，其根据具有至少两个位的第一代码Pcode <0：N>根据电阻比分割输入电压，以及 输出第一线电压，第一ODT控制单元，其对第一代码进行计数，或者根据第一线电压和参考电压是否彼此匹配来将第一代码重置为第一设定值; ODT输出驱动单元， 根据第一代码和电阻比根据具有至少两个比特的第二代码并输出第二线电压的电阻比分压输入电压，以及计数第二代码或复位的第二ODT控制单元 根据第二线电压和参考电压是否彼此一致，将第二代码设置为第二设定值。

    On-die termination circuit and driving method thereof
    35.
    发明授权
    On-die termination circuit and driving method thereof 失效
    片上终端电路及其驱动方法

    公开(公告)号：US07495469B2

    公开(公告)日：2009-02-24

    申请号：US11824165

    申请日：2007-06-28

    申请人： Jung-Hoon Park

    发明人： Jung-Hoon Park

    IPC分类号： H03K17/16

    CPC分类号： H03K19/0005 ,  H03K19/018571 ,  H04L25/0298

    摘要： An on-die termination circuit is capable of increasing a resolution without enlargement of a chip or a layout size. The on-die termination circuit includes a control means, a termination resistance supply means, a code signal generating means. The control means sequentially generates a plurality of control signals in a response to a driving signal. The termination resistance supply means supplies a termination resistance in response to a coarse code signal having a plurality of bits and a fine code signal having a plurality of bits. The code signal generating means controls the fine code signal and the coarse code signal in response to the plurality of the control signals in order that the termination resistance has a level which is correspondent to an input resistance.

    摘要翻译： 片上终端电路能够在不扩大芯片或布局尺寸的情况下提高分辨率。 片上终端电路包括控制装置，终端电阻提供装置，代码信号发生装置。 控制装置响应于驱动信号顺序产生多个控制信号。 终端电阻提供装置响应于具有多个比特的粗码信号和具有多个比特的精细码信号提供终止电阻。 代码信号发生装置响应于多个控制信号控制精细代码信号和粗略编码信号，以便终端电阻具有与输入电阻相对应的电平。

    Hold-open lock structure of sliding door
    36.
    发明申请
    Hold-open lock structure of sliding door 审中-公开
    推门开锁锁结构

    公开(公告)号：US20070138813A1

    公开(公告)日：2007-06-21

    申请号：US11524928

    申请日：2006-09-21

    申请人： Jung-Hoon Park

    发明人： Jung-Hoon Park

    IPC分类号： E05B3/00

    CPC分类号： E05B65/08 ,  E05B83/40 ,  Y10T292/57

    摘要： A hold-open lock structure of a sliding door, in which, when the inner handle of the sliding door is manipulated to open the sliding door, a hold-open lock is not released, thus preventing a safety hazard from occurring when the vehicle is parked on a slope due to the sliding door not being locked open and moving closed due to its own weight when the inner handle is released after the sliding door has been opened.

    摘要翻译： 一种滑动门的保持打开的锁定结构，其中当滑动门的内手柄被操纵以打开滑动门时，不释放保持开锁，从而防止当车辆处于安全隐患时发生安全隐患 由于滑动门未被锁定打开并且在滑动门打开之后释放内部手柄时由于其自重而移动关闭，因此停在斜坡上。

    Flash memory pipelined burst read operation circuit, method, and system
    39.
    发明授权
    Flash memory pipelined burst read operation circuit, method, and system 有权
    闪存流水线突发读操作电路，方法和系统

    公开(公告)号：US07079445B2

    公开(公告)日：2006-07-18

    申请号：US10852841

    申请日：2004-05-24

    申请人： Soo-Hwan Choi ,  Jung-Hoon Park

    发明人： Soo-Hwan Choi ,  Jung-Hoon Park

    IPC分类号： G11C7/00

    CPC分类号： G11C16/26

    摘要： Method and apparatus for use with flash memory devices and systems are included among the embodiments. In exemplary systems, a pipelined burst read operation allows the device to support higher data transfer rates than are possible with prior art burst read flash memory devices. Preferably, the flash memory device supports both non-pipelined and pipelined read operations, with the read mode settable from a memory controller. Other embodiments are described and claimed.

    摘要翻译： 在实施例中包括用于闪存设备和系统的方法和装置。 在示例性系统中，流水线突发读取操作允许设备支持比现有技术的突发读取闪存设备可能的更高的数据传输速率。 优选地，闪存设备支持非流水线和流水线读取操作，读取模式可从存储器控制器设置。 描述和要求保护其他实施例。

    Method of displaying a color image and mobile terminal using the same
    40.
    发明申请
    Method of displaying a color image and mobile terminal using the same 审中-公开
    显示彩色图像的方法和使用其的移动终端

    公开(公告)号：US20060109490A1

    公开(公告)日：2006-05-25

    申请号：US11280454

    申请日：2005-11-17

    申请人： Jung-Hoon Park ,  Seock-Woo Jang

    发明人： Jung-Hoon Park ,  Seock-Woo Jang

    IPC分类号： H04N1/60 ,  G03F3/08

    CPC分类号： G09G5/06 ,  G09G3/3607 ,  G09G2360/144

    摘要： A method of displaying a color image and a mobile terminal using the same are provided. Color image information is displayed using a YUV-based mapping table based on a human color perception characteristic, such that the color image can be represented with a minimum amount of data.

    摘要翻译： 提供了显示彩色图像的方法和使用其的移动终端。 使用基于人类颜色感知特性的基于YUV的映射表来显示彩色图像信息，使得可以以最小量的数据表示彩色图像。