公开(公告)号：US07883020B2

公开(公告)日：2011-02-08

申请号：US11763856

申请日：2007-06-15

申请人： Seung-Won Lee

发明人： Seung-Won Lee

IPC分类号： G06K19/06

CPC分类号： G06K19/07 ,  G01R31/3187 ,  G06K7/0095 ,  G11C16/04 ,  G11C29/16 ,  G11C2029/0401 ,  G11C2029/1208

摘要： A smart card includes a non-volatile memory, a CPU, and a plurality of pads. The non-volatile memory stores a test program. The CPU is released from a reset state in response to a test enable signal. The CPU executes the test program stored in the non-volatile memory based on predetermined flag information and stores a result of the test program in the non-volatile memory.

摘要翻译： 智能卡包括非易失性存储器，CPU和多个焊盘。 非易失性存储器存储测试程序。 响应于测试使能信号，CPU从复位状态释放。 CPU基于预定的标志信息执行存储在非易失性存储器中的测试程序，并将测试程序的结果存储在非易失性存储器中。

公开(公告)号：US07632028B2

公开(公告)日：2009-12-15

申请号：US12323807

申请日：2008-11-26

申请人： Chun-Seok Jeong ,  Ho-Youn Park ,  Sok-Joo Lee ,  Seung-Won Lee

发明人： Chun-Seok Jeong ,  Ho-Youn Park ,  Sok-Joo Lee ,  Seung-Won Lee

IPC分类号： G03D5/00 ,  G03D5/04

CPC分类号： H01L21/67718 ,  G02F1/1303 ,  H01L21/6776

摘要： A substrate transfer apparatus that is designed provide an inclined transfer function that improves liquid saving efficiency of a process solution (developing solution) during the transfer of the substrate. The substrate transfer apparatus includes a first transfer unit for transferring a substrate, a second transfer unit spaced apart from an end of the first transfer unit, a third transfer unit disposed between the first and second transfer units and providing an inclined transfer that is capable of saving a developing solution adhered to the substrate during transfer of the substrate, and a transfer controller for controlling an inclined transfer angle and a connection state of the third transfer unit.

摘要翻译： 设计的基板输送装置提供倾斜的传递函数，其在基板传送期间提高处理溶液（显影液）的液体节省效率。 基片传送装置包括用于传送基片的第一传送单元，与第一传送单元的端部隔开的第二传送单元，设置在第一和第二传送单元之间的第三传送单元，提供能够 在基板的转印过程中节约了附着在基板上的显影液，以及用于控制第三转印单元的倾斜转印角度和连接状态的转印控制器。

公开(公告)号：US07564712B2

公开(公告)日：2009-07-21

申请号：US11769334

申请日：2007-06-27

申请人： Seung-Won Lee

发明人： Seung-Won Lee

IPC分类号： G11C16/04

CPC分类号： G11C16/24 ,  G11C16/04 ,  G11C16/10 ,  G11C16/30 ,  G11C29/12 ,  G11C29/12005 ,  G11C2029/1204 ,  G11C2029/1802

摘要： A flash memory device includes a memory cell array including a plurality of memory cells. A data writing buffer temporarily stores data to be written into the memory cells. A control circuit controls a write operation of the memory cells. A decoder decodes write address of the memory cell in response to the control circuit and regulating a constant current to flow through a selected bit line with reference to a result of the decoding. The decoder decodes an address and controls a current in units of a memory cell during a normal writing mode and decodes an address and controls a current in units of a memory block during a test writing mode.

摘要翻译： 闪存器件包括包括多个存储单元的存储单元阵列。 数据写入缓冲器临时存储要写入存储单元的数据。 控制电路控制存储单元的写操作。 解码器响应于控制电路对存储器单元的写入地址进行解码，并参照解码结果调节恒定电流流过所选位线。 解码器解码地址并且在正常写入模式期间以存储单元为单位控制电流，并且在测试写入模式期间解码地址并以存储块为单位控制电流。

公开(公告)号：US07439793B2

公开(公告)日：2008-10-21

申请号：US11270648

申请日：2005-11-10

申请人： Seung-Won Lee

发明人： Seung-Won Lee

IPC分类号： G05F1/10 ,  G05F3/02

CPC分类号： H02M3/073 ,  H02M2003/075

摘要： A charge pump circuit may include a plurality of charge pump cells. Each charge pump cell may further include an output node for supplying charge, a pumping node for receiving a clock signal and a pumping capacitor, which may be connected between the output node and the pumping node, for storing the charge and may repeat a charge or discharge operation and/or a pre-charge operation in response to a plurality of clock signals. In the pre-charge operation, a unidirectional charge supply may be performed from a lower voltage output node to a higher voltage output node.

摘要翻译： 电荷泵电路可以包括多个电荷泵电池。 每个电荷泵单元还可以包括用于提供电荷的输出节点，用于接收时钟信号的泵浦节点和可连接在输出节点和泵送节点之间的泵浦电容器，用于存储电荷，并且可以重复充电或 放电操作和/或响应于多个时钟信号的预充电操作。 在预充电操作中，可以从较低电压输出节点到较高电压输出节点执行单向电荷供应。

公开(公告)号：US20080181008A1

公开(公告)日：2008-07-31

申请号：US11693106

申请日：2007-03-29

申请人： Byeong-Hoon Lee ,  Ki-Hong Kim ,  Seung-Won Lee ,  Sun-Kwon Kim

发明人： Byeong-Hoon Lee ,  Ki-Hong Kim ,  Seung-Won Lee ,  Sun-Kwon Kim

IPC分类号： G11C11/34

CPC分类号： G11C16/10 ,  G11C16/20

摘要： A flash memory system capable of improving an access performance and an access method thereof. The system includes: a flash memory device including a plurality of storage regions; a contents memory storing setting information corresponding to the plurality of storage regions, respectively; and a processing unit setting operation conditions of the flash memory device by referring to the setting information during an access operation for the flash memory device.

摘要翻译： 一种能够提高访问性能的闪存系统及其访问方法。 该系统包括：闪存器件，包括多个存储区域; 内容存储器，分别存储与所述多个存储区域相对应的设置信息; 以及处理单元，在闪速存储器件的访问操作期间参考设置信息来设置闪速存储器件的操作条件。

公开(公告)号：US20050078523A1

公开(公告)日：2005-04-14

申请号：US10922122

申请日：2004-08-18

申请人： Seung-Won Lee ,  Seung-Keun Lee

发明人： Seung-Won Lee ,  Seung-Keun Lee

IPC分类号： G11C16/06 ,  G11C7/06 ,  G11C7/18 ,  G11C16/02 ,  G11C16/04 ,  G11C16/26 ,  G11C16/28 ,  G11C29/24 ,  H01L21/8247 ,  H01L27/10 ,  H01L27/115 ,  H01L29/788 ,  H01L29/792 ,  G11C11/34

CPC分类号： G11C7/062 ,  G11C7/18 ,  G11C16/04 ,  G11C16/28 ,  G11C29/24 ,  G11C29/50004

摘要： A memory device in accordance with embodiments of the present invention includes a reference cell array and a plurality of banks. Each of the banks includes memory cells. A plurality of current copier circuits corresponds to the banks, respectively. Each of the current copier circuits copies a reference current flowing through a reference cell array to generate a reference voltage. A plurality of sense blocks correspond to the banks, respectively. Each of the sense blocks includes a plurality of sense amplifiers for sensing data from a corresponding bank in response to the reference voltage from the corresponding current copier circuit. Memory cell lay-out area is reduced, and sense speed is increased.

摘要翻译： 根据本发明的实施例的存储器件包括参考单元阵列和多个存储体。 每个银行都包含存储单元。 多个当前复印机电路分别对应于存储体。 每个当前复印机电路复制流过参考单元阵列的参考电流以产生参考电压。 多个感测块分别对应于存储体。 每个感测块包括多个读出放大器，用于响应于来自相应的当前复印机电路的参考电压来感测来自相应存储体的数据。 存储单元布局区域减少，感测速度提高。

公开(公告)号：US5238867A

公开(公告)日：1993-08-24

申请号：US818846

申请日：1992-01-10

申请人： O'Dae Kwon ,  Seung-Won Lee

发明人： O'Dae Kwon ,  Seung-Won Lee

IPC分类号： G02F1/015 ,  G02F3/02 ,  H01L21/205 ,  H01L31/10

CPC分类号： G02F3/028 ,  Y10S148/16

摘要： Disclosed herein is a novel process for the manufacture of optical bistable switching device including multiple quantum wells. The process is carried out by: supplying a first organo-metallic compound as the source of a first metallic element and a reaction gas continuously while supplying a second organo-metallic compound as the source of a second metallic element in a discrete mode into a reactor and cultivating a semiconductor multiple quantum wells region having multiple pairs of intrinsic semiconductor-layer/semiconductor-layer(GaAs/AlGaAs), one of the layer containing said second metallic element(Al), while controlling the mole fraction of said second metallic element(Al) to be in the range of 0.01 to 0.25 of the total first and second metal contents existing in the layer containing the second metallic element, thereby lowering the impurity concentration and optimizing the negative resistance.

摘要翻译： 本文公开了一种用于制造包括多个量子阱的光学双稳态开关器件的新颖方法。 该方法通过以下方式进行：将第一有机金属化合物作为第一金属元素的源和反应气体连续供给，同时以离散模式将第二有机金属化合物作为第二金属元素的源供入反应器 以及培养具有多对本征半导体层/半导体层（GaAs / AlGaAs）的半导体多量子阱区域，所述本体半导体层/半导体层（GaAs / AlGaAs）是包含所述第二金属元素（Al）的层之一，同时控制所述第二金属元素 Al）在含有第二金属元素的层中的总第一和第二金属含量的0.01至0.25的范围内，从而降低杂质浓度并优化负电阻。

公开(公告)号：US08680714B2

公开(公告)日：2014-03-25

申请号：US13268144

申请日：2011-10-07

申请人： Seung-Won Lee

发明人： Seung-Won Lee

IPC分类号： H02J1/00

CPC分类号： G05F1/56 ,  G05F1/563 ,  G05F1/613 ,  G05F1/614 ,  H02J7/025 ,  H02J17/00 ,  H02J50/10 ,  H02J50/80 ,  Y10T307/707

摘要： A smart card includes an internal voltage generator, a clock generator, and an internal circuit. The internal voltage generator generates a first internal voltage and a second internal voltage based on an input voltage received through an antenna. A level of the second internal voltage is lower than a level of the first internal voltage. The clock generator receives the first internal voltage and the second internal voltage to generate a clock signal. A frequency of the clock signal is changed according to the level of the first internal voltage. The internal circuit operates based on the clock signal and the second internal voltage.

摘要翻译： 智能卡包括内部电压发生器，时钟发生器和内部电路。 内部电压发生器基于通过天线接收的输入电压产生第一内部电压和第二内部电压。 第二内部电压的电平低于第一内部电压的电平。 时钟发生器接收第一内部电压和第二内部电压以产生时钟信号。 时钟信号的频率根据第一内部电压的电平而改变。 内部电路基于时钟信号和第二内部电压进行工作。

公开(公告)号：US08576626B2

公开(公告)日：2013-11-05

申请号：US13570960

申请日：2012-08-09

申请人： Byeong-Hoon Lee ,  Ki-Hong Kim ,  Seung-Won Lee ,  Sun-Kwon Kim

发明人： Byeong-Hoon Lee ,  Ki-Hong Kim ,  Seung-Won Lee ,  Sun-Kwon Kim

IPC分类号： G11C16/04

CPC分类号： G11C16/0483

摘要： A memory system includes a memory and a memory controller operating to control the memory. The memory includes a random accessible memory including a memory cell array operable in a random access mode, a NAND flash memory, and a selection circuit making the memory controller operate either one of the random accessible memory or the NAND flash memory.

摘要翻译： 存储器系统包括操作以控制存储器的存储器和存储器控制器。 存储器包括随机存取存储器，其包括以随机存取模式操作的存储单元阵列，NAND闪速存储器和使存储器控制器操作随机存取存储器或NAND闪存之一的选择电路。

公开(公告)号：US08444883B2

公开(公告)日：2013-05-21

申请号：US12933629

申请日：2009-03-24

申请人： Jaephil Cho ,  Junho Eom ,  Yoon Han Chang ,  Chang-Won Park ,  Seung-Won Lee ,  Sang-Hoon Jeon ,  Byung Do Park

发明人： Jaephil Cho ,  Junho Eom ,  Yoon Han Chang ,  Chang-Won Park ,  Seung-Won Lee ,  Sang-Hoon Jeon ,  Byung Do Park

IPC分类号： H01M4/36

CPC分类号： H01M4/5825 ,  B82Y30/00 ,  C01B25/45 ,  C01G51/42 ,  C01P2002/52 ,  C01P2002/72 ,  C01P2002/85 ,  C01P2004/03 ,  C01P2004/04 ,  C01P2004/61 ,  C01P2004/62 ,  C01P2004/64 ,  C01P2004/84 ,  C01P2006/40 ,  H01M4/366 ,  H01M4/485 ,  H01M4/525 ,  H01M10/0525

摘要： A method for preparing a cathode active material for a lithium secondary battery is provided. The preparing method includes: adding a phosphorus compound to a transition metal oxide dispersion liquid to prepare a coating liquid; drying the coating liquid to prepare a powder including phosphorus oxide coated on the surface of the transition metal oxide; and dry-mixing the powder coated with the phosphorus oxide with a lithium intercalation compound, and then firing the mixture to form a solid solution compound of L1-M1-M2-P—O (where M1 is a transition metal derived from transition metal oxide, and M2 is a metal derived from lithium intercalation compound) on the surface of the lithium intercalation compound. The method for preparing a cathode active material for a lithium secondary battery simplifies the conventional preparing process to save process cost, and it provides comparable electrochemical characteristics to a cathode active material obtained from a wet process.

摘要翻译： 提供了制备锂二次电池用正极活性物质的方法。 该制备方法包括：向过渡金属氧化物分散液中加入磷化合物以制备涂布液; 干燥涂布液以制备包含在过渡金属氧化物表面上的氧化磷的粉末; 将含有氧化磷的粉末与锂嵌入化合物进行干混，然后烧成该混合物以形成L1-M1-M2-PO（其中M1为过渡金属氧化物的过渡金属）和 M2是由锂嵌入化合物衍生的金属）在锂嵌入化合物的表面上。 制备用于锂二次电池的正极活性材料的方法简化了常规的制备方法以节省工艺成本，并且与从湿法获得的阴极活性材料提供了可比较的电化学特性。