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31.发明授权公开(公告)号：US09627047B2
公开(公告)日：2017-04-18
申请号：US14972103
申请日：2015-12-17
Applicant: Silicon Motion Inc.
Inventor： Ching-Hui Lin , Tsung-Chieh Yang
CPC classification number: G11C11/5635 , G11C11/5621 , G11C11/5628 , G11C11/5642 , G11C16/10
Abstract: A method for writing data into a flash memory unit includes: when writing data into the flash memory unit for the n-th time, determining a data polarity of an n-th data bit to be written into the flash memory unit; selectively injecting an n-th electrical charge amount into a floating gate of the flash memory unit according to the data polarity of the n-th data bit; when writing data into the flash memory unit for the (n+1)-th time, determining the data polarity of an (n+1)-th data bit to be written into the flash memory unit; and selectively injecting an (n+1)-th electrical charge amount into the floating gate of the flash memory unit according to the data polarity of the (n+1)-th data bit. The (n+1)-th electrical charge amount is not equal to the n-th electrical charge amount, and n is a positive integer not less than 1.
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32.发明申请METHOD AND ASSOCIATED DECODING CIRCUIT FOR DECODING AN ERROR CORRECTION CODE 审中-公开用于解码错误校正码的方法和相关解码电路公开(公告)号：US20170077962A1
公开(公告)日：2017-03-16
申请号：US15259065
申请日：2016-09-08
Applicant: Silicon Motion Inc.
Inventor： Tsung-Chieh Yang
CPC classification number: H03M13/1545 , H03M13/1525 , H03M13/159 , H03M13/6502
Abstract: A method for decoding an error correction code and an associated decoding circuit are provided, where the method includes the steps of: calculating a set of error syndromes of the error correction code, where the error correction code is a t-error correcting code and has capability of correcting t errors, and a number s of the set of error syndromes is smaller than t; sequentially determining a set of coefficients within a plurality of coefficients of an error locator polynomial of the error correction code according to at least one portion of error syndromes within the set of error syndromes for building a roughly-estimated error locator polynomial; performing a Chien search to determine a plurality of roots of the roughly-estimated error locator polynomial; and performing at least one check operation to selectively utilize a correction result of the error correction code as a decoding result of the error correction code.
Abstract translation: 提供一种解码纠错码和相关解码电路的方法，其中该方法包括以下步骤：计算误差校正码的误差校正码集合，其中纠错码是一个t误差校正码，并具有 纠正t误差的能力，误差综合征组的数量小于t; 根据构成大致估计的误差定位多项式的误差综合征集合内的错误综合征的至少一部分，依次确定纠错码的误差定位多项式的多个系数中的一系列系数; 执行Chien搜索以确定大致估计的误差定位多项式的多个根; 以及执行至少一个检查操作，以选择性地利用纠错码的校正结果作为纠错码的解码结果。
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33.发明授权公开(公告)号：US09536602B2
公开(公告)日：2017-01-03
申请号：US14689058
申请日：2015-04-17
Applicant: Silicon Motion Inc.
Inventor： Tsung-Chieh Yang
CPC classification number: G11C11/5628 , G11C16/26 , G11C16/32 , G11C2211/5648
Abstract: A method for writing data into a flash memory, wherein the flash memory includes a plurality multi-level cells, and each of the plurality of multi-level cells is capable of storing a plurality of bits. The method includes: storing a first bit into each of the plurality of multi-level cells respectively; determining if each of the plurality of multi-level cells stores the first bit respectively; and when each of the plurality of multi-level cells stores the first bit respectively, storing a second bit into each of the plurality of multi-level cells respectively.
Abstract translation: 一种将数据写入闪速存储器的方法，其中闪速存储器包括多个多电平单元，并且多个多电平单元中的每一个能够存储多个位。 该方法包括：分别将第一位存储到多个多级信元中的每一个; 确定所述多个多电平单元中的每一个是否分别存储所述第一位; 并且当多个多电平单元中的每一个分别存储第一位时，分别将第二位存储到多个多电平单元中的每一个。
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34.发明申请METHOD FOR INCREASING SPEED OF WRITING DATA INTO FLASH MEMORY UNIT AND ASSOCIATED DEVICE 有权将数据写入闪存单元和相关设备的速度增加方法公开(公告)号：US20160180927A1
公开(公告)日：2016-06-23
申请号：US14972103
申请日：2015-12-17
Applicant: Silicon Motion Inc.
Inventor： Ching-Hui Lin , Tsung-Chieh Yang
IPC: G11C11/56
CPC classification number: G11C11/5635 , G11C11/5621 , G11C11/5628 , G11C11/5642 , G11C16/10
Abstract: A method for writing data into a flash memory unit includes: when writing data into the flash memory unit for the n-th time, determining a data polarity of an n-th data bit to be written into the flash memory unit; selectively injecting an n-th electrical charge amount into a floating gate of the flash memory unit according to the data polarity of the n-th data bit; when writing data into the flash memory unit for the (n+1)-th time, determining the data polarity of an (n+1)-th data bit to be written into the flash memory unit; and selectively injecting an (n+1)-th electrical charge amount into the floating gate of the flash memory unit according to the data polarity of the (n+1)-th data bit. The (n+1)-th electrical charge amount is not equal to the n-th electrical charge amount, and n is a positive integer not less than 1.
Abstract translation: 一种将数据写入闪存单元的方法包括：当将数据写入闪存单元第n次时，确定要写入闪存单元的第n个数据位的数据极性; 根据第n个数据位的数据极性，选择性地将第n个电荷量注入闪速存储器单元的浮置栅极; 当在第（n + 1）次时间内将数据写入闪存单元时，确定要写入闪存单元的第（n + 1）个数据位的数据极性; 以及根据第（n + 1）个数据位的数据极性选择性地将第（n + 1）个电荷量注入到闪速存储器单元的浮置栅极。 第（n + 1）个电荷量不等于第n个电荷量，n是不小于1的正整数。
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35.发明授权Method for performing memory access management, and associated memory device and controller thereof 有权用于执行存储器访问管理的方法及其相关联的存储器件及其控制器公开(公告)号：US09239685B2
公开(公告)日：2016-01-19
申请号：US14327580
申请日：2014-07-10
Applicant: Silicon Motion Inc.
Inventor： Tsung-Chieh Yang , Hsiao-Te Chang , Wen-Long Wang
CPC classification number: G11C11/5642 , G06F3/0604 , G06F3/0622 , G06F3/0629 , G06F3/0638 , G06F3/0679 , G11C11/5628 , G11C16/08 , G11C16/26
Abstract: A method for accessing a memory includes: utilizing a Flash memory to perform a plurality of sensing operations with a plurality of different sensing voltages respectively corresponding to the plurality of sensing operations; according to the plurality of sensing operations, generating a first digital value of a Flash cell of the Flash memory; according to the plurality of sensing operations and the first digital value, generating at least a second digital value of the Flash cell; and obtaining soft information of the Flash cell according to the second digital value. The first digital value and the second digital value are used for determining information of a same bit stored in the Flash cell, a number of possible bit(s) of the Flash cell directly corresponds to a number of possible states of the Flash cell, and the obtained soft information is used for performing soft decoding.
Abstract translation: 一种用于访问存储器的方法包括：利用闪速存储器执行多个感测操作，所述感测操作具有分别对应于所述多个感测操作的多个不同感测电压; 根据所述多个感测操作，产生所述闪存的闪存单元的第一数字值; 根据所述多个感测操作和所述第一数字值，生成所述闪存单元的至少第二数字值; 并根据第二数字值获取闪存单元的软信息。 第一数字值和第二数字值用于确定存储在闪存单元中的相同位的信息，闪存单元的可能位的数量直接对应于闪存单元的可能状态的数量，以及 所获得的软信息用于执行软解码。
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Patent Agency Ranking
公开(公告)号：US09230673B2
公开(公告)日：2016-01-05
申请号：US14277007
申请日：2014-05-13
Applicant: Silicon Motion Inc.
Inventor： Tsung-Chieh Yang
CPC classification number: G11C16/26 , G06F3/0619 , G06F3/064 , G06F3/0659 , G06F3/0679 , G06F11/1068 , G06F11/1072 , G11C11/5642 , G11C16/0475 , G11C16/0483 , G11C16/3427 , G11C29/52 , G11C2211/5644 , G11C2211/5648 , H03M13/152
Abstract: A method for reading data stored in a flash memory includes at least the following steps: controlling the flash memory to perform a plurality of read operations upon a plurality of memory cells included in the flash memory; obtaining a plurality of bit sequences read from the memory cells, respectively, wherein the read operations read bits of a predetermined bit order from the memory cells by utilizing different control gate voltage settings; and determining readout information of the memory cells according to binary digit distribution characteristics of the bit sequences.
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37.发明申请METHOD FOR ACCESSING FLASH MEMORY AND ASSOCIATED CONTROLLER AND MEMORY DEVICE 有权用于访问闪速存储器和相关控制器和存储器件的方法公开(公告)号：US20150234609A1
公开(公告)日：2015-08-20
申请号：US14617955
申请日：2015-02-10
Applicant: Silicon Motion Inc.
Inventor： Tsung-Chieh Yang
IPC: G06F3/06
CPC classification number: G06F3/0619 , G06F3/0655 , G06F3/0659 , G06F3/0679 , G06F3/0688 , G06F12/0246 , G06F2206/1014
Abstract: The present invention provides a method for accessing a flash memory, wherein the flash memory is a Triple-Level Cell flash memory and each word line of the flash memory constitutes a least significant bit (LSB) page, a central significant bit (CSB) page and a most significant bit (MSB) page, each storage unit of each word line of the flash memory is implemented by a floating-gate transistor, and each storage unit supports at least eight write voltage levels, the method includes: generating dummy data according to data of a first page and a second page corresponding to a specific word line of the flash memory, wherein the dummy data is going to be written in a third page corresponding to the specific word line; and writing the data and the dummy data into the flash memory.
Abstract translation: 本发明提供了一种用于访问闪速存储器的方法，其中闪速存储器是三电平单元闪速存储器，并且闪速存储器的每个字线构成最低有效位（LSB）页，中央有效位（CSB）页 和最高有效位（MSB）页面，闪存的每个字线的每个存储单元由浮栅晶体管实现，并且每个存储单元支持至少八个写电压电平，该方法包括：根据 对应于闪速存储器的特定字线的第一页面和第二页面的数据，其中伪数据将被写入对应于特定字线的第三页面; 并将数据和虚拟数据写入闪速存储器。
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38.发明授权Method for controlling access operations of a flash memory, and associated flash memory device and flash memory controller 有权用于控制闪速存储器以及相关联的闪速存储器件和闪存控制器的访问操作的方法公开(公告)号：US08959404B2
公开(公告)日：2015-02-17
申请号：US13741396
申请日：2013-01-15
Applicant: Silicon Motion Inc.
Inventor： Tsung-Chieh Yang
CPC classification number: G06F12/0246 , G06F11/1072
Abstract: A method for controlling access operations of a flash memory includes: receiving first source data from a host; generating a plurality of first scrambled signals according to a plurality of pseudo random sequences and the first source data; obtaining a plurality of transmission powers of the first scrambled signals; and selecting a target scrambled signal from the first scrambled signals according to the transmission powers for storing to the flash memory. An associated flash memory device and an associated flash memory controller are also provided.
Abstract translation: 一种用于控制闪速存储器的访问操作的方法，包括：从主机接收第一源数据; 根据多个伪随机序列和第一源数据产生多个第一加扰信号; 获得所述第一加扰信号的多个发送功率; 以及根据用于存储到闪速存储器的发送功率，从第一加扰信号中选择目标加扰信号。 还提供了相关联的闪存设备和相关联的闪存控制器。
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39.发明授权Method for performing memory access management, and associated memory device and controller thereof 有权用于执行存储器访问管理的方法及其相关联的存储器件及其控制器公开(公告)号：US08867270B2
公开(公告)日：2014-10-21
申请号：US13944866
申请日：2013-07-17
Applicant: Silicon Motion Inc.
Inventor： Tsung-Chieh Yang , Hsiao-Te Chang , Wen-Long Wang
IPC: G11C16/04
CPC classification number: G11C11/5642 , G06F3/0604 , G06F3/0622 , G06F3/0629 , G06F3/0638 , G06F3/0679 , G11C11/5628 , G11C16/08 , G11C16/26
Abstract: A method for performing memory access management includes: with regard to a same Flash cell of a Flash memory, receiving a first digital value outputted by the Flash memory, requesting the Flash memory to output at least one second digital value, wherein the first digital value and the at least one second digital value are utilized for determining information of a same bit stored in the Flash cell, and a number of various possible states of the Flash cell correspond to a possible number of bit(s) stored in the Flash cell; based upon the second digital value, generating/obtaining soft information of the Flash cell, for use of performing soft decoding; and controlling the Flash memory to perform sensing operations by respectively utilizing a plurality of sensing voltages that are not all the same, in order to generate the first digital value and the second digital value.
Abstract translation: 一种用于执行存储器存取管理的方法包括：关于闪速存储器的相同闪存单元，接收闪速存储器输出的第一数字值，请求闪速存储器输出至少一个第二数字值，其中第一数字值 并且所述至少一个第二数字值用于确定存储在所述闪存单元中的相同位的信息，并且所述闪存单元的多个可能状态的数量对应于所述闪存单元中存储的可能数量的位; 基于所述第二数字值，生成/获取所述闪存单元的软信息，以用于执行软解码; 以及通过分别利用不完全相同的多个感测电压来控制闪存以执行感测操作，以便产生第一数字值和第二数字值。
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40.发明授权Method and apparatus for reading data stored in flash memory by referring to binary digit distribution characteristics of bit sequences read from flash memory 有权通过参考从闪速存储器读取的比特序列的二进制数字分配特性来读取存储在闪速存储器中的数据的方法和装置公开(公告)号：US08760929B2
公开(公告)日：2014-06-24
申请号：US13802625
申请日：2013-03-13
Applicant: Silicon Motion Inc.
Inventor： Tsung-Chieh Yang
CPC classification number: G11C16/26 , G06F3/0619 , G06F3/064 , G06F3/0659 , G06F3/0679 , G06F11/1068 , G06F11/1072 , G11C11/5642 , G11C16/0475 , G11C16/0483 , G11C16/3427 , G11C29/52 , G11C2211/5644 , G11C2211/5648 , H03M13/152
Abstract: A method for reading data stored in a flash memory includes at least the following steps: controlling the flash memory to perform a plurality of read operations upon a plurality of memory cells included in the flash memory; obtaining a plurality of bit sequences read from the memory cells, respectively, wherein the read operations read bits of a predetermined bit order from the memory cells by utilizing different control gate voltage settings; and determining readout information of the memory cells according to binary digit distribution characteristics of the bit sequences.
Abstract translation: 用于读取存储在闪速存储器中的数据的方法至少包括以下步骤：控制闪速存储器对包括在闪速存储器中的多个存储器单元执行多个读取操作; 分别从存储单元获取多个位序列，其中读操作通过利用不同的控制栅极电压设置从存储单元读取预定位序的位; 以及根据比特序列的二进制数字分配特性来确定存储器单元的读出信息。
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