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公开(公告)号：US12218185B2
公开(公告)日：2025-02-04
申请号：US18012145
申请日：2020-12-24
Applicant: TDK Corporation
Inventor： Daiki Ishii , Yoshihiko Yano , Yuki Yamashita , Kenichi Yoshida , Tetsuhiro Takahashi
IPC: H01G4/008 , H01G2/06 , H01G4/005 , H01G4/01 , H01G4/012 , H01G4/06 , H01G4/10 , H01G4/12 , H01G4/228 , H01G4/252 , H01G4/33 , H01L23/00 , H01L25/16 , H01L49/02 , H05K1/18
Abstract: To provide a thin film capacitor in which warpage is less likely to occur. A thin film capacitor includes: a metal foil having roughened upper and lower surfaces; a dielectric film covering the upper surface of the metal foil and having an opening through which the metal foil is partly exposed; a dielectric film covering the lower surface of the metal foil and made of a dielectric material having a thermal expansion coefficient smaller than that of the metal foil; a first electrode layer contacting the metal foil through the opening; and a second electrode layer contacting the first dielectric film without contacting the metal foil. The lower surface of the metal foil is thus covered with the dielectric film having a small thermal expansion coefficient, thereby making it possible to prevent the occurrence of warpage.
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公开(公告)号：US12132078B2
公开(公告)日：2024-10-29
申请号：US18012809
申请日：2020-12-24
Applicant: TDK Corporation
Inventor： Yoshihiko Yano , Daiki Ishii , Kenichi Yoshida , Yuki Yamashita
IPC: H01G4/008 , H01G2/06 , H01G4/005 , H01G4/01 , H01G4/012 , H01G4/06 , H01G4/10 , H01G4/12 , H01G4/228 , H01G4/252 , H01G4/33 , H01L23/00 , H01L25/16 , H01L49/02 , H05K1/18
CPC classification number: H01L28/75 , H01G2/065 , H01G4/005 , H01G4/008 , H01G4/01 , H01G4/012 , H01G4/06 , H01G4/10 , H01G4/1209 , H01G4/1218 , H01G4/1254 , H01G4/228 , H01G4/33 , H01L25/16 , H01L28/84 , H05K1/18 , H01G4/252 , H01L24/16 , H01L2224/16227 , H01L2924/19015 , H01L2924/19041 , H01L2924/19102 , H01L2924/19103 , H05K2201/10015
Abstract: To provide a thin film capacitor having high adhesion performance with respect to a multilayer substrate. A thin film capacitor includes: a metal foil having a roughened upper surface; a dielectric film covering the upper surface of the metal foil and having an opening through which the metal foil is partly exposed; a first electrode layer contacting the metal foil through the opening; and a second electrode layer contacting the dielectric film without contacting the metal foil. A height of the first electrode layer is lower than a height of the second electrode layer. This enhances adhesion performance when the thin film capacitor is embedded in a multilayer substrate and improves ESR characteristics.
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公开(公告)号：US11545303B2
公开(公告)日：2023-01-03
申请号：US17143581
申请日：2021-01-07
Applicant: TDK CORPORATION
Inventor： Kazuhiro Yoshikawa , Kenichi Yoshida , Takashi Ohtsuka , Yuichiro Okuyama , Takeshi Oohashi , Hajime Kuwajima
Abstract: Disclosed herein is an electronic component that includes a substrate; and a plurality of conductive layers and a plurality of insulating layers which are alternately laminated on the substrate. The side surface of a predetermined one of the plurality of insulating layers has a recessed part set back from a side surface of the substrate and a projecting part projecting from the recessed part. The recessed part is covered with a first dielectric film made of an inorganic insulating material.
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公开(公告)号：US11357110B2
公开(公告)日：2022-06-07
申请号：US17132626
申请日：2020-12-23
Applicant: TDK Corporation
Inventor： Takeshi Oohashi , Shinichiro Toda , Daiki Kusunoki , Takashi Ohtsuka , Kazuhiro Yoshikawa , Kenichi Yoshida
Abstract: Disclosed herein is an electronic component that includes a first conductive layer including a lower electrode and a first inductor pattern, a dielectric film that covers the lower electrode, an upper electrode laminated on the lower electrode through the dielectric film, an insulating layer that covers the first conductive layer, dielectric film, and upper electrode, and a second conductive layer formed on the insulating layer and including a second inductor pattern. The first and second inductor patterns are connected in parallel through via conductors penetrating the insulating layer.
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公开(公告)号：US11240908B2
公开(公告)日：2022-02-01
申请号：US16665503
申请日：2019-10-28
Applicant: TDK Corporation
Inventor： Kazuhiro Yoshikawa , Yuuki Aburakawa , Tatsuo Namikawa , Kenichi Yoshida , Hitoshi Saita
Abstract: Disclosed herein is a thin film capacitor that includes a capacitive insulating film, a first metal film formed on one surface of the capacitive insulating film, and a second metal film formed on other surface of the capacitive insulating film and made of a metal material different from that of the first metal film. The thin film capacitor has an opening penetrating the capacitive insulating film, first metal film, and second metal film. The second metal film is thicker than the first metal film. A first size of a part of the opening that penetrates the first metal film is larger than a second size of a part of the opening that penetrates the second metal film.
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Patent Agency Ranking
公开(公告)号：US11114249B2
公开(公告)日：2021-09-07
申请号：US16483516
申请日：2018-02-13
Applicant: TDK Corporation
Inventor： Koichi Tsunoda , Mitsuhiro Tomikawa , Kazuhiro Yoshikawa , Kenichi Yoshida
Abstract: In a thin-film capacitor, an electrode terminal layer and an electrode layer of a capacitor portion are connected to electrode terminals by via conductors that is formed to penetrate an insulating layer in a thickness direction thereof, and a short circuit wiring in the thickness direction is realized by the via conductors. In the thin-film capacitor, an increase in the number of terminals in the plurality of electrode terminals is achieved, a decrease in length of a circuit wiring is achieved, and thus a thin-film capacitor with low-ESL has been achieved.
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公开(公告)号：US10950389B2
公开(公告)日：2021-03-16
申请号：US16360405
申请日：2019-03-21
Applicant: TDK CORPORATION
Inventor： Daiki Ishii , Kazuhiro Yoshikawa , Koichi Tsunoda , Mitsuhiro Tomikawa , Junki Nakamoto , Kenichi Yoshida
Abstract: A thin-film capacitor satisfies a relationship of CTE1>CTE2>CTE3 regarding a linear expansion coefficient CTE1 of a base, a linear expansion coefficient CTE2 of a capacitance unit, and a linear expansion coefficient CTE3 of a barrier layer. The inventors have newly found that in a case in which such a relationship is satisfied, when a temperature falls from a deposition temperature, cracking occurring in the capacitance unit of the thin-film capacitor is prevented, and cracking occurring in the barrier layer is also prevented.
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公开(公告)号：US10886219B2
公开(公告)日：2021-01-05
申请号：US16478409
申请日：2018-01-10
Applicant: TDK CORPORATION
Inventor： Kazuhiro Yoshikawa , Mitsuhiro Tomikawa , Kenichi Yoshida
IPC: H01L23/528 , H01L23/28 , H01L23/64 , H01L49/02
Abstract: An electronic component mounting package includes a semiconductor element which is disposed such that an active surface faces a main surface of a wiring portion, and which is electrically connected to the wiring portion via a first terminal; and a thin film passive element which is disposed between the active surface of the semiconductor element and the main surface of the wiring portion when seen in a lamination direction, and which is electrically connected to the semiconductor element. A part of the first terminal is disposed on an outer side with respect to the thin film passive element in a plan view. A length of the first terminal in the lamination direction disposed on the outer side with respect to the thin film passive element is larger than a thickness of the thin film passive element in the lamination direction.
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公开(公告)号：US10153092B2
公开(公告)日：2018-12-11
申请号：US15725860
申请日：2017-10-05
Applicant: TDK CORPORATION
Inventor： Michihiro Kumagae , Akifumi Kamijima , Norihiko Matsuzaka , Junki Nakamoto , Kazuhiro Yoshikawa , Kenichi Yoshida
Abstract: A thin-film capacitor including a stacked body having a lower electrode layer, a plurality of dielectric layers stacked on the lower electrode layer, one or more internal electrode layers interposed between the dielectric layers, and an upper electrode layer that is stacked on the opposite side of the lower electrode layer with the dielectric layers and the internal electrode layers interposed between, and a cover layer that covers the stacked body. The stacked body includes opening portions that have the lower electrode layer, opens upward in a stacking direction, and has a side surface formed to include an inclined surface. The cover layer is stacked on the inclined surface of the stacked body. A curved surface with a predetermined shape is formed on the inclined surface for each pair of layers including the dielectric layer forming the inclined surface and the electrode layer, forming the inclined surface.
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公开(公告)号：US09224706B2
公开(公告)日：2015-12-29
申请号：US13960330
申请日：2013-08-06
Applicant: TDK CORPORATION
Inventor： Kenichi Yoshida , Makoto Orikasa , Hideyuki Seike , Yuhei Horikawa , Hisayuki Abe
Abstract: A preferred terminal structure comprises a base material; an electrode formed on the base material; an insulating covering layer formed on the base material and on the electrode and having an opening exposing at least part of the electrode; an under bump metal layer containing Ni, formed in a region in the opening on the electrode so that an upper surface of the metal layer is at a position lower than an upper surface of the insulating covering layer in a peripheral edge portion of the opening; and a dome-shaped bump containing Sn and Ti, formed in a region in the opening on the under bump metal layer, wherein an end portion of a boundary between the under bump metal layer and the bump is in contact with an inner wall of the opening portion in the insulating covering layer.
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