Switchover schemes for transition of oscillator from internal-resistor to external-resistor mode

    公开(公告)号:US11984849B2

    公开(公告)日:2024-05-14

    申请号:US17903128

    申请日:2022-09-06

    CPC classification number: H03B5/06 H03B5/1212 H03B5/36 H03L5/00

    Abstract: In an example, a system includes an oscillator circuit on a chip. The oscillator circuit includes a charging current generator including a current mirror and an amplifier, where the amplifier is coupled to a pin of the chip. The oscillator circuit also includes a first switch coupled to the pin, a second switch coupled to the pin and to a charging resistor, and a third switch coupled to the amplifier and an internal resistor, where the internal resistor is internal to the chip. The oscillator circuit includes a bias current source coupled to the current mirror. The system includes an external resistor coupled to the pin, where the external resistor is external to the chip. The system also includes an external capacitor coupled to the pin and coupled in parallel to the external resistor, where the external capacitor is external to the chip.

    Low power operational amplifier trim offset circuitry

    公开(公告)号:US11916516B2

    公开(公告)日:2024-02-27

    申请号:US18155261

    申请日:2023-01-17

    Abstract: Enhanced operational amplifier trim circuitry and techniques are presented herein. In one implementation, a circuit includes a reference circuit configured to produce a set of reference voltages, and a digital-to-analog conversion (DAC) circuit. The DAC circuit comprises a plurality of transistor pairs, where each pair among the plurality of transistor pairs is configured to provide portions of adjustment currents for an operational amplifier based at least on the set of reference voltages and sizing among transistors of each pair. The circuit also includes drain switching elements coupled to drain terminals of the transistors of each pair and configured to selectively couple one or more of the portions of the adjustment currents to the operational amplifier in accordance with digital trim codes.

    Enabling an external resistor for an oscillator

    公开(公告)号:US11848645B2

    公开(公告)日:2023-12-19

    申请号:US17509706

    申请日:2021-10-25

    Abstract: In an example, a system includes an oscillator circuit on a chip. The oscillator circuit includes a charging current generator including a current mirror, an amplifier, and an on-chip resistor, where the on-chip resistor is coupled to a pin on the chip. The oscillator circuit also includes oscillator circuitry coupled to the charging current generator, where the oscillator circuitry includes a comparator, a phase generator, a first capacitor coupled to a first resistor, and a second capacitor coupled to a second resistor. The system also includes an external resistor coupled to the pin, where the external resistor is external to the chip. The system includes an external capacitor coupled to the pin, where the external capacitor is external to the chip.

    Pin-leakage compensation scheme for external resistor-based oscillators

    公开(公告)号:US11796606B2

    公开(公告)日:2023-10-24

    申请号:US17509836

    申请日:2021-10-25

    CPC classification number: G01R31/52 H03B5/1203 H03K3/0231 H03K4/502

    Abstract: In an example, a system includes an oscillator circuit on a chip. The oscillator circuit includes a charging current generator including a current mirror and an amplifier, where the amplifier is coupled to a pin on the chip, and where the pin is adapted to be coupled to an external resistor, where the external resistor is external to the chip. The oscillator circuit also includes oscillator circuitry coupled to the charging current generator, where the oscillator circuitry includes a comparator, a phase generator, a first capacitor coupled to a first switch, and a second capacitor coupled to a second switch. The oscillator circuit includes leakage circuitry coupled to the current mirror, where the leakage circuitry is configured to draw a current from the current mirror proportional to a leakage current flowing through the external resistor from circuitry internal to the chip.

    Class AB buffer with multiple output stages

    公开(公告)号:US11742810B2

    公开(公告)日:2023-08-29

    申请号:US17379046

    申请日:2021-07-19

    CPC classification number: H03F3/3016 H03F1/223 H03F2200/129

    Abstract: A class AB buffer includes an output stage and an input stage. The output stage includes a first output transistor and a second output transistor. The second output transistor is coupled to the first output transistor. The input stage is coupled to the output stage. The input stage includes a first cascode transistor, a first switch, a second cascode transistor, and a second switch. The first switch is coupled to the first cascode transistor and the first output transistor. The second switch is coupled to the first switch, the second cascode transistor, and the first output transistor.

    COMPARATOR LOW POWER RESPONSE
    36.
    发明申请

    公开(公告)号:US20230006663A1

    公开(公告)日:2023-01-05

    申请号:US17931557

    申请日:2022-09-13

    Abstract: In described examples, an amplifier can be arranged to generate a first stage output signal in response to an input signal. The input signal can be coupled to control a first current coupled from a first current source through a common node to generate the first stage output signal. A replica circuit can be arranged to generate a replica load signal in response to the input signal and in response to current received from the common node. A current switch can be arranged to selectively couple a second current from a second current source to the common node in response to the replica load signal.

    Comparator low power response
    37.
    发明授权

    公开(公告)号:US10972086B2

    公开(公告)日:2021-04-06

    申请号:US16378526

    申请日:2019-04-08

    Abstract: In described examples, an amplifier can be arranged to generate a first stage output signal in response to an input signal. The input signal can be coupled to control a first current coupled from a first current source through a common node to generate the first stage output signal. A replica circuit can be arranged to generate a replica load signal in response to the input signal and in response to current received from the common node. A current switch can be arranged to selectively couple a second current from a second current source to the common node in response to the replica load signal.

    Precision oscillators that use imprecise components

    公开(公告)号:US10763832B2

    公开(公告)日:2020-09-01

    申请号:US15853015

    申请日:2017-12-22

    Abstract: Trimming components within an oscillator comprising: a trim-capable current source, wherein the trim-capable current source comprises a trimmable resistor and a trimmable current component, a comparator comprising a first input terminal that couples to the trim-capable current source and the second input terminal that couples to a reference voltage source, a switch coupled to the first input terminal and the trim-capable current source, and a trim-capable capacitor coupled to the switch, wherein the switch is coupled between the trim-capable capacitor and the trim-capable current source.

    CIRCUIT FOR DRIVER CONTROL OF SWITCHING CIRCUIT
    39.
    发明申请
    CIRCUIT FOR DRIVER CONTROL OF SWITCHING CIRCUIT 有权
    开关电路驱动控制电路

    公开(公告)号:US20160087518A1

    公开(公告)日:2016-03-24

    申请号:US14492569

    申请日:2014-09-22

    Abstract: Several circuits and methods for driver control of a switching circuit are disclosed. In an embodiment, a circuit for driver control of a switching circuit includes a driver circuit and a control circuit. The driver circuit is capable of being coupled to the switching circuit. The switching circuit includes a first switch and a second switch. The driver circuit is configured to control a conductive state of the switching circuit by facilitating an alternate state change of the first switch and the second switch. The control circuit is coupled to the driver circuit and is configured to detect a noise signal during a state change of the first switch. The control circuit is further configured to control the driver circuit to thereby slow down the state change of the first switch.

    Abstract translation: 公开了用于开关电路的驱动器控制的几种电路和方法。 在一个实施例中,用于开关电路的驱动器控制的电路包括驱动器电路和控制电路。 驱动电路能够耦合到开关电路。 开关电路包括第一开关和第二开关。 驱动电路被配置为通过促进第一开关和第二开关的替代状态改变来控制开关电路的导通状态。 控制电路耦合到驱动电路,并被配置为在第一开关的状态改变期间检测噪声信号。 控制电路还被配置为控制驱动器电路,从而减慢第一开关的状态变化。

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