Dielectric Waveguide Integrated Into a Flexible Substrate
    31.
    发明申请
    Dielectric Waveguide Integrated Into a Flexible Substrate 有权
    介质波导集成到柔性基板中

    公开(公告)号:US20150295298A1

    公开(公告)日:2015-10-15

    申请号:US14555545

    申请日:2014-11-26

    CPC classification number: H01P3/16 H01P11/006

    Abstract: A digital system has a dielectric core waveguide that is formed within a multilayer substrate. The dielectric waveguide has a longitudinal dielectric core member formed in the core layer having two adjacent longitudinal sides each separated from the core layer by a corresponding slot portion formed in the core layer The dielectric core member has the first dielectric constant value. A cladding surrounds the dielectric core member formed by a top layer and the bottom layer infilling the slot portions of the core layer. The cladding has a dielectric constant value that is lower than the first dielectric constant value.

    Abstract translation: 数字系统具有形成在多层基板内的介质芯波导。 电介质波导具有形成在芯层中的纵向介质芯构件,其具有两个相邻的纵向侧,每个纵向侧通过形成在芯层中的对应的狭缝部分与芯层分离。介电芯构件具有第一介电常数值。 包层包围由顶层形成的介质芯构件,底层填充芯层的槽部分。 包层具有低于第一介电常数值的介电常数值。

    Material Detection and Analysis Using a Dielectric Waveguide
    32.
    发明申请
    Material Detection and Analysis Using a Dielectric Waveguide 有权
    使用介质波导的材料检测和分析

    公开(公告)号:US20150293039A1

    公开(公告)日:2015-10-15

    申请号:US14586842

    申请日:2014-12-30

    CPC classification number: G01N22/00

    Abstract: A dielectric waveguide (DWG) may be used to identify a composition of a material that is in contact with the DWG. A radio frequency (RF) signal is transmitted into a dielectric waveguide located in contact with the material. The RF signal is received after it passes through the DWG. An insertion loss of the DWG is determined. The presence of the material may be inferred when the insertion loss exceeds a threshold value. The composition of the material may be inferred based on a correlation with the insertion loss. Alternatively, a volume of the material may be inferred based on a correlation with the insertion loss.

    Abstract translation: 介质波导(DWG)可用于识别与DWG接触的材料的组成。 射频(RF)信号被传输到与材料接触的介质波导中。 RF信号在通过DWG之后被接收。 确定DWG的插入损耗。 当插入损耗超过阈值时,可以推断材料的存在。 可以基于与插入损耗的相关性推断材料的组成。 或者,可以基于与插入损耗的相关性来推断材料的体积。

    Multi-phase clock generation circuit

    公开(公告)号:US10659059B2

    公开(公告)日:2020-05-19

    申请号:US16454982

    申请日:2019-06-27

    Abstract: A multi-phase clock circuit includes a first delay circuit, a second delay circuit, a third delay circuit, a first clock mixer circuit, and a second clock mixer circuit. The first, second, and third delay circuits are coupled in series. The first clock mixer circuit includes a first input and a second input. The first input is coupled to an output of the first delay circuit. The second input is coupled to an output of the second delay circuit. The second clock mixer circuit also includes a first input and a second input. The first input of the second clock mixer circuit is coupled to an output of the second delay circuit. The second input of the second clock mixer circuit is coupled to an output of the third delay circuit.

    Material detection and analysis using a dielectric waveguide

    公开(公告)号:US10416095B2

    公开(公告)日:2019-09-17

    申请号:US16024028

    申请日:2018-06-29

    Abstract: A dielectric waveguide (DWG) may be used to identify a composition of a material that is in contact with the DWG. A radio frequency (RF) signal is transmitted into a dielectric waveguide located in contact with the material. The RF signal is received after it passes through the DWG. An insertion loss of the DWG is determined. The presence of the material may be inferred when the insertion loss exceeds a threshold value. The composition of the material may be inferred based on a correlation with the insertion loss. Alternatively, a volume of the material may be inferred based on a correlation with the insertion loss.

    EMBEDDED CLOCK IN A COMMUNICATION SYSTEM
    36.
    发明申请

    公开(公告)号:US20190086947A1

    公开(公告)日:2019-03-21

    申请号:US16195275

    申请日:2018-11-19

    CPC classification number: G06F1/04 H04B1/04 H04B1/16 H04L25/4904 H05K999/99

    Abstract: Transmitter circuitry transmits: a first voltage as the return-to-zero signal that is higher than a first positive threshold, the first voltage being decodable to a first order of data bits; a second voltage as a return-to-zero signal that is between a second positive threshold and the first positive threshold, the second voltage being decodable to a second order of the data bits, and the second positive threshold being lower than the first positive threshold; a third voltage as the return-to-zero signal that is between a first negative threshold and a second negative threshold, the third voltage being decodable to a third order of the data bits, and the second negative threshold being higher than the first negative threshold; and a fourth voltage as the return-to-zero signal that is lower than the first negative threshold, the fourth voltage being decodable to a fourth order of the data bits. Clock circuitry transitions a clock signal for the return-to-zero signal crossing the second positive threshold, and for the return-to-zero signal crossing the second negative threshold.

    MATERIAL DETECTION AND ANALYSIS USING A DIELECTRIC WAVEGUIDE

    公开(公告)号:US20180321165A1

    公开(公告)日:2018-11-08

    申请号:US16024028

    申请日:2018-06-29

    CPC classification number: G01N22/00

    Abstract: A dielectric waveguide (DWG) may be used to identify a composition of a material that is in contact with the DWG. A radio frequency (RF) signal is transmitted into a dielectric waveguide located in contact with the material. The RF signal is received after it passes through the DWG. An insertion loss of the DWG is determined. The presence of the material may be inferred when the insertion loss exceeds a threshold value. The composition of the material may be inferred based on a correlation with the insertion loss. Alternatively, a volume of the material may be inferred based on a correlation with the insertion loss.

    Digital Clock-Duty-Cycle Correction
    38.
    发明申请

    公开(公告)号:US20170257087A1

    公开(公告)日:2017-09-07

    申请号:US15598339

    申请日:2017-05-18

    CPC classification number: H03K5/1565 H02M3/07

    Abstract: A duty cycle correction circuit includes a charge pump and a controller. The charge pump includes a current source, a first output, and a second output. The charge pump routes current from the current source to the first output during a positive portion of a clock, and routes current from the current source to the second output during a negative portion of the clock. The controller compares charge accumulated from the first output to charge accumulated from the second output over a plurality of clock cycles to determine which of the positive portion of the clock and the negative portion of the clock is longer. The controller also generates a digital value that indicates an amount of adjustment to apply to a duty cycle of the clock based on which of the positive portion of the clock and the negative portion of the clock is longer.

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