公开(公告)号：US20140003540A1

公开(公告)日：2014-01-02

申请号：US14004866

申请日：2012-03-23

申请人： Satoshi Okada ,  Takashi Yokokawa

发明人： Satoshi Okada ,  Takashi Yokokawa

IPC分类号： H04N7/26

CPC分类号： H04N19/44 ,  H04H20/40 ,  H04H60/11 ,  H04L27/2601 ,  H04N21/4344 ,  H04N21/4345 ,  H04N21/4347 ,  H04N21/44004 ,  H04N21/6112

摘要： The present technology relates to a data readout device, a data readout method, and a program capable of preventing occurrence of a period in which no data is output. In circumstances where data is accumulated and the accumulated data is readout, the data cannot be readout and an underflow occurs if a situation occurs in which an error occurs in accumulating the data and the data cannot be accumulated. Readout is controlled using information included in data to prevent a continuous underflow despite the occurrence of an error has stopped after the underflow occurred. The accumulated data, information of which has been signaled, is started to read out at a timing specified by the information signaled in the data. The present technology is applicable to a reception device that receives a DVB-T2 signal in theM-PLP system.

摘要翻译： 本技术涉及数据读出装置，数据读出方法以及能够防止不输出数据的期间发生的程序。 在数据被累积并且累积数据被读出的情况下，如果在累积数据中出现错误并且数据不能被累积的情况发生，则不能读出数据并发生下溢。 使用包含在数据中的信息来控制读数，以防止连续下溢，尽管在发生下溢之后发生错误已经停止。 其信息已被通知的累积数据在由数据中发出的信息指定的定时开始读出。 本技术适用于在M-PLP系统中接收DVB-T2信号的接收装置。

公开(公告)号：US20130329775A1

公开(公告)日：2013-12-12

申请号：US14001749

申请日：2012-03-07

申请人： Takashi Yokokawa ,  Yuken Goto ,  Kenichi Kobayashi

发明人： Takashi Yokokawa ,  Yuken Goto ,  Kenichi Kobayashi

IPC分类号： H04L27/26

CPC分类号： H04L27/2662 ,  H04L5/0023 ,  H04L5/0048 ,  H04L25/0232 ,  H04L25/03159 ,  H04L27/2605 ,  H04L27/2656 ,  H04L27/2657 ,  H04L27/2666 ,  H04L27/2675

摘要： The present technique relates to a receiving device, a receiving method, and a program for realizing a prompt start of data demodulation. A receiving device of one aspect of the present technique includes: a detecting unit that detects a first preamble signal from a frame signal having a frame structure that contains the first preamble signal indicating a frame partition, a second preamble signal containing control information to be used in processing a data signal, and the data signal, the second preamble signal being transmitted after the first preamble signal; an accumulating unit that accumulates the second preamble signal when the first preamble signal is detected; and a processing unit that processes the data signal based on the control information contained in the second preamble signal accumulated in the accumulating unit, the data signal being contained in the same frame as the second preamble signal accumulated in the accumulating unit. The present technique can be applied to a receiving device that receives data transmitted by an OFDM method such as DVB-T2.

摘要翻译： 本技术涉及一种用于实现数据解调的迅速启动的接收装置，接收方法和程序。 本技术的一个方面的接收装置包括：检测单元，其从具有包含指示帧分区的第一前导信号的帧结构的帧信号检测第一前导信号，包含要使用的控制信息的第二前同步码信号 在处理数据信号和所述数据信号时，所述第二前置信号在所述第一前置信号之后发送; 当检测到第一前置信号时，累加单元累积第二前导码信号; 以及处理单元，其基于累积在所述累积单元中的所述第二前同步码信号中包含的控制信息来处理所述数据信号，所述数据信号包含在与所述累积单元中累积的所述第二前同步码信号相同的帧中。 本技术可以应用于接收由诸如DVB-T2之类的OFDM方法发送的数据的接收装置。

公开(公告)号：US20130246883A1

公开(公告)日：2013-09-19

申请号：US13885557

申请日：2011-11-14

申请人： Osamu Shinya ,  Takashi Yokokawa ,  Lachlan Bruce Michael

发明人： Osamu Shinya ,  Takashi Yokokawa ,  Lachlan Bruce Michael

IPC分类号： H04L1/00

CPC分类号： H04L1/004 ,  H03M13/1102 ,  H03M13/152 ,  H03M13/253 ,  H03M13/255 ,  H03M13/618 ,  H03M13/6362 ,  H03M13/6552 ,  H04L1/0043 ,  H04L1/0052 ,  H04L1/0057 ,  H04L1/0065 ,  H04L1/0068 ,  H04L1/0072

摘要： A data processing device and a data processing method that can readily process control data having its PAPR improved. In a transmission device, a padder pads control data necessary for demodulation with zeros as dummy data, and a scrambler scrambles the padded control data (post-padding control data). A replacement unit replaces scrambled dummy data in the scrambled post-padding control data with the dummy data, and a BCH encoder and an LDPC encoder perform BCH encoding and LDPC encoding as error correction encoding on the replacement data obtained through the replacement. A shortening unit performs shortening by deleting the dummy data contained in the LDPC code and puncturing the parity bits of the LDPC code. The device can be applied in cases where control data is subjected to error correction encoding and is then transmitted, for example.

摘要翻译： 能够容易地处理其PAPR的控制数据的数据处理装置和数据处理方法。 在传输装置中，焊盘将用于以零作为解调的解调所需的数据作为伪数据，并且扰频器对填充的控制数据进行加扰（后置填充控制数据）。 替换单元用伪数据替换加密的后置填充控制数据中的加密伪数据，并且BCH编码器和LDPC编码器对通过替换获得的替换数据执行BCH编码和LDPC编码作为纠错编码。 缩短单元通过删除包含在LDPC码中的伪数据并对该LDPC码的奇偶校验位进行穿孔来进行缩短。 例如，在控制数据经受纠错编码的情况下可以应用该装置。

公开(公告)号：US08451966B2

公开(公告)日：2013-05-28

申请号：US12567837

申请日：2009-09-28

申请人： Hidetoshi Kawauchi ,  Toshiyuki Miyauchi ,  Takashi Yokokawa ,  Takuya Okamoto ,  Hiroyuki Kamata

发明人： Hidetoshi Kawauchi ,  Toshiyuki Miyauchi ,  Takashi Yokokawa ,  Takuya Okamoto ,  Hiroyuki Kamata

IPC分类号： H03D1/06 ,  H03K5/01 ,  H03K5/159

CPC分类号： H04L25/0212 ,  H04L25/022 ,  H04L25/0232 ,  H04L27/2647 ,  H04L27/2665

摘要： Disclosed herein is an information processor, including: a receiving section configured to receive an OFDM signal transmitted in accordance with an OFDM system; a FFT arithmetically operating section configured to carry out FFT for a signal within a predetermined interval of the OFDM signal; a delay profile estimating section configured to estimate delay profiles from the OFDM signal received by the receiving section; an inter-symbol interference amount estimating section configured to estimate inter-symbol interference amounts for a plurality of candidates for the predetermined interval, respectively, by using the delay profiles estimated by the delay profile estimating section; and a searching section configured to search for the candidate having the minimum inter-symbol interference amount estimated by the inter-symbol interference amount estimating section from among the plurality of candidates in the predetermined interval, and supply data on the candidate thus searched for as the predetermined interval to the FFT arithmetically operating section.

摘要翻译： 本文公开了一种信息处理器，包括：接收部分，被配置为接收根据OFDM系统传输的OFDM信号; FFT算术运算部，被配置为对所述OFDM信号的预定间隔内的信号进行FFT; 延迟分布估计部，被配置为从所述接收部接收到的OFDM信号估计延迟分布; 符号间干扰量估计部，被配置为通过使用由所述延迟分布估计部估计出的延迟分布，分别估计所述预定间隔的多个候选的符号间干扰量; 以及搜索部，被配置为从所述预定间隔中的所述多个候选中搜索具有由所述符号间干扰量估计部估计的最小符号间干扰量的候选，并且将所搜索的候选者的数据提供为 到FFT运算部分的预定间隔。

公开(公告)号：US08351541B2

公开(公告)日：2013-01-08

申请号：US13359928

申请日：2012-01-27

申请人： Mathew Paul Athol Taylor ,  Samuel Asanbeng Atungsiri ,  Takashi Yokokawa ,  Makiko Yamamoto

发明人： Mathew Paul Athol Taylor ,  Samuel Asanbeng Atungsiri ,  Takashi Yokokawa ,  Makiko Yamamoto

IPC分类号： H04L27/00

CPC分类号： H03M13/1168 ,  H03M13/1137 ,  H03M13/1148 ,  H03M13/116 ,  H03M13/1165 ,  H03M13/1185 ,  H03M13/15 ,  H03M13/152 ,  H03M13/255 ,  H03M13/2707 ,  H03M13/271 ,  H03M13/2906 ,  H04L1/0057 ,  H04L1/0071 ,  H04L5/0007 ,  H04L5/0044 ,  H04L5/0064 ,  H04L27/2626 ,  H04L27/2647 ,  H04L27/34

摘要： A data processing apparatus communicates data bits on a predetermined number of sub-carrier signals of an Orthogonal Frequency Division Multiplexed (OFDM) symbol. The data processing apparatus comprises a parity interleaver operable to perform parity interleaving on Low Density Parity Check (LDPC) encoded data bits obtained by performing LDPC encoding according to a parity check matrix of an LDPC code including a parity matrix corresponding to parity bits of the LDPC code, the parity matrix having a stepwise structure, so that a parity bit of the LDPC encoded data bits is interleaved to a different parity bit position. A mapping unit maps the parity interleaved bits onto data symbols corresponding to modulation symbols of a modulation scheme of the OFDM sub-carrier signals.

摘要翻译： 数据处理装置在正交频分复用（OFDM）符号的预定数量的副载波信号上传送数据位。 数据处理装置包括奇偶校验交织器，其可操作以对通过执行LDPC编码而获得的低密度奇偶校验（LDPC）编码数据比特进行奇偶校验交织，所述LDPC编码数据比特根据LDPC码的奇偶校验矩阵，该LDPC码包括与LDPC码奇偶校验位对应的奇偶校验矩阵 代码，奇偶校验矩阵具有逐步结构，使得LDPC编码数据位的奇偶校验位被交织到不同的奇偶校验位位置。 映射单元将奇偶交织的比特映射到对应于OFDM子载波信号的调制方案的调制符号的数据符号上。

公开(公告)号：US08238459B2

公开(公告)日：2012-08-07

申请号：US12361199

申请日：2009-01-28

申请人： Takashi Yokokawa ,  Yasuhiro Iida ,  Toshiyuki Miyauchi ,  Takashi Hagiwara ,  Takanori Minamino ,  Naoya Haneda

发明人： Takashi Yokokawa ,  Yasuhiro Iida ,  Toshiyuki Miyauchi ,  Takashi Hagiwara ,  Takanori Minamino ,  Naoya Haneda

IPC分类号： H04L23/02

CPC分类号： H04L27/3827 ,  H04L1/0054 ,  H04L1/208 ,  H04L7/042

摘要： A decoding device that decodes demodulated data obtained by demodulating a quadrature modulated signal arising from digital modulation of a carrier and detects synchronization, the decoding device includes, a decoder configured to decode first demodulated data that is the demodulated data obtained by demodulating the quadrature modulated signal and is composed of in-phase axis data and quadrature axis data. The decoding device decodes second demodulated data obtained by interchanging the in-phase axis data and the quadrature axis data of the first demodulated data. A synchronization detector is configured to detect a boundary between predetermined information symbol sequences from first decoded data obtained by decoding the first demodulated data and detect the boundary from second decoded data obtained by decoding the second demodulated data. The synchronization detector selects and outputs one of the first decoded data and the second decoded data based on a result of the detection of the boundary.

摘要翻译： 一种解码装置，对通过解调由载波的数字调制产生的正交调制信号而获得的解调数据进行解码，并检测同步，解码装置包括：解码器，被配置为对作为通过解调正交调制信号而获得的解调数据的第一解调数据进行解码 并且由同相轴数据和正交轴数据组成。 解码装置对通过交换同相轴数据和第一解调数据的正交轴数据而获得的第二解调数据进行解码。 同步检测器被配置为从通过解码第一解调数据获得的第一解码数据检测预定信息符号序列之间的边界，并通过解码第二解调数据获得的第二解码数据检测边界。 同步检测器基于边界检测的结果选择并输出第一解码数据和第二解码数据中的一个。

公开(公告)号：US08209581B2

公开(公告)日：2012-06-26

申请号：US12253347

申请日：2008-10-17

申请人： Takashi Yokokawa ,  Satoshi Okada ,  Osamu Shinya

发明人： Takashi Yokokawa ,  Satoshi Okada ,  Osamu Shinya

IPC分类号： G06F11/00

CPC分类号： H03M13/11 ,  H04L1/0052 ,  H04L1/0057 ,  H04L1/007

摘要： A receiving apparatus including, an LDPC decoder configured to decode both of the data signal and the transmission control signal, a data signal input buffer arranged before the LDPC decoder and configured to hold the received data signal and a transmission control signal input buffer arranged before the LDPC decoder and configured to hold the received transmission control signal, and a controller configured to select one of the data signal held in the data signal input buffer and the transmission control signal held in the transmission control signal input buffer as a signal subject to decoding and transmit the selected signal to the LDPC decoder to make the LDPC decoder decode the signal subject to decoding.

摘要翻译： 一种接收装置，包括：LDPC解码器，被配置为解码所述数据信号和所述传输控制信号;数据信号输入缓冲器，布置在所述LDPC解码器之前并被配置为保持所述接收的数据信号;以及传输控制信号输入缓冲器， LDPC解码器，被配置为保持所接收的发送控制信号，以及控制器，被配置为选择保持在数据信号输入缓冲器中的数据信号中的一个和保持在发送控制信号输入缓冲器中的发送控制信号作为经解码的信号;以及 将所选择的信号发送到LDPC解码器，以使LDPC解码器对经过解码的信号进行解码。

公开(公告)号：US20110317790A1

公开(公告)日：2011-12-29

申请号：US13165230

申请日：2011-06-21

申请人： Takashi Yokokawa ,  Hitoshi Sakai ,  Taylor Matthew

发明人： Takashi Yokokawa ,  Hitoshi Sakai ,  Taylor Matthew

IPC分类号： H04L27/06 ,  H04B1/10

CPC分类号： H04L25/0232 ,  H04L5/0007 ,  H04L5/0048 ,  H04L25/0226 ,  H04L27/2647

摘要： A receiving apparatus includes: a transmission path characteristics estimating section obtaining pre-interpolation transmission path characteristic data as estimate values for transmission path characteristics as characteristics of a transmission path of an OFDM signal for transmission symbols of pilot signals by using the pilot signals contained in the OFDM signal, and filtering the pre-interpolation transmission path characteristic data by using an interpolation filter, thereby obtaining transmission path characteristic data as estimate values for transmission path characteristics for transmission symbols of the OFDM signal; a distortion correcting section performing distortion correction for the OFDM signal by using the transmission path characteristic data; and a filter controlling section controlling a pass band of the interpolation filter.

摘要翻译： 接收装置包括：传输路径特性估计部分，通过使用包含在导频信号中的导频信号，获得插值前传输路径特性数据作为传输路径特性的估计值，作为用于导频信号的传输符号的OFDM信号的传输路径的特性 OFDM信号，并且通过使用内插滤波器对插值前传输路径特征数据进行滤波，从而获得作为OFDM信号的发送符号的传输路径特性的估计值的传输路径特性数据; 失真校正部通过使用所述传输路径特性数据对所述OFDM信号进行失真校正; 以及控制内插滤波器的通带的滤波器控制部。

公开(公告)号：US08010870B2

公开(公告)日：2011-08-30

申请号：US11912485

申请日：2005-04-25

申请人： Takashi Yokokawa ,  Makiko Yamamoto ,  Misa Nakane

发明人： Takashi Yokokawa ,  Makiko Yamamoto ,  Misa Nakane

IPC分类号： H03M13/00

CPC分类号： H03M13/1168 ,  H03M13/1137 ,  H03M13/116 ,  H03M13/1185 ,  H03M13/6502 ,  H03M13/6516 ,  H03M13/6561

摘要： The present invention relates to a coding apparatus and a coding method by which the circuit scale can be reduced without changing the operation speed in coding of a linear code. An adder 13 integrates the product of an information word D13 of six bits supplied from a cyclic shift circuit 12 and the information part of a check matrix H corresponding to the information for each row in a unit of six rows and supplies the integrated value as a sum D15 to a RAM 14. The RAM 14 stores the sum D15. Further, the RAM 14 successively reads out sums D16 of 2 bits stored already therein and supplies the read out sums D16 as sums D17 to an accumulator 16 through an interleaver 15. The accumulator 16 integrates the sums D17 and outputs a sum D18 obtained as a result of the integration as a parity bit p of a codeword c through a selector 17. The present invention can be applied to an apparatus of a broadcasting station which transmits a satellite broadcast.

摘要翻译： 本发明涉及一种可以在不改变线性码的编码中的操作速度的情况下减小电路规模的编码装置和编码方法。 加法器13将从循环移位电路12提供的六位的信息字D13和对应于每行的信息的检查矩阵H的信息部分的乘积以六行的单位积分，并将积分值作为 总和D15到RAM14.RAM14存储总和D15。 此外，RAM14连续地读出其中已经存储的2位的和D16，并通过交织器15将累加器D16作为和D17提供给累加器16.累加器16对和D17进行积分，并输出作为 作为通过选择器17的码字c的奇偶校验位p的积分的结果。本发明可以应用于发送卫星广播的广播站的装置。

公开(公告)号：US20110164703A1

公开(公告)日：2011-07-07

申请号：US12981948

申请日：2010-12-30

申请人： Takashi Yokokawa ,  Satoshi Okada

发明人： Takashi Yokokawa ,  Satoshi Okada

IPC分类号： H04B1/06

CPC分类号： H04L27/2647 ,  H04H40/18 ,  H04H60/40 ,  H04N21/235 ,  H04N21/23608 ,  H04N21/2383 ,  H04N21/242 ,  H04N21/4302 ,  H04N21/4305 ,  H04N21/434 ,  H04N21/4344 ,  H04N21/4345 ,  H04N21/435 ,  H04N21/4382 ,  H04W56/00 ,  H04W56/001 ,  H04W56/003

摘要： Disclosed herein is a reception apparatus, including: a reception section configured to receive an OFDM (Orthogonal Frequency Division Multiplexed) signal obtained by modulating a common packet sequence configured from a packet common to streams and a data packet sequence configured from packets individually unique to the streams; a time counting section configured to count, using predetermined time indicated by additional information added to particular packets of the common and data packet sequences obtained by demodulating the received OFDM signal as a reference, elapsed time after the predetermined time; a detection section configured to compare the counted time and time indicated by the additional information added to the particular packets of the common and data packet sequences to detect a displacement in the time direction between the packets; and a correction section configured to correct the displacement between the packets of the common and data packet sequences in the time direction.

摘要翻译： 这里公开了一种接收装置，包括：接收部分，被配置为接收通过调制由流公用的分组配置的公共分组序列获得的OFDM（正交频分复用）信号，以及从由 溪流 时间计数部分，被配置为使用通过将通过解调所接收的OFDM信号作为参考获得的公共数据分组序列的特定分组附加的附加信息指定的预定时间进行计数，经过预定时间之后的经过时间; 检测部，被配置为比较由附加到所述公用数据包序列和所述数据包序列的特定分组的附加信息所指示的所计算的时间和时间，以检测所述分组之间的时间方向上的位移; 以及校正部，被配置为在时间方向上校正公用数据包序列和数据包序列的包之间的位移。