公开(公告)号：US20110053349A1

公开(公告)日：2011-03-03

申请号：US12842017

申请日：2010-07-22

申请人： DAVID GAO ,  Fumitake Mieno

发明人： DAVID GAO ,  Fumitake Mieno

IPC分类号： H01L21/322

CPC分类号： H01L21/268 ,  H01L21/02046 ,  H01L21/02057 ,  H01L21/02098 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823835 ,  H01L29/165 ,  H01L29/6659 ,  H01L29/66636 ,  H01L29/7833 ,  H01L29/7843 ,  H01L29/7848 ,  Y10S134/902

摘要： A method for fabricating semiconductor devices, e.g., strained silicon MOS device, includes providing a semiconductor substrate (e.g., silicon wafer) having a surface region, which has one or more contaminants and an overlying oxide layer. The one or more contaminants is at least a carbon species. The method also includes processing the surface region using at least a wet process to selectively remove the oxide layer and expose the surface region. The method further includes subjecting the surface region to a laser treatment process for a time period of less than 1 second to increase a temperature of the surface region to greater than 1000 degrees Celsius to remove the one or more contaminants provided on the surface region. The method also includes removing the laser treatment process to cause a reduction in temperature to about 300 to about 600 degrees Celsius in a time period of less than 1 second.

摘要翻译： 制造半导体器件（例如应变硅MOS器件）的方法包括提供具有表面区域的半导体衬底（例如，硅晶片），该表面区域具有一个或多个污染物和上​​覆氧化物层。 一种或多种污染物是至少一种碳类。 该方法还包括使用至少湿法处理表面区域以选择性地去除氧化物层并暴露表面区域。 该方法还包括使表面区域进行激光处理过程，持续时间小于1秒，以将表面区域的温度升高至大于1000摄氏度，以去除表面区域上提供的一种或多种污染物。 该方法还包括去除激光处理过程，以在小于1秒的时间段内将温度降低至约300至约600摄氏度。

公开(公告)号：US07887884B2

公开(公告)日：2011-02-15

申请号：US11243735

申请日：2005-10-04

申请人： Fumitake Mieno

发明人： Fumitake Mieno

IPC分类号： C23C16/00

CPC分类号： C23C16/403 ,  C23C16/45525 ,  C23C16/45551

摘要： A method for atomic layer deposition. The method includes providing a substrate having a surface region and exposing the surface region of the substrate to an atmospheric pressure. The method also maintains at least the substrate at about the atmospheric pressure and forms a film overlying the surface region using atomic layer deposition, while the substrate is maintained at about atmospheric pressure. Preferably, the film is grown at a rate of greater than about 1 nanometer per minute.

摘要翻译： 一种原子层沉积的方法。 该方法包括提供具有表面区域并将衬底的表面区域暴露于大气压的衬底。 该方法还在大气压附近至少保持基板，并且使用原子层沉积形成覆盖表面区域的膜，同时将基板保持在大气压附近。 优选地，膜以大于约1纳米每分钟的速率生长。

公开(公告)号：US20100001334A1

公开(公告)日：2010-01-07

申请号：US12259128

申请日：2008-10-27

申请人： Fumitake Mieno

发明人： Fumitake Mieno

IPC分类号： H01L29/786 ,  H01L21/36 ,  H01L21/8232

CPC分类号： H01L21/02381 ,  H01L21/02488 ,  H01L21/02499 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/28273 ,  H01L27/11521 ,  H01L29/66825 ,  H01L29/78672

摘要： A method of growing an epitaxial silicon layer is provided. The method comprising providing a substrate including an oxygen-terminated silicon surface and forming a first hydrogen-terminated silicon surface on the oxygen-terminated silicon surface. Additionally, the method includes forming a second hydrogen-terminated silicon surface on the first hydrogen-terminated silicon surface through atomic-layer deposition (ALD) epitaxy from SiH4 thermal cracking radical assisted by Ar flow and flash lamp annealing continuously. The second hydrogen-terminated silicon surface is capable of being added one or more layer of silicon through ALD epitaxy from SiH4 thermal cracking radical assisted by Ar flow and flash lamp annealing continuously. In one embodiment, the method is applied for making devices with thin-film transistor (TFT) floating gate memory cell structures which is capable for three-dimensional integration.

摘要翻译： 提供了生长外延硅层的方法。 该方法包括提供包含氧封端的硅表面的衬底，并在氧封端的硅表面上形成第一个氢封端的硅表面。 此外，该方法包括通过原子层沉积（ALD）外延从由Ar流和闪光灯退火辅助的SiH 4热裂解基团连续形成在第一氢封端硅表面上的第二氢封端硅表面。 第二个氢封端的硅表面能够连续地由Ar流和闪光灯退火辅助的SiH 4热裂解基团通过ALD外延添加一层或多层硅。 在一个实施例中，该方法被应用于制造具有能够进行三维集成的薄膜晶体管（TFT）浮动栅极存储单元结构的器件。

公开(公告)号：US20100001282A1

公开(公告)日：2010-01-07

申请号：US12259165

申请日：2008-10-27

申请人： Fumitake Mieno

发明人： Fumitake Mieno

IPC分类号： H01L29/788 ,  H01L21/84

CPC分类号： H01L29/788 ,  H01L29/66757 ,  H01L29/66825 ,  H01L29/7881

摘要： A device having thin-film transistor (TFT) floating gate memory cell structures is provided. The device includes a substrate, a dielectric layer on the substrate, and one or more source or drain regions being embedded in the dielectric layer. the dielectric layer being associated with a first surface. Each of the one or more source or drain regions includes an N+ polysilicon layer on a diffusion barrier layer which is on a first conductive layer. The N+ polysilicon layer has a second surface substantially co-planar with the first surface. Additionally, the device includes a P− polysilicon layer overlying the co-planar surface and a floating gate on the P− polysilicon layer. The floating gate is a low-pressure CVD-deposited silicon layer sandwiched by a bottom oxide tunnel layer and an upper oxide block layer. Moreover, the device includes at least one control gate made of a P+ polysilicon layer overlying the upper oxide block layer. A method of making the same memory cell structure is provided and can be repeated to integrate the structure three-dimensionally.

摘要翻译： 提供一种具有薄膜晶体管（TFT）浮动栅极存储单元结构的器件。 该器件包括衬底，衬底上的电介质层，以及嵌入电介质层中的一个或多个源极或漏极区域。 介电层与第一表面相关联。 所述一个或多个源区或漏区中的每一个包括在第一导电层上的扩散阻挡层上的N +多晶硅层。 N +多晶硅层具有与第一表面基本共面的第二表面。 另外，该器件包括覆盖共面表面的P-多晶硅层和P-多晶硅层上的浮置栅极。 浮栅是由底部氧化物隧道层和上部氧化物阻挡层夹在中间的低压CVD沉积硅层。 此外，该器件包括至少一个由覆盖在上氧化物块层上的P +多晶硅层制成的控制栅极。 提供了制造相同存储单元结构的方法，并且可以重复三维地集成结构。

公开(公告)号：US20080315295A1

公开(公告)日：2008-12-25

申请号：US12132459

申请日：2008-06-03

申请人： Hua Ji ,  Min-Hwa Chi ,  Fumitake Mieno

发明人： Hua Ji ,  Min-Hwa Chi ,  Fumitake Mieno

IPC分类号： H01L29/792 ,  H01L21/311

CPC分类号： C23C16/04 ,  C23C16/45527 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02178 ,  H01L21/02181 ,  H01L21/0228 ,  H01L21/28282 ,  H01L21/3141 ,  H01L21/31616 ,  H01L21/3185

摘要： Disclosed are atomic layer deposition method and a semiconductor device including the atomic layer, including the steps: placing a semiconductor substrate in an atomic layer deposition chamber; feeding a first precursor gas to the semiconductor substrate within the chamber to form a first discrete monolayer on the semiconductor substrate; feeding an inert purge gas to the semiconductor substrate within the chamber to remove the first precursor gas which has not formed the first discrete monolayer on the semiconductor substrate; feeding a second precursor gas to the chamber to react with the first precursor gas which has formed the first discrete monolayer, forming a discrete atomic size islands; and feeding an inert purge gas to the semiconductor substrate within the chamber to remove the second precursor gas which has not reacted with the first precursor gas and byproducts produced by the reaction between the first and the second precursor gases.

摘要翻译： 公开了原子层沉积方法和包括原子层的半导体器件，包括以下步骤：将半导体衬底放置在原子层沉积室中; 将第一前体气体供给到腔室内的半导体衬底，以在半导体衬底上形成第一离散单层; 向腔室内的半导体衬底供给惰性清洗气体以去除在半导体衬底上未形成第一离散单层的第一前体气体; 将第二前体气体供给到所述室中以与形成所述第一离散单层的所述第一前体气体反应，形成离散的原子尺寸岛; 以及将惰性吹扫气体供给到室内的半导体衬底以除去未与第一前体气体反应的第二前体气体和由第一和第二前体气体之间的反应产生的副产物。

公开(公告)号：US20080315292A1

公开(公告)日：2008-12-25

申请号：US12141040

申请日：2008-06-17

申请人： Hua Ji ,  Min-Hwa Chi ,  Fumitake Mieno ,  Seanfuxiong Zhang

发明人： Hua Ji ,  Min-Hwa Chi ,  Fumitake Mieno ,  Seanfuxiong Zhang

IPC分类号： H01L21/28 ,  H01L29/792

CPC分类号： C23C16/45529 ,  H01L21/28282 ,  H01L29/1608 ,  H01L29/42348 ,  H01L29/792

摘要： There is provided a method of manufacturing a semiconductor device, including the following steps: flowing a first precursor gas to the semiconductor substrate within a ALD chamber to form a first discrete monolayer on the semiconductor substrate; flowing an inert purge gas to the semiconductor substrate within the ALD chamber; flowing a second precursor gas to the ALD chamber to react with the first precursor gas which has formed the first monolayer, thereby forming a first discrete compound monolayer; and flowing an inert purge gas; forming a first dielectric layer to cover the discrete compound monolayer; forming a second third monolayer above first dielectric layer; and forming a second discrete compound monolayer; and forming a second dielectric layer to cover the second discrete compound monolayer above the first dielectric layer. There is also provided a semiconductor device formed by the ALD method.

摘要翻译： 提供一种制造半导体器件的方法，包括以下步骤：在ALD室内使第一前体气体流到半导体衬底，以在半导体衬底上形成第一离散单层; 将惰性吹扫气体流入ALD室内的半导体衬底; 使第二前体气体流到ALD室以与形成第一单层的第一前体气体反应，从而形成第一离散化合物单层; 并流动惰性吹扫气体; 形成第一电介质层以覆盖离散化合物单层; 在第一介电层上形成第二第三单层; 并形成第二离散化合物单层; 以及形成第二电介质层以覆盖所述第一电介质层上方的所述第二离散化合物单层。 还提供了通过ALD方法形成的半导体器件。

公开(公告)号：US5082695A

公开(公告)日：1992-01-21

申请号：US314794

申请日：1989-02-24

申请人： Masao Yamada ,  Masafumi Nakaishi ,  Kenji Nakagawa ,  Yuji Furumura ,  Takashi Eshita ,  Fumitake Mieno

发明人： Masao Yamada ,  Masafumi Nakaishi ,  Kenji Nakagawa ,  Yuji Furumura ,  Takashi Eshita ,  Fumitake Mieno

IPC分类号： G03F1/22

CPC分类号： G03F1/22

摘要： A method of fabricating an X-ray exposure mask including the steps of forming a .beta.-SiC membrane by chemcial vapor deposition and simultaneously doping the membrane with at least one of phosphorous, boron, nitrogen and oxygen.

公开(公告)号：US09263566B2

公开(公告)日：2016-02-16

申请号：US13351139

申请日：2012-01-16

申请人： Fumitake Mieno

发明人： Fumitake Mieno

IPC分类号： H01L21/28 ,  H01L23/498 ,  H01L29/43 ,  H01L29/778 ,  H01L29/66 ,  H01L29/10 ,  H01L29/49 ,  H01L29/165

CPC分类号： H01L29/4983 ,  H01L21/28255 ,  H01L29/1054 ,  H01L29/165 ,  H01L29/66545 ,  H01L29/66651 ,  H01L29/7781

摘要： The present invention relates to a semiconductor device and its manufacturing method. The semiconductor device comprises: a gate structure located on a substrate, Ge-containing semiconductor layers located on the opposite sides of the gate structure, a doped semiconductor layer epitaxially grown between the Ge-containing semiconductor layers, the bottom surfaces of the Ge-containing semiconductor layers located on the same horizontal plane as that of the epitaxial semiconductor layer. The epitaxial semiconductor layer is used as a channel region, and the Ge-containing semiconductor layers are used as source/drain extension regions.

摘要翻译： 本发明涉及一种半导体器件及其制造方法。 半导体器件包括：位于衬底上的栅极结构，位于栅极结构的相对侧上的含锗半导体层，外延生长在含锗半导体层之间的掺杂半导体层，含Ge的半导体层的底表面 位于与外延半导体层相同的水平面上的半导体层。 使用外延半导体层作为沟道区，将含Ge半导体层用作源/漏延伸区。

公开(公告)号：US08420511B2

公开(公告)日：2013-04-16

申请号：US13196671

申请日：2011-08-02

申请人： Fumitake Mieno

发明人： Fumitake Mieno

IPC分类号： H01L21/8238 ,  H01L21/322 ,  H01L29/78

CPC分类号： H01L29/045 ,  H01L21/26506 ,  H01L21/26586 ,  H01L21/823807 ,  H01L29/1054 ,  H01L29/517 ,  H01L29/6653 ,  H01L29/66545 ,  H01L29/6659 ,  H01L29/7833

摘要： The invention provides a method for forming a transistor, which includes: providing a substrate, a semiconductor layer being formed on the substrate; forming a dummy gate structure on the semiconductor layer; forming a source region and a drain region in the substrate and the semiconductor layer and at opposite sides of the dummy gate structure; forming an interlayer dielectric layer on the semiconductor layer; removing the dummy gate structure for forming an opening in the interlayer dielectric layer; non-crystallizing the semiconductor layer exposed in the opening for forming a channel layer; annealing the channel layer so that the channel layer and the substrate have same crystal orientation; and forming a metal gate structure in the opening, the metal gate being formed on the channel layer. Saturation current of the transistor is raised, and the performance of a semiconductor device is promoted.

摘要翻译： 本发明提供了一种形成晶体管的方法，其包括：提供衬底，在衬底上形成半导体层; 在半导体层上形成虚拟栅极结构; 在衬底和半导体层以及虚拟栅极结构的相对侧形成源区和漏区; 在所述半导体层上形成层间绝缘层; 去除用于在层间电介质层中形成开口的伪栅极结构; 在形成沟道层的开口中暴露的半导体层不结晶; 使沟道层退火，使得沟道层和衬底具有相同的晶体取向; 以及在所述开口中形成金属栅极结构，所述金属栅极形成在所述沟道层上。 提高晶体管的饱和电流，提高半导体器件的性能。

公开(公告)号：US08309472B2

公开(公告)日：2012-11-13

申请号：US12869620

申请日：2010-08-26

申请人： David Gao ,  Fumitake Mieno

发明人： David Gao ,  Fumitake Mieno

IPC分类号： H01L21/311 ,  H01L21/316

CPC分类号： H01L21/02057 ,  H01L21/823807 ,  H01L21/823814 ,  H01L29/7848

摘要： A method for fabricating semiconductor devices includes providing a semiconductor substrate having a surface region containing one or more contaminants and having an overlying oxide layer. In an embodiment, the one or more contaminants are at least a carbon species. The method includes processing the surface region using at least a wet processing process to selectively remove the overlying oxide layer and expose the surface region including the one or more contaminants. The method includes subjecting the surface region to a high energy electromagnetic radiation having wavelengths ranging from about 300 to about 800 nanometers for a time period of less than 1 second to increase a temperature of the surface region to greater than 1000 degrees Celsius to remove the one or more contaminants. The method includes removing the high energy electromagnetic radiation to cause a reduction in temperature to about 300 to about 600 degrees Celsius in a time period of less than 1 second.

摘要翻译： 一种制造半导体器件的方法包括提供具有包含一种或多种污染物并具有上覆氧化物层的表面区域的半导体衬底。 在一个实施方案中，一种或多种污染物是至少一种碳物质。 该方法包括使用至少湿法处理工艺来处理表面区域，以选择性地去除上覆的氧化物层并暴露包括一种或多种污染物的表面区域。 该方法包括使表面区域经受约300至约800纳米的波长范围为小于1秒的高能电磁辐射，以将表面区域的温度升高到大于1000摄氏度，以除去一个 或更多的污染物。 该方法包括去除高能量电磁辐射，以在小于1秒的时间段内将温度降低到约300至约600摄氏度。