公开(公告)号：US07113047B2

公开(公告)日：2006-09-26

申请号：US10968005

申请日：2004-10-20

申请人： Hiroyuki Matsunami

发明人： Hiroyuki Matsunami

IPC分类号： H03L7/08

CPC分类号： H03L7/18

摘要： To present a clock generator capable of spreading the spectrum of oscillation frequency by simple control in a small additional circuit, and its control method. A phase locked loop circuit is provided from a frequency phase comparator 11, an output clock signal PO is outputted from a voltage control oscillator (VCO) 14 by way of a charge pump circuit (CP) 12 and a loop filter (LF) 13, and is returned to the frequency phase comparator 11 by way of a frequency divider (DIV) 15. Detecting the phase difference of reference clock signal R and divided clock signal D, and locking the oscillation frequency of the output clock signal PO to specified frequency, a modulation signal M is outputted from a modulation pulse generator 1 regardless of phase locked control of phase locked loop circuit, and is superposed on phase comparison signal P, and thereby the oscillation frequency of output clock signal PO is modulated. An output clock signal PO having a predetermined spectrum spread characteristic can be obtained.

摘要翻译： 提出能够通过在小额外电路中简单控制来扩展振荡频率频谱的时钟发生器及其控制方法。 从频率相位比较器11提供锁相环电路，通过电荷泵电路（CP）12和环路滤波器（LF）13从压控振荡器（VCO）14输出输出时钟信号PO， 并通过分频器（DIV）15返回到频率相位比较器11。 检测参考时钟信号R和分频时钟信号D的相位差，并将输出时钟信号PO的振荡频率锁定到指定频率，调制信号M从调制脉冲发生器1输出，不管锁相控制 并且叠加在相位比较信号P上，从而调制输出时钟信号PO的振荡频率。 可以获得具有预定频谱扩展特性的输出时钟信号PO。

公开(公告)号：US07071675B2

公开(公告)日：2006-07-04

申请号：US10792810

申请日：2004-03-05

申请人： Yasukazu Ono ,  Koji Okada ,  Hiroyuki Matsunami

发明人： Yasukazu Ono ,  Koji Okada ,  Hiroyuki Matsunami

IPC分类号： G01R23/00 ,  G01R13/00

CPC分类号： G01R31/2824 ,  G01R19/0007

摘要： An object of this invention is to provide a band distribution inspecting device and band distribution inspecting method capable of carrying out inspection on whether or not a scattered oscillation signal oscillated containing a frequency variation from the fundamental frequency with the fundamental frequency as a reference point has a band distribution rapidly, with a simple way and at a cheap price. A scattered oscillation signal SSS inputted to a band distribution detecting section 22 is outputted as a predetermined band pass signal SBP through a band pass filter 17 having a predetermined pass band of a predetermined narrow-band width Δf within a band distribution. This signal is converted to a root-mean-square value by a smoother 19, smoothed by a capacitor C1 and transferred to a general purpose inspecting device 21 as a DC signal SAV. The DC signal SAV is compared with a predetermined voltage value VX by a comparator 25 and its comparison result is judged by a judging section 25 and then, an inspection result is outputted as a judging signal J. As a result, an edge frequency in the band distribution of the scattered oscillation signal SSS and disturbance of frequency variation within/out of the band and dullness in waveform and the like can be inspected for.

摘要翻译： 本发明的目的是提供一种能够对以基频为基准的包含来自基频的频率变化的振荡信号是否具有振荡的频带分布检查装置和频带分布检查方法进行检查 乐队分布迅速，以简单的方式和便宜的价格。 输入到频带分布检测部分22的散射振荡信号SSS作为预定的带通信号SBP通过具有预定窄带宽度Deltaf的预定通带的带通滤波器17输出。 该信号通过平滑器19转换成均方根值，由电容器C 1平滑，并作为直流信号SAV传送到通用检测装置21。 通过比较器25将DC信号SAV与预定的电压值VX进行比较，并且判断部25判断其比较结果，然后作为判断信号J输出检查结果。结果，边缘频率 可以检查散射振荡信号SSS的频带分布和波段内/频带内的频率变化的干扰以及波形等中的钝度。

公开(公告)号：US20120212194A1

公开(公告)日：2012-08-23

申请号：US13316522

申请日：2011-12-11

申请人： Suguru TACHIBANA ,  Hiroyuki Matsunami ,  Yukinobu Tanida

发明人： Suguru TACHIBANA ,  Hiroyuki Matsunami ,  Yukinobu Tanida

IPC分类号： G05F1/10

CPC分类号： G05F3/30

摘要： A reference voltage circuit includes a first amplifier, a first load device and a first PN junction device, second and third load devices and a second PN junction device, an offset voltage reduction circuit, a coupling node potential takeout circuit, and an area adjustment circuit. The offset voltage reduction circuit is configured to reduce an offset voltage between the first and second input terminals at the first amplifier, and the coupling node potential takeout circuit is configured to take out potentials of the first and second coupling nodes. The area adjustment circuit is configured to adjust an area of the second PN junction device in accordance with the potentials of the first and second coupling nodes which are taken out by the coupling node potential takeout circuit.

摘要翻译： 参考电压电路包括第一放大器，第一负载装置和第一PN结装置，第二和第三负载装置和第二PN结装置，偏移电压降低电路，耦合节点势能取出电路和区域调整电路 。 偏移电压降低电路被配置为减少第一放大器处的第一和第二输入端之间的偏移电压，并且耦合节点电势取出电路被配置为取出第一和第二耦合节点的电位。 区域调整电路被配置为根据由耦合节点电势取出电路取出的第一和第二耦合节点的电位来调整第二PN结装置的面积。

公开(公告)号：US20060033554A1

公开(公告)日：2006-02-16

申请号：US11234379

申请日：2005-09-26

申请人： Hiroyuki Matsunami ,  Kouji Okada ,  Takaaki Ido

发明人： Hiroyuki Matsunami ,  Kouji Okada ,  Takaaki Ido

IPC分类号： G05F1/10

CPC分类号： H03L7/0898 ,  H03L7/0895 ,  H03L7/18

摘要： A charge pump circuit is disclosed in which a spike-shaped noise (glitch) generated in an output is reduced. The charge pump circuit comprises: a first transistor, one of the terminals of which is connected to a high electric potential power source, turned on and off according to a charge-up signal; a second transistor, one of the terminals of which is connected to a low electric potential power source, turned on and off according to a charge-down signal; a first current restricting element connected between the other terminal of the first transistor and the output of a charge pump; and a second current restricting element connected between the other terminal of the second transistor and the output of the charge pump.

摘要翻译： 公开了一种电荷泵电路，其中在输出中产生的尖状噪声（毛刺）减小。 电荷泵电路包括：第一晶体管，其一端连接到高电位电源，根据充电信号导通和截止; 第二晶体管，其一端连接到低电位电源，根据降压信号导通和截止; 连接在第一晶体管的另一个端子和电荷泵的输出端之间的第一电流限制元件; 以及连接在第二晶体管的另一端和电荷泵的输出之间的第二电流限制元件。

公开(公告)号：US20050275471A1

公开(公告)日：2005-12-15

申请号：US10968005

申请日：2004-10-20

申请人： Hiroyuki Matsunami

发明人： Hiroyuki Matsunami

IPC分类号： G06F1/04 ,  H03L7/00 ,  H03L7/18 ,  H04L7/033

CPC分类号： H03L7/18

摘要： To present a clock generator capable of spreading the spectrum of oscillation frequency by simple control in a small additional circuit, and its control method. A phase locked loop circuit is provided from a frequency phase comparator 11, an output clock signal PO is outputted from a voltage control oscillator (VCO) 14 by way of a charge pump circuit (CP) 12 and a loop filter (LF) 13, and is returned to the frequency phase comparator 11 by way of a frequency divider (DIV) 15. Detecting the phase difference of reference clock signal R and divided clock signal D, and locking the oscillation frequency of the output clock signal PO to specified frequency, a modulation signal M is outputted from a modulation pulse generator 1 regardless of phase locked control of phase locked loop circuit, and is superposed on phase comparison signal P, and thereby the oscillation frequency of output clock signal PO is modulated. An output clock signal PO having a predetermined spectrum spread characteristic can be obtained.

摘要翻译： 提出能够通过在小额外电路中简单控制来扩展振荡频率频谱的时钟发生器及其控制方法。 从频率相位比较器11提供锁相环电路，通过电荷泵电路（CP）12和环路滤波器（LF）13从压控振荡器（VCO）14输出输出时钟信号PO， 并通过分频器（DIV）15返回到频率相位比较器11。 检测参考时钟信号R和分频时钟信号D的相位差，并将输出时钟信号PO的振荡频率锁定到指定频率，调制信号M从调制脉冲发生器1输出，不管锁相控制 并且叠加在相位比较信号P上，从而调制输出时钟信号PO的振荡频率。 可以获得具有预定频谱扩展特性的输出时钟信号PO。

公开(公告)号：US08513938B2

公开(公告)日：2013-08-20

申请号：US13316522

申请日：2011-12-11

申请人： Suguru Tachibana ,  Hiroyuki Matsunami ,  Yukinobu Tanida

发明人： Suguru Tachibana ,  Hiroyuki Matsunami ,  Yukinobu Tanida

IPC分类号： G05F3/16 ,  G05F3/20

CPC分类号： G05F3/30

摘要： A reference voltage circuit includes a first amplifier, a first load device and a first PN junction device, second and third load devices and a second PN junction device, an offset voltage reduction circuit, a coupling node potential takeout circuit, and an area adjustment circuit. The offset voltage reduction circuit is configured to reduce an offset voltage between the first and second input terminals at the first amplifier, and the coupling node potential takeout circuit is configured to take out potentials of the first and second coupling nodes. The area adjustment circuit is configured to adjust an area of the second PN junction device in accordance with the potentials of the first and second coupling nodes which are taken out by the coupling node potential takeout circuit.

摘要翻译： 参考电压电路包括第一放大器，第一负载装置和第一PN结装置，第二和第三负载装置和第二PN结装置，偏移电压降低电路，耦合节点势能取出电路和区域调整电路 。 偏移电压降低电路被配置为减少第一放大器处的第一和第二输入端之间的偏移电压，并且耦合节点电势取出电路被配置为取出第一和第二耦合节点的电位。 区域调整电路被配置为根据由耦合节点电势取出电路取出的第一和第二耦合节点的电位来调整第二PN结装置的面积。

公开(公告)号：US07834673B2

公开(公告)日：2010-11-16

申请号：US12342780

申请日：2008-12-23

申请人： Hiroyuki Matsunami

发明人： Hiroyuki Matsunami

IPC分类号： H03H11/26

CPC分类号： H03K7/08 ,  H03K5/133 ,  H03K2005/00032 ,  H03K2005/00058

摘要： A variable delay circuit comprising a first delay element configured to delay an input signal, a second delay element coupled to the first delay element in parallel and also configured to delay the input signal, a control current supply section configured to supply control currents for adjusting a delay amount of the first delay element and a delay amount of the second delay element, and an output signal selecting section configured to select any one of an output signal from the first delay element and an output signal from the second delay element according to a selecting signal for selecting delay time of the input signal.

摘要翻译： 一种可变延迟电路，包括被配置为延迟输入信号的第一延迟元件，并联耦合到第一延迟元件的第二延迟元件，并且还被配置为延迟输入信号;控制电流供应部分，被配置为提供控制电流， 第一延迟元件的延迟量和第二延迟元件的延迟量，以及输出信号选择部分，被配置为根据选择从第一延迟元件输出的输出信号和来自第二延迟元件的输出信号中的任何一个 用于选择输入信号的延迟时间的信号。

公开(公告)号：US20050057241A1

公开(公告)日：2005-03-17

申请号：US10792810

申请日：2004-03-05

申请人： Yasukazu Ono ,  Koji Okada ,  Hiroyuki Matsunami

发明人： Yasukazu Ono ,  Koji Okada ,  Hiroyuki Matsunami

IPC分类号： G01R23/165 ,  G01R19/00 ,  G01R23/00 ,  G01R31/28

CPC分类号： G01R31/2824 ,  G01R19/0007

摘要： An object of this invention is to provide a band distribution inspecting device and band distribution inspecting method capable of carrying out inspection on whether or not a scattered oscillation signal oscillated containing a frequency variation from the fundamental frequency with the fundamental frequency as a reference point has a band distribution rapidly, with a simple way and at a cheap price. A scattered oscillation signal SSS inputted to a band distribution detecting section 22 is outputted as a predetermined band pass signal SBP through a band pass filter 17 having a predetermined pass band of a predetermined narrow-band width Δf within a band distribution. This signal is converted to a root-mean-square value by a smoother 19, smoothed by a capacitor C1 and transferred to a general purpose inspecting device 21 as a DC signal SAV. The DC signal SAV is compared with a predetermined voltage value VX by a comparator 25 and its comparison result is judged by a judging section 25 and then, an inspection result is outputted as a judging signal J. As a result, an edge frequency in the band distribution of the scattered oscillation signal SSS and disturbance of frequency variation within/out of the band and dullness in waveform and the like can be inspected for.

摘要翻译： 本发明的目的是提供一种能够对以基频为基准的包含来自基频的频率变化的振荡信号是否具有振荡的频带分布检查装置和频带分布检查方法进行检查 乐队分布迅速，以简单的方式和便宜的价格。 输入到频带分布检测部分22的散射振荡信号SSS作为预定的带通信号SBP通过具有预定窄带宽度Deltaf的预定通带的带通滤波器17输出。 该信号由平滑器19转换成均方根值，由电容器C1平滑，并作为DC信号SAV传送到通用检测装置21。 通过比较器25将DC信号SAV与预定的电压值VX进行比较，并且判断部25判断其比较结果，然后作为判断信号J输出检查结果。结果，边缘频率 可以检查散射振荡信号SSS的频带分布和波段内/频带内的频率变化的干扰以及波形等中的钝度。

公开(公告)号：US06577260B2

公开(公告)日：2003-06-10

申请号：US09819719

申请日：2001-03-29

申请人： Koji Okada ,  Hiroyuki Matsunami

发明人： Koji Okada ,  Hiroyuki Matsunami

IPC分类号： H03M166

CPC分类号： H03K17/04106 ,  H03K17/162 ,  H03K17/693 ,  H03M1/745

摘要： A Digital/Analog converter comprising a plurality of current sources, and a selecting circuit for selecting a current source from the plurality of current sources on the basis of a digital signal. The selecting circuit includes a first transistor in which the digital signal is supplied. The selecting circuit also includes a second transistor with the same conductivity type as the first transistor for receiving an inverted digital signal of the digital signal. The second transistor is connected to the output of the first transistor.

摘要翻译： 一种数字/模拟转换器，包括多个电流源，以及选择电路，用于根据数字信号从多个电流源中选择电流源。 选择电路包括其中提供数字信号的第一晶体管。 选择电路还包括具有与第一晶体管相同的导电类型的第二晶体管，用于接收数字信号的反相数字信号。 第二晶体管连接到第一晶体管的输出。