Superconducting switching circuit, memory cell and memory circuit, with
resonance damping resistors
    31.
    发明授权
    Superconducting switching circuit, memory cell and memory circuit, with resonance damping resistors 失效
    超导开关电路,存储单元和存储电路,具有谐振阻尼电阻

    公开(公告)号:US4785426A

    公开(公告)日:1988-11-15

    申请号:US777585

    申请日:1985-09-19

    IPC分类号: G11C11/44 H03K3/38

    CPC分类号: H03K3/38 G11C11/44

    摘要: A superconducting switching circuit comprises a DCFP circuit composed of two Josephson junction elements constituting two current paths, respectively. Each of the current paths includes a resistor for suppressing resonance. A memory cell constituted by the DCFP circuit includes three Josephson junction elements constituting three current paths, respectively. Each of the current paths includes a resistor for suppressing resonance. A memory circuit comprises a number of memory cells of such a structure.

    摘要翻译: 超导切换电路包括分别由构成两个电流路径的两个约瑟夫逊结元件组成的DCFP电路。 每个电流路径包括用于抑制谐振的电阻器。 由DCFP电路构成的存储单元分别包括构成三个电流路径的三个约瑟夫逊结元件。 每个电流路径包括用于抑制谐振的电阻器。 存储电路包括多个具有这种结构的存储单元。

    Impregnated cathode
    33.
    发明授权
    Impregnated cathode 失效
    浸渍阴极

    公开(公告)号:US4400648A

    公开(公告)日:1983-08-23

    申请号:US192870

    申请日:1980-10-01

    IPC分类号: H01J1/28 H01J1/14

    CPC分类号: H01J1/28

    摘要: An impregnated cathode having a complex porous body of one-body construction which is mounted in a metal sleeve and in which a partition layer made of a porous material having a porosity less than 17% is arranged in close contact with an impregnated layer made of a porous material containing an electron emissive material. The aforementioned porous partition layer takes the place of the conventional partition plate of refractory metal. The impregnated cathode according to the present invention can not only have its size reduced without any difficulty but also enjoy a high emission current density with a remarkably small dispersion.

    摘要翻译: 具有安装在金属套筒中的单体结构的复合多孔体的浸渍阴极,其中由孔隙率小于17%的多孔材料制成的分隔层紧密接触于由 含有电子发射材料的多孔材料。 上述多孔分隔层代替常规的难熔金属隔板。 根据本发明的浸渍阴极不仅能够使其尺寸减小而且难以实现,而且还可以获得非常小的色散的高发射电流密度。

    Electron tube cathode and method for producing the same
    35.
    发明授权
    Electron tube cathode and method for producing the same 失效
    电子管阴极及其制造方法

    公开(公告)号:US4260665A

    公开(公告)日:1981-04-07

    申请号:US946194

    申请日:1978-09-27

    摘要: An electron tube cathode in such a structure comprising a Ni-W-Zr alloy (W content: 20-28 wt. %) having a grain size of 4-10 .mu.m as a base metal, a 1,000-2,000 A-thick Pt film provided on the surface of the base metal, and an electron emitting material layer consisting of alkaline earth metal oxide provided on the Pt film has less emission lowering and less peeling of the electron emitting material layer, even if placed in a long time service. The electron tube cathode can be produced according to a method comprising (i) a step of annealing a base metal of Ni-W-Zr alloy (W content: 20-28 wt. %) at 1,000.degree.-1,200.degree. C., (ii) a step of providing a 1,000-2,000 A thick Pt film on the surface of the base metal, and (iii) a step of providing an electron emitting material layer consisting of alkaline earth metal oxide on the Pt film.

    摘要翻译: 这种结构中的电子管阴极,其特征在于:以贱金属为基准的粒径为4-10μm的Ni-W-Zr合金(W含量:20〜28重量%),1000〜 并且由于设置在Pt膜上的由碱土类金属氧化物构成的电子发射材料层即使放置在长时间的服务中也具有较少的发射降低和较少的电子发射材料层的剥离。 电子管阴极可以根据以下方法制造:(i)在1000-1200℃下退火Ni-W-Zr合金的母材(W含量:20-28重量%)的步骤,( ii)在母材表面上提供1,000-2,000A厚的Pt膜的步骤,和(iii)在Pt膜上提供由碱土金属氧化物构成的电子发射材料层的步骤。

    Method of manufacturing thin-film field-emission electron source
    36.
    发明授权
    Method of manufacturing thin-film field-emission electron source 失效
    制造薄膜场致发射电子源的方法

    公开(公告)号:US3998678A

    公开(公告)日:1976-12-21

    申请号:US453031

    申请日:1974-03-20

    IPC分类号: H01J9/02 C23F1/04 A47B88/00

    CPC分类号: H01J9/025 H01J2201/30457

    摘要: A method of manufacturing a thin-film field-emission electron source which is of a sandwich structure of a substrate - metallic film-insulating film - metallic film and which has at least one minute cavity and a field-emitter of, for example, a conical shape within the cavity, comprises the steps of (i) forming on a substrate a first layer of metallic film pattern for current supply, (ii) depositing a second layer film made of an electron emissive material onto the entire area of the substrate provided with the first layer, and thereafter subjecting the second layer film to a mesa etch by a photoetching process, to form a conical emitter on the first layer film, (iii) forming a third layer made of an insulating material, the third layer having a height substantially equal to the level of a tip portion of the emitter, (iv) forming a fourth layer of metallic film pattern as an accelerating electrode, and (v) etching the third layer, so as to expose the extremity of the emitter.According to the manufacturing method, a thin-film field-emission electron source can be readily produced merely by the combination between the standard evaporation techniques and etching techniques.

    摘要翻译: 一种制造薄膜场致发射电子源的方法,该薄膜场致发射电子源是基片 - 金属膜绝缘膜 - 金属膜的夹层结构,并且具有至少一分钟腔体和场致发射体,例如, 包括以下步骤:(i)在基板上形成用于电流供应的第一金属膜图案层,(ii)将由电子发射材料制成的第二层膜沉积到所提供的基板的整个区域上 并且然后通过光刻工艺对第二层膜进行台面蚀刻,以在第一层膜上形成锥形发射体,(iii)形成由绝缘材料制成的第三层,第三层具有 高度基本上等于发射体的尖端部分的高度,(iv)形成作为加速电极的金属膜图案的第四层,(v)蚀刻第三层,以暴露出发射极的末端。

    Superconducting logic circuit and superconducting switching device
therefor
    39.
    发明授权
    Superconducting logic circuit and superconducting switching device therefor 失效
    超导逻辑电路及其超导开关器件

    公开(公告)号:US4555643A

    公开(公告)日:1985-11-26

    申请号:US391716

    申请日:1982-06-24

    IPC分类号: H03K17/92 H03K19/195

    摘要: A superconducting logic circuit including a first power source terminal connected with a current source; a second power source terminal connected with a current sink; a first superconducting switching device connected between said first power source terminal and ground; a second superconducting switching device connected between said second power source terminal and ground; first and second resistors connected with said first and second power source terminals, respectively; and third and fourth resistors connected with the control terminals of said first and second superconducting switching devices, respectively, wherein the other terminals of said first and second resistors are connected with each other to provide a logic output terminal, and wherein the other terminals of said third and fourth resistors are connected with each other to provide a logic input terminal.

    摘要翻译: 一种超导逻辑电路,包括与电流源连接的第一电源端子; 与电流接收器连接的第二电源端子; 连接在所述第一电源端子和地之间的第一超导开关装置; 连接在所述第二电源端子和地之间的第二超导开关装置; 分别与所述第一和第二电源端子连接的第一和第二电阻器; 以及分别与所述第一和第二超导开关装置的控制端子连接的第三和第四电阻器,其中所述第一和第二电阻器的其他端子彼此连接以提供逻辑输出端子,并且其中所述第一和第二超导开关装置的其它端子 第三和第四电阻器彼此连接以提供逻辑输入端子。