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    Column grid array using compliant core
    31.
    发明授权
    Column grid array using compliant core 失效
    列网格阵列使用兼容内核

    公开(公告)号：US07700884B2

    公开(公告)日：2010-04-20

    申请号：US11292694

    申请日：2005-12-02

    Applicant: Anthony Casasnovas ,  Scott P. Dukes

    Inventor： Anthony Casasnovas ,  Scott P. Dukes

    IPC: H05K1/16 ,  H01R43/00

    CPC classification number: H05K3/3436 ,  H01L23/49811 ,  H01L2924/0002 ,  H01L2924/15312 ,  H05K2201/10242 ,  H05K2201/10265 ,  H05K2201/1031 ,  H05K2201/10893 ,  Y02P70/611 ,  Y02P70/613 ,  Y10T29/49222 ,  Y10T29/53174 ,  H01L2924/00

    Abstract: A method for forming interconnections within a column grid array is provided. The method involves casting one or more columns with at least a compliant core material that increases flexibility between an electronic component and a printed wiring board by at least a factor of two over metallic-based solder columns, and forming the one or more columns to length for interconnecting between the electronic component and the printed wiring board. The method also involves forming a conductive material for the one or more columns to provide electrical interconnection between the electronic component and the printed wiring board.

    Abstract translation: 提供了一种用于在列网格阵列内形成互连的方法。 该方法包括用至少一种柔性芯材料铸造一个或多个柱，其在金属基焊料柱上增加电子部件和印刷线路板之间的至少两倍的柔性，并且将一个或多个柱形成长度 用于在电子部件和印刷电路板之间互连。 该方法还涉及形成用于一个或多个列的导电材料以提供电子部件和印刷线路板之间的电互连。

    Column grid array using compliant core
    33.
    发明申请
    Column grid array using compliant core 失效
    列网格阵列使用兼容内核

    公开(公告)号：US20070125571A1

    公开(公告)日：2007-06-07

    申请号：US11292694

    申请日：2005-12-02

    Applicant: Anthony Casasnovas ,  Scott Dukes

    Inventor： Anthony Casasnovas ,  Scott Dukes

    IPC: H05K1/16

    CPC classification number: H05K3/3436 ,  H01L23/49811 ,  H01L2924/0002 ,  H01L2924/15312 ,  H05K2201/10242 ,  H05K2201/10265 ,  H05K2201/1031 ,  H05K2201/10893 ,  Y02P70/611 ,  Y02P70/613 ,  Y10T29/49222 ,  Y10T29/53174 ,  H01L2924/00

    Abstract: A method for forming interconnections within a column grid array is provided. The method involves casting one or more columns with at least a compliant core material that increases flexibility between an electronic component and a printed wiring board by at least a factor of two over metallic-based solder columns, and forming the one or more columns to length for interconnecting between the electronic component and the printed wiring board. The method also involves forming a conductive material for the one or more columns to provide electrical interconnection between the electronic component and the printed wiring board.

    Abstract translation: 提供了一种用于在列网格阵列内形成互连的方法。 该方法包括用至少一种柔性芯材料铸造一个或多个柱，其在金属基焊料柱上增加电子部件和印刷线路板之间的至少两倍的柔性，并且将一个或多个柱形成长度 用于在电子部件和印刷电路板之间互连。 该方法还涉及形成用于一个或多个列的导电材料以提供电子部件和印刷线路板之间的电互连。

    Differential transmission channel link for delivering high frequency signals and power
    35.
    发明授权
    Differential transmission channel link for delivering high frequency signals and power 有权
    用于传送高频信号和电源的差分传输通道链路

    公开(公告)号：US07061342B2

    公开(公告)日：2006-06-13

    申请号：US10330909

    申请日：2002-12-27

    Applicant: David L. Brunker ,  Daniel L. Dawiedczyk ,  John E. Lopata ,  Arindum Dutta

    Inventor： David L. Brunker ,  Daniel L. Dawiedczyk ,  John E. Lopata ,  Arindum Dutta

    IPC: H01P3/08

    CPC classification number: H05K1/024 ,  H01P3/02 ,  H01R12/716 ,  H01R12/79 ,  H01R13/658 ,  H05K1/0284 ,  H05K1/145 ,  H05K3/107 ,  H05K3/403 ,  H05K2201/09036 ,  H05K2201/09118 ,  H05K2201/09236 ,  H05K2201/09645 ,  H05K2201/09981 ,  H05K2201/10189 ,  H05K2201/10893

    Abstract: An engineered transmission line for transmitting high-frequency data signals between two points of connection includes a dielectric body and a plurality of conductive elements disposed thereon, with the plurality of conductive elements being arranged in pairs for differential signal transmission. In one embodiment, the dielectric body is solid and has its conductive elements supported on its exterior surface. In another embodiment, the dielectric body is extruded and has grooves or raised lands formed therein. The grooves or lands support conductive elements formed thereon by a suitable plating process. A ground plane may be provided as a base layer of the dielectric body. Enlarged conductive surfaces may also be provided on the body which have a greater surface area than those intended for use with the signal channels. The enlarged surfaces are utilized to carry power.

    Abstract translation: 用于在两个连接点之间传输高频数据信号的工程传输线包括绝缘体和设置在其上的多个导电元件，其中多个导电元件成对配置用于差分信号传输。 在一个实施例中，电介质体是固体并且其导电元件被支撑在其外表面上。 在另一个实施例中，电介质体被挤出并且在其中形成有凹槽或凸起的焊盘。 凹槽或平台通过合适的电镀工艺支撑在其上形成的导电元件。 可以提供接地平面作为电介质体的基层。 放大的导电表面也可以设置在主体上，其具有比用于信号通道的表面积更大的表面积。 放大的表面用于承载电力。

    Leadless high density connector
    36.
    发明授权
    Leadless high density connector 失效
    无铅高密度连接器

    公开(公告)号：US5593322A

    公开(公告)日：1997-01-14

    申请号：US375328

    申请日：1995-01-17

    Applicant: Deepak Swamy ,  Victor Pecone

    Inventor： Deepak Swamy ,  Victor Pecone

    IPC: H01R12/50 ,  H01R12/57 ,  H01R13/03 ,  H01R43/02 ,  H05K3/34 ,  H01R23/00

    CPC classification number: H01R12/57 ,  H01R13/035 ,  H01R23/6873 ,  H01R43/0256 ,  H05K3/3436 ,  H01R43/0235 ,  H05K2201/10189 ,  H05K2201/10893 ,  H05K2203/041 ,  H05K3/3426 ,  Y02P70/613 ,  Y10S439/931

    Abstract: A leadless high density connector including a plurality of connector pins each having multiconductor pins electrically connected to solder balls on the back side of the connector for interconnection to a PWB. The solder balls form a ball grid array (BGA), which replaces thin gull wing leads used on connectors of prior art. The use of BGA technology as applied to high density connectors provides a plurality of benefits associated with BGA technology. The signal carrying capacity of the connector is increased since the bottom surface of the connector is available for interconnecting signal paths rather than being limited to the peripheral edges as common for leaded packages. The resulting profile of the connector is substantially reduced allowing increased component and wiring density. The resulting bond strength using BGA technology is greater than that with a leaded equivalent due to the increased bond surface area and resulting anchoring effect. Therefore, BGA technology allows significantly increased yields over connectors using leads as known in prior art. The electrical characteristics of a connector according to the present invention is substantially improved since the inductance per pin is reduced using BGA as compared to leads. In this manner, connectors according to the present invention are more suitable for high speed applications especially when combined with the ability to interleave ground and signal connections.

    Abstract translation: 一种无引线高密度连接器，包括多个连接器引脚，每个连接器引脚各自具有电连接到连接器背面的焊球的多导体引脚，用于与PWB互连。 焊球形成球栅阵列（BGA），其代替在现有技术的连接器上使用的细鸥翼引线。 使用BGA技术应用于高密度连接器提供了与BGA技术相关的多种优点。 连接器的信号承载能力增加，因为连接器的底表面可用于互连信号路径，而不是被限制在与引线封装通用的外围边缘。 连接器的最终轮廓显着减小，从而增加了部件和接线密度。 使用BGA技术得到的结合强度大于由于增加的粘合表面积和导致的锚定效应引起的等效的粘合强度。 因此，如现有技术中已知的那样，BGA技术允许使用引线的连接器显着提高产量。 根据本发明的连接器的电特性显着改善，因为与引线相比，使用BGA降低每引脚的电感。 以这种方式，根据本发明的连接器更适用于高速应用，特别是当与交织地面和信号连接的能力相结合时。

    High density interconnect system
    37.
    发明授权
    High density interconnect system 失效
    高密度互连系统

    公开(公告)号：US4838800A

    公开(公告)日：1989-06-13

    申请号：US197200

    申请日：1988-05-23

    Applicant: Thomas M. Lynch

    Inventor： Thomas M. Lynch

    IPC: H05K3/00 ,  H05K3/30 ,  H05K3/40

    CPC classification number: H01R12/585 ,  H05K3/403 ,  H05K2201/09645 ,  H05K2201/10295 ,  H05K2201/10893 ,  H05K3/0047 ,  H05K3/308 ,  Y10S439/931

    Abstract: Plated-through-holes of printed circuit boards are segmented to provide a plurality of conductors. Matching connector pins having insulating cores and patterned conductive portions are mated with the conductors of the plated-through-holes. Each of the conductors of the holes can be connected to a different one of the patterns on the printed circuit boards thus forming a high density interconnect system.

    Abstract translation: 印刷电路板的通孔被分段以提供多个导体。 具有绝缘芯和图案化导电部分的匹配连接器引脚与电镀通孔的导体配合。 孔的每个导体可以连接到印刷电路板上的不同图案中，从而形成高密度互连系统。

    Grouped element transmission channel link termination assemblies
    40.
    发明授权
    Grouped element transmission channel link termination assemblies 有权
    分组元件传输通道链接端接组件

    公开(公告)号：US07160154B2

    公开(公告)日：2007-01-09

    申请号：US11182988

    申请日：2005-07-15

    Applicant: David L. Brunker ,  Daniel L. Dawiedczyk ,  John E. Lopata ,  Arindum Dutta

    Inventor： David L. Brunker ,  Daniel L. Dawiedczyk ,  John E. Lopata ,  Arindum Dutta

    IPC: H01R24/00

    CPC classification number: H05K1/024 ,  H01P3/02 ,  H01R12/716 ,  H01R12/79 ,  H01R13/658 ,  H05K1/0284 ,  H05K1/145 ,  H05K3/107 ,  H05K3/403 ,  H05K2201/09036 ,  H05K2201/09118 ,  H05K2201/09236 ,  H05K2201/09645 ,  H05K2201/09981 ,  H05K2201/10189 ,  H05K2201/10893

    Abstract: Termination assemblies for terminating high-frequency data signal transmission lines include housings with one or more cavities that receive ends of the transmission line therein. The transmission line typically includes a dielectric body and a plurality of conductive elements disposed thereon, with the plurality of conductive elements being arranged in pairs for differential signal transmission. The termination assemblies, in one embodiment include hollow end caps that are formed from a dielectric and which have one or more conductive contacts or plated surfaces disposed on or within the cavity so that they will frictionally mate with the conductive traces on the transmission line. In another embodiment, a connector housing is provided with a center slot and a plurality of dual loop contacts to provide redundant circuit paths and low inductance to the termination assembly. A coupling element may be utilized in the slot to achieve a desired level of coupling between the termination contacts.

    Abstract translation: 用于终止高频数据信号传输线路的终端组件包括具有一个或多个腔体的壳体，该腔体容纳传输线路的端部。 传输线通常包括绝缘体和设置在其上的多个导电元件，多个导电元件成对布置以用于差分信号传输。 终端组件在一个实施例中包括由电介质形成并且具有一个或多个导电触点或设置在空腔中或腔内的电镀表面的空心端盖，使得它们将与传输线上的导电迹线摩擦配合。 在另一个实施例中，连接器壳体设置有中心狭槽和多个双环触点，以向终端组件提供冗余电路路径和低电感。 可以在槽中使用耦合元件以实现端接触点之间期望的耦合水平。

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