公开(公告)号：US20150102499A1

公开(公告)日：2015-04-16

申请号：US14511920

申请日：2014-10-10

Applicant: STMicroelectronics (Grenoble 2) SAS

Inventor： Alexandre Coullomb

IPC: H01L23/473 ,  H01L23/50 ,  H01L23/48

CPC classification number: H01L23/473 ,  H01L23/3677 ,  H01L23/481 ,  H01L23/49816 ,  H01L23/49822 ,  H01L25/105 ,  H01L25/18 ,  H01L2224/16227 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1094 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/18161 ,  H01L2924/00014

Abstract: An electronic device includes a substrate wafer made of many layers of an insulating material and including an electrical connection network. An integrated circuit chip is mounted to a top side of the substrate wafer. The substrate wafer further includes a metal plate that is integrated into the substrate wafer and thermally coupled to the integrated circuit chip. The metal plate may have a thickness in excess of several layers of the substrate wafer. The metal plate may include a duct through which a thermally conductive fluid flows.

Abstract translation: 电子设备包括由多层绝缘材料制成并包括电连接网络的衬底晶片。 集成电路芯片安装在基板晶片的顶侧。 衬底晶片还包括集成到衬底晶片中并且热耦合到集成电路芯片的金属板。 金属板的厚度可以超过衬底晶片的几层。 金属板可以包括导热流体流过的管道。

公开(公告)号：US09006904B2

公开(公告)日：2015-04-14

申请号：US13654850

申请日：2012-10-18

Applicant: STMicroelectronics (Grenoble 2) SAS

Inventor： Dominique Marais ,  Jacques Chavade ,  Rémi Brechignac ,  Eric Saugier ,  Romain Coffy ,  Luc Petit

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L23/367 ,  H01L25/065 ,  H05K1/02 ,  H05K3/34

CPC classification number: H01L25/0652 ,  H01L23/3677 ,  H01L24/73 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06572 ,  H01L2225/06586 ,  H01L2225/06589 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/15311 ,  H01L2924/3011 ,  H05K1/0206 ,  H05K3/3436 ,  H05K2201/10515 ,  H05K2201/1053

Abstract: An electronic package includes a substrate wafer with an interconnect network. A first chip is fixed to a front of the substrate, connected to the interconnect network and encapsulated by a body. A second chip is placed on a back side of the substrate wafer and connected to the interconnect network by back-side connection elements interposed between the back side of the substrate and a front side of the second chip. Front-side connection elements are placed on the front side of the substrate and connected to the interconnect network. The connection elements extend beyond the frontal face of the body. The package may be mounted on a board with an interposed thermally conductive material.

Abstract translation: 电子封装包括具有互连网络的衬底晶片。 第一芯片固定到基板的前部，连接到互连网络并由主体封装。 第二芯片放置在基板晶片的背面，并通过设置在基板的背面和第二芯片的前侧之间的背面连接元件连接到互连网络。 前端连接元件放置在基板的正面并连接到互连网络。 连接元件延伸超出身体的正面。 封装可以安装在具有插入的导热材料的板上。

公开(公告)号：US08976294B2

公开(公告)日：2015-03-10

申请号：US14268010

申请日：2014-05-02

Applicant: STMicroelectronics (Grenoble 2) SAS

Inventor： Pascal Mellot

IPC: H04N5/04 ,  H04N5/12

CPC classification number: H04N5/12 ,  H04N5/232

Abstract: Each of a first and second image acquisition device includes: a circuit for providing a primary clock signal and a frequency synthesizing circuit capable of generating at least one secondary clock signal from said primary clock signal. The frequency synthesizing circuit in each image acquisition device has a fractional phase-locked loop configuration. A synchronization comparison circuit in each image acquisition device functions to compare sync between an external sync signal and an internal sync signal. An adjustment of the fraction phase lock loop operation is made in response to the sync comparison.

Abstract translation: 第一和第二图像采集装置中的每一个包括：用于提供主时钟信号的电路和能够从所述主时钟信号产生至少一个辅助时钟信号的频率合成电路。 每个图像采集装置中的频率合成电路具有分数锁相环配置。 每个图像采集装置中的同步比较电路用于比较外部同步信号和内部同步信号之间的同步。 响应于同步比较进行分数锁相环操作的调整。

公开(公告)号：US20150016081A1

公开(公告)日：2015-01-15

申请号：US14330176

申请日：2014-07-14

Applicant: STMicroelectronics (Grenoble 2) SAS

Inventor： David Auchere ,  Laurent Marechal

IPC: H01L23/50 ,  H05K3/42 ,  H01L23/64

CPC classification number: H05K3/42 ,  H01L23/49811 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/645 ,  H01L2224/16225 ,  H01L2924/15311 ,  Y10T29/4913

Abstract: An electronic device may include a substrate, and an integrated circuit over the substrate. The substrate may be provided with an electrical connection network including electrical links for linking the integrated circuit to another electrical device. Some of the electrical links may include an impedance-compensating inductor.

Abstract translation: 电子设备可以包括衬底，以及在衬底上的集成电路。 衬底可以设置有包括用于将集成电路连接到另一电气设备的电连接的电连接网络。 一些电连接可以包括阻抗补偿电感器。

公开(公告)号：US08897559B2

公开(公告)日：2014-11-25

申请号：US13624613

申请日：2012-09-21

Applicant: STMicroelectronics (Grenoble 2) SAS

Inventor： Nicolas Roux

IPC: G06K9/00 ,  G06T11/00 ,  G09G5/02 ,  G06K9/34

CPC classification number: G09G5/02 ,  G06T11/001 ,  G09G2340/06

Abstract: A method for performing a modification of the color saturation of at least one pixel of an image involving: determining, based on pixel values of a first pixel, at least one of a color saturation value, luminance value and hue value corresponding to said first pixel; determining, based on said at least one value, a saturation factor; and modifying the color saturation level of said first pixel based on said saturation factor.

Abstract translation: 一种用于执行图像的至少一个像素的色彩饱和度的修改的方法，包括：基于第一像素的像素值，确定与所述第一像素对应的色彩饱和度值，亮度值和色相值中的至少一个 ; 基于所述至少一个值确定饱和因子; 以及基于所述饱和因子修改所述第一像素的色彩饱和度水平。

公开(公告)号：US20140289807A1

公开(公告)日：2014-09-25

申请号：US14218467

申请日：2014-03-18

Applicant: STMicroelectronics Asia Pacific Pte Ltd ,  STMicroelectronics (Grenoble 2) SAS

Inventor： Raphael Collado ,  Cheeseng Tan

IPC: G06F21/44

CPC classification number: G06F21/44 ,  G06F9/445 ,  G06F9/468 ,  G06F21/53

Abstract: A processor system is arranged to execute user selected applications. A manager module is configured to detect a user selection of an application and configured to initiate a launch process. A supervisor module is configured to intercept the launch process initiated by the manager module and detect whether the application is a trusted application or an untrusted application. Trusted applications have a privilege to access resources without authorization, and untrusted applications do not have the privilege. The supervisor module has the privilege to access the resources. When the application is untrusted, the application is launched in a container, and at least one of the resources is delivered to the untrusted application in the container.

Abstract translation: 处理器系统被布置成执行用户选择的应用。 管理器模块被配置为检测用户对应用的选择并被配置为发起启动过程。 管理员模块被配置为拦截由管理器模块发起的启动过程，并检测应用程序是可信应用程序还是不受信任的应用程序。 受信任的应用程序有权未经授权访问资源，不受信任的应用程序没有权限。 主管模块有权访问资源。 当应用程序不受信任时，应用程序将在容器中启动，并且至少有一个资源被传递到容器中的不受信任的应用程序。

公开(公告)号：US20140112149A1

公开(公告)日：2014-04-24

申请号：US14059252

申请日：2013-10-21

Applicant: STMicroelectronics (Grenoble 2) SAS

Inventor： Ignazio Antonino Urzi ,  Nicolas Graciannette ,  Daniele Mangano

IPC: H04L12/835

CPC classification number: H04L47/30 ,  G06F15/7825 ,  H04L47/12 ,  H04L47/263 ,  Y02D50/10

Abstract: An apparatus includes an output configured to output data to a communication path of an interconnect for routing to a target and a rate controller configured to control a rate of the output data. The rate controller is configured to control the rate in response to feedback information from the target.

Abstract translation: 一种装置包括被配置为将数据输出到用于路由到目标的互连的通信路径的输出和被配置为控制输出数据的速率的速率控制器。 速率控制器被配置为响应于来自目标的反馈信息来控制速率。

公开(公告)号：US20140002705A1

公开(公告)日：2014-01-02

申请号：US13930874

申请日：2013-06-28

Applicant: STMicroelectronics (Grenoble 2) SAS

Inventor： Benoit Deschamps

IPC: H04N5/335

CPC classification number: H04N5/335 ,  H04N3/155 ,  H04N5/2175 ,  H04N5/355 ,  H04N5/35527 ,  H04N5/35536 ,  H04N5/35554 ,  H04N5/35581 ,  H04N5/3594

Abstract: A method for controlling a pixel including at least one photodiode capable of being connected to a sense node, the method including the steps of: a) at the beginning and at the end of a first integration period included within a second integration period, controlling the pixel to transfer the charges stored in the photodiode above a first threshold onto the sense node; and b) at an intermediate time between the beginning of the second period and the beginning of the first period, controlling the pixel to transfer the charges stored in the photodiode above the first threshold onto the sense node.

Abstract translation: 一种用于控制包括能够连接到感测节点的至少一个光电二极管的像素的方法，所述方法包括以下步骤：a）在包含在第二积分周期内的第一积分周期的开始和结束时，控制 像素，将存储在光电二极管的电荷高于第一阈值传输到感测节点; 以及b）在所述第二周期的开始和所述第一周期的开始之间的中间时间，控制所述像素将存储在所述光电二极管中的电荷转移到所述第一阈值之上到所述感测节点。

公开(公告)号：US20130293402A1

公开(公告)日：2013-11-07

申请号：US13874658

申请日：2013-05-01

Applicant: STMICROELECTRONICS (GRENOBLE 2) SAS

Inventor： Herve NAUDET

IPC: H03M1/10

CPC classification number: H03M1/1071

Abstract: A method for testing an analog-to-digital converter (ADC) includes applying ramps to the input of the converter, and classifying the digital codes produced by the converter according to a histogram. The converter is declared operational as soon as all the classes of the histogram have reached a minimum count. The minimum count may be equal to 1 in practice. The converter is declared defective if any class does not reach the minimum count before expiry of a time interval.

Abstract translation: 用于测试模数转换器（ADC）的方法包括将斜坡应用到转换器的输入端，并根据直方图对转换器产生的数字码进行分类。 一旦直方图的所有类都达到最小计数，转换器就会声明运行。 实际中最小计数可能等于1。 如果任何类别在时间间隔到期之前未达到最小计数，则转换器被声明为有缺陷的。

公开(公告)号：US20130195235A1

公开(公告)日：2013-08-01

申请号：US13744146

申请日：2013-01-17

Applicant: STMicroelectronics (Research & Development) Limited ,  STMicroelectronics (Grenoble 2) SAS

Inventor： Andrew FERRIS ,  Ignazio Antonino URZI

IPC: H04L7/00

CPC classification number: H04L7/00 ,  G06F1/08 ,  G06F1/10 ,  H04L7/0004 ,  H04L7/0008 ,  H04L7/0083

Abstract: An apparatus includes a first clock source, a second clock source and circuitry configured to supply a clock signal to a circuit. The circuitry operates to change the clock signal from one frequency to another different frequency. This change is made in a manner whereby no clock signal is supplied during a period of time when the change from the one frequency to the another different clock frequency is being made.

Abstract translation: 一种装置包括第一时钟源，第二时钟源和被配置为向电路提供时钟信号的电路。 电路用于将时钟信号从一个频率改变到另一个频率。 这种改变是在从一个频率到另一个不同的时钟频率的变化的时间段期间不提供时钟信号的。