公开(公告)号：US07233512B2

公开(公告)日：2007-06-19

申请号：US11048224

申请日：2005-02-01

Applicant: Mark Lysinger ,  Francois Jacquet ,  Phillippe Roche

Inventor： Mark Lysinger ,  Francois Jacquet ,  Phillippe Roche

IPC: G11C15/00

CPC classification number: G11C15/04 ,  G11C15/00

Abstract: A Content Addressable Memory (CAM) circuit includes memory cells preferably formed as two memory cells each having internal nodes. A compare circuit is operative with the memory cells. A common terminal (VPL) exists for the memory cells. Capacitors are added between the internal nodes of each of the memory cells and common terminal for memory cell stability.

Abstract translation: 内容可寻址存储器（CAM）电路包括优选地形成为具有内部节点的两个存储器单元的存储器单元。 比较电路与存储器单元一起工作。 存储单元存在公共端（VPL）。 在每个存储单元的内部节点和公共端子之间添加电容器用于存储器单元的稳定性。

公开(公告)号：US20070115032A1

公开(公告)日：2007-05-24

申请号：US11473877

申请日：2006-06-23

Applicant: David McClure ,  Sooping Saw

Inventor： David McClure ,  Sooping Saw

IPC: H03K5/153

CPC classification number: G01K3/005 ,  G01K7/015 ,  G01K15/00

Abstract: An integrated circuit temperature sensor includes a sensing circuit operable to determine whether the integrated circuit is currently exposed to one of a relatively low temperature or a relatively high temperature. A selection circuit operates to select a measured voltage across the base-emitter of a bipolar transistor of the integrated circuit if the sensing circuit indicates that the integrated circuit is currently exposed to the relatively low temperature or, alternatively, select a measured delta voltage across the base-emitter of the bipolar transistor of the integrated circuit if the sensing circuit indicates that the integrated circuit is currently exposed to the relatively high temperature. A comparator then compares the selected measured voltage across the base-emitter of the bipolar transistor against a first reference voltage indicative of a too cold temperature condition or compares the selected measured delta voltage across the base-emitter of the bipolar transistor against a second reference voltage indicative of a too hot temperature condition. As a result of the comparison, detection may be made as to whether the integrated circuit is currently exposed to one of either a too cold or too hot temperature. In a test mode, the circuit is exposed to a readily available temperature, such as room temperature, and the measured delta voltage across the base-emitter and/or the measured voltage across the base-emitter are scaled in accordance with that available temperature for application to the comparator. Alternatively, in test mode the reference voltages are scaled to intersect with the measured delta voltage across the base-emitter and/or the measured voltage across the base-emitter at the available temperature.

Abstract translation: 集成电路温度传感器包括感测电路，其可操作以确定集成电路当前是否暴露于较低温度或较高温度之一。 如果感测电路指示集成电路当前暴露于相对较低的温度，则选择电路用于选择集成电路的双极晶体管的基极 - 发射极两端的测量电压，或者替代地，选择跨越 如果感测电路指示集成电路当前暴露于相对较高的温度，则集成电路的双极晶体管的基极 - 发射极。 比较器然后将双极晶体管的基极 - 发射极两端的选定测量电压与指示过冷温度条件的第一参考电压进行比较，或将双极晶体管的基极 - 发射极两端的选定测量的增量电压与第二参考电压 表示太热的温度条件。 作为比较的结果，可以检测集成电路当前是否暴露于太冷或过热的温度之一。 在测试模式中，电路暴露于易于获得的温度，例如室温，并且基极 - 发射极两端的测量的增量电压和/或基极 - 发射极两端的测量电压都按照可用温度 应用于比较器。 或者，在测试模式中，参考电压被缩放以与基极 - 发射极两端测得的增量电压和/或可用温度下的基极 - 发射极两端的测量电压相交。

公开(公告)号：US07218635B2

公开(公告)日：2007-05-15

申请号：US09943815

申请日：2001-08-31

Applicant: Semir S. Haddad

Inventor： Semir S. Haddad

IPC: H04N7/26 ,  H04L12/28

CPC classification number: H04N5/76 ,  G11B27/005 ,  G11B27/3027 ,  G11B2220/216 ,  G11B2220/2562 ,  H04N5/783 ,  H04N5/85 ,  H04N9/8042 ,  H04N9/8063

Abstract: There is disclosed an apparatus for implementing special mode playback operations in a digital video recorder. The apparatus comprises an Intra frame indexing device capable of receiving an incoming MPEG video stream and identifying therein data packets associated with Intra frames, wherein the Intra frame indexing device modifies header information in a first data packet associated with a first Intra frame to include location information identifying a storage address of a second data packet associated with a second Intra frame.

公开(公告)号：US07218542B2

公开(公告)日：2007-05-15

申请号：US11134890

申请日：2005-05-23

Applicant: Mark Lysinger

Inventor： Mark Lysinger

IPC: G11C15/00 ,  G11C7/06 ,  G11C7/00 ,  G06F13/00

CPC classification number: G06F7/74 ,  G11C15/00 ,  G11C15/04

Abstract: A priority encoder can be used for a Content-Addressable Memory (CAM) device that typically has an array of CAM cells arranged in columns and rows with each row having a match signal indicative that compare data has matched data within the respective row. A priority encoder is operatively connected to the array of CAM cells and determines a highest priority matching address for data within the array of CAM cells. The priority encoder includes match lines associated with respective rows and precharged bus lines connected into respective match lines that are discharged whenever there is a match signal such that the highest precharged bus line discharged results in an encoded address.

Abstract translation: 优先编码器可以用于通常具有排列成列和行的CAM单元阵列的内容寻址存储器（CAM）设备，每个行具有指示比较数据具有相应行内的匹配数据的匹配信号。 优先编码器可操作地连接到CAM单元阵列，并确定CAM单元阵列内的数据的最高优先级匹配地址。 优先编码器包括与相应行相关联的匹配线和连接到相应匹配线中的预充电总线，每当匹配信号被放电时，放电的最高预充电总线导致编码地址。

公开(公告)号：US20070081610A1

公开(公告)日：2007-04-12

申请号：US11247822

申请日：2005-10-11

Applicant: Ivan Krivokapic ,  Thierry Divel

Inventor： Ivan Krivokapic ,  Thierry Divel

IPC: H04L27/12

CPC classification number: H03L7/099 ,  H03B21/01 ,  H03D7/165 ,  H03J3/08 ,  H03L7/0805 ,  H03L7/107 ,  H03L7/18 ,  H03L7/185 ,  H04B1/30

Abstract: A single sideband mixer circuit includes a voltage controlled oscillator operable a tunable frequency f1. The mixer circuit outputs a frequency signal at a frequency f1±f2. A tracking filter operates to filter the frequency signal and generate a first output signal at the frequency f1±f2. A resonance frequency fr of the tracking filter is tunable to substantially match the frequency f1±f2 of the frequency signal. The output signal of the tracking filter may be processed by a phase lock loop circuit to generate a control signal for controlling the setting of the tunable frequency f1 and resonance frequency fr. Alternatively, the output signal of the tracking filter may be divided and the divided signal processed by a phase lock loop circuit to generate the control signal for controlling setting of the tunable frequency f1 and resonance frequency fr.

Abstract translation: 单个边带混频器电路包括可操作的可调谐频率f 1的压控振荡器。 混频器电路以频率f 1±f 2输出频率信号。 跟踪滤波器用于对频率信号进行滤波并产生频率为f 1±f 2的第一输出信号。 跟踪滤波器的谐振频率fr可调，以使频率信号的频率f 1±f 2基本匹配。 跟踪滤波器的输出信号可以由锁相环电路来处理，以产生用于控制可调频率f 1和谐振频率fr的设置的控制信号。 或者，跟踪滤波器的输出信号可以被分频，并且由锁相环电路处理的分频信号产生用于控制可调谐频率f 1和谐振频率fr的设置的控制信号。

公开(公告)号：US07202110B2

公开(公告)日：2007-04-10

申请号：US11005868

申请日：2004-12-06

Applicant: Anthony M. Chiu ,  Harry Michael Siegel

Inventor： Anthony M. Chiu ,  Harry Michael Siegel

IPC: H01L21/00

CPC classification number: G06K9/0002

Abstract: A flat filter layer is received between upper and lower mold portions of a mold for packaging an integrated circuit sensor device, held by the mold over and in contact with the integrated circuit's sensing surface, in light compression between the sensing surface and a mold surface. The filter layer includes slots allowing passage of injected encapsulating material to cover the integrated circuit die, with overlap portions embedded in the encapsulating material, while preventing such encapsulating material from flowing onto the sensing surface. The filter layer may be, for example, a liquid and/or light filter, and may include a protective or supportive backing. The filter is thus affixed to the packaged integrated circuit sensor device, while mold residue is reduced and mold life extended.

Abstract translation: 在模具的上模具部分和下模具部分之间容纳平坦的过滤层，用于将由模具保持的集成电路传感器装置封装在集成电路的感测表面上并与集成电路的感测表面接触，以在感测表面和模具表面之间的轻压缩。 过滤层包括允许注入的封装材料通过以覆盖集成电路管芯的槽，其中重叠部分嵌入在封装材料中，同时防止这种封装材料流入感测表面。 过滤层可以是例如液体和/或光过滤器，并且可以包括保护性或支撑性背衬。 因此，过滤器被固定到封装的集成电路传感器装置上，同时减少模具残渣并延长模具寿命。

公开(公告)号：US20070075387A1

公开(公告)日：2007-04-05

申请号：US11562331

申请日：2006-11-21

Applicant: Joseph McAlexander

Inventor： Joseph McAlexander

IPC: H01L29/84

CPC classification number: H01H35/14 ,  B81B2201/0235 ,  B81B2201/032 ,  B81C1/0015 ,  B81C2201/019 ,  G01P15/125 ,  G01P15/135 ,  G01P2015/0828 ,  H01H1/0036

Abstract: An acceleration sensor includes a semiconductor substrate, a first layer formed on the substrate, a first aperture within the first layer, and a beam coupled at a first end to the substrate and suspended above the first layer for a portion of the length thereof. The beam includes a first boss coupled to a lower surface thereof and suspended within the first aperture, and a second boss coupled to an upper surface of the second end of the beam. A second layer is positioned on the first layer over the beam and includes a second aperture within which the second boss is suspended by the beam. Contact surfaces are positioned within the apertures such that acceleration of the substrate exceeding a selected threshold in either direction along a selected axis will cause the beam to flex counter to the direction of acceleration and make contact through one of the bosses with one of the contact surfaces.

Abstract translation: 加速度传感器包括半导体衬底，形成在衬底上的第一层，第一层内的第一孔，以及在第一端处耦合到衬底并在其长度的一部分上悬浮在第一层上方的梁。 梁包括联接到其下表面并悬挂在第一孔内的第一凸起，以及联接到梁的第二端的上表面的第二凸台。 第二层位于梁上的第一层上，并且包括第二孔，第二凸起由梁悬挂在该第二孔内。 接触表面定位在孔内，使得沿着所选择的轴线在任一方向超过选定阈值的基底的加速度将导致梁相对于加速方向弯曲并且通过一个凸起与其中一个接触表面 。

公开(公告)号：US07196425B2

公开(公告)日：2007-03-27

申请号：US10954630

申请日：2004-09-30

Applicant: Anthony M. Chiu ,  Tong Yan Tee

Inventor： Anthony M. Chiu ,  Tong Yan Tee

IPC: H01L23/48

CPC classification number: H01L25/0657 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/2919 ,  H01L2224/32245 ,  H01L2224/73253 ,  H01L2224/92225 ,  H01L2225/06575 ,  H01L2225/06589 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/3511 ,  H01L2924/3512 ,  H01L2924/00 ,  H01L2924/014 ,  H01L2224/0401

Abstract: A stacked die integrated circuit assembly comprising: 1) a substrate; 2) a first integrated circuit die mounted on the substrate; 3) a copper interposer mounted on the first integrated circuit die; and 4) a second integrated circuit die mounted on the copper interposer. The copper interposer significantly reduces the warping of the stacked die IC assembly caused by the warping of the substrate due to thermal changes in the substrate. The copper interposer has a significantly higher coefficient of thermal expansion than a conventional silicon (Si) interposer. The higher CTE enables the copper interposer to counteract the substrate warping.

Abstract translation: 1.一种堆叠管芯集成电路组件，包括：1）衬底; 2）安装在基板上的第一集成电路管芯; 3）安装在第一集成电路管芯上的铜插入件; 和4）安装在铜插入件上的第二集成电路管芯。 铜插入器显着地减少了由于衬底的热变化引起的衬底的翘曲引起的堆叠的芯片IC组件的翘曲。 铜插入器具有比常规硅（Si）插入件显着更高的热膨胀系数。 较高的CTE使得铜插入件能够抵消衬底翘曲。

公开(公告)号：US20070046248A1

公开(公告)日：2007-03-01

申请号：US11217752

申请日：2005-09-01

Applicant: Ramesh Ramamoorthy ,  Thomas Hopkins

Inventor： Ramesh Ramamoorthy ,  Thomas Hopkins

IPC: H02P7/36

CPC classification number: H02P1/26 ,  H02P3/18 ,  H02P29/02 ,  H02P2207/01

Abstract: A system controls an induction motor driven by a power inverter circuit. An operational amplifier circuit is operatively connected to the power inverter circuit and operative therewith for sensing DC current and controlling acceleration and deceleration of the induction motor. The operational amplifier circuit includes a first operational amplifier operative in a motoring mode to have a positive polarity output and remain substantially at zero during a regeneration mode. A second operational amplifier circuit is operative in a regeneration mode to have a negative polarity output and remain substantially at zero in a motoring mode.

公开(公告)号：US07180175B2

公开(公告)日：2007-02-20

申请号：US10061507

申请日：2002-02-01

Applicant: Tiao Zhou ,  Michael J. Hundt

Inventor： Tiao Zhou ,  Michael J. Hundt

IPC: H01L23/36

CPC classification number: H01L24/49 ,  H01L23/36 ,  H01L23/49838 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A thermally-enhanced ball grid array package structure is provided that includes an integrated circuit chip, a heat spreader and a substrate. The integrated circuit chip has a specified surface area. The heat spreader is coupled to the integrated circuit chip. The substrate is coupled to the heat spreader. The substrate has a specified surface area. The heat spreader covers a specified portion of the surface area of the substrate that is greater than the surface area of the integrated circuit chip. The heat spreader is operable to dissipate heat from the integrated circuit chip over the specified portion of the surface area of the substrate.

Abstract translation: 提供了一种热增强球栅阵列封装结构，其包括集成电路芯片，散热器和基板。 集成电路芯片具有指定的表面积。 散热器耦合到集成电路芯片。 衬底耦合到散热器。 基板具有指定的表面积。 散热器覆盖大于集成电路芯片的表面积的基板的表面积的指定部分。 散热器可操作以从集成电路芯片散热超过衬底表面区域的指定部分。