公开(公告)号：US09431901B2

公开(公告)日：2016-08-30

申请号：US14160225

申请日：2014-01-21

Applicant: Analog Devices Global

Inventor： Barry P. Kinsella

IPC: G05G1/10 ,  H02M3/07

CPC classification number: H02M3/07 ,  H02M3/073

Abstract: A charge pump cell, comprising: an input node; an output node; Q channels, where Q is an integer greater than one, and where at least two of the channels comprise: a capacitor; a unidirectional current flow device; an output diode; and a channel drive signal node; and wherein a first current flow node of the unidirectional current flow device is connected to a first node of the capacitor at a channel node, a second node of the capacitor is connected to the channel drive signal node, a second current flow node of the unidirectional current flow device is connected to the input node, and the output diode is connected between the channel node and the output node.

Abstract translation: 一种电荷泵单元，包括：输入节点; 输出节点; Q通道，其中Q是大于1的整数，并且其中至少两个通道包括：电容器; 单向电流装置; 输出二极管; 和信道驱动信号节点; 并且其中所述单向电流流动装置的第一电流流动节点在通道节点处连接到所述电容器的第一节点，所述电容器的第二节点连接到所述通道驱动信号节点，所述单向电流流动装置的第二电流流节点 电流流动装置连接到输入节点，输出二极管连接在通道节点和输出节点之间。

公开(公告)号：US20160245677A1

公开(公告)日：2016-08-25

申请号：US15048883

申请日：2016-02-19

Applicant: Analog Devices Global ,  Sensitec GmbH

Inventor： Gavin Patrick Cosgrave ,  Jochen Schmitt ,  Dermot G. O'Keeffe

IPC: G01D18/00 ,  G01D5/16

CPC classification number: G01D5/24461 ,  G01D5/145

Abstract: Sensor error detection with an additional channel is disclosed herein. First and second magnetic sensing elements can be disposed at angles relative to each other. In some embodiments, the first and second magnetic sensing elements can be magnetoresistive sensing elements, such as anisotropic magnetoresistance (AMR) sensing elements. Sensor data from first and second channels, respectively, having the first and second sensing elements, can be obtained. Third channel can receive a signal from the first sensing element and a signal from the second sensing element, and sensor data from the third channel can be obtained. Expected third channel data can be determined and compared to the obtained third channel data to indicate error.

Abstract translation: 本文公开了具有附加通道的传感器误差检测。 第一和第二磁感应元件可相对于彼此成角度地布置。 在一些实施例中，第一和第二磁感应元件可以是诸如各向异性磁阻（AMR）感测元件的磁阻感测元件。 可以获得具有第一和第二感测元件的来自第一和第二通道的传感器数据。 第三通道可以接收来自第一感测元件的信号和来自第二感测元件的信号，并且可以获得来自第三通道的传感器数据。 可以确定预期的第三通道数据并将其与获得的第三通道数据进行比较以指示误差。

公开(公告)号：US20160233833A1

公开(公告)日：2016-08-11

申请号：US14618899

申请日：2015-02-10

Applicant: Analog Devices Global

Inventor： Gerard Mora-Puchalt

IPC: H03F1/02 ,  H03F3/45

CPC classification number: H03F3/2175 ,  H03F1/0205 ,  H03F1/303 ,  H03F3/2171 ,  H03F3/303 ,  H03F3/45179 ,  H03F3/45219 ,  H03F3/45748 ,  H03F3/45775 ,  H03F2200/231 ,  H03F2200/297 ,  H03F2203/45112 ,  H03F2203/45116 ,  H03F2203/45292 ,  H03F2203/45454 ,  H03M1/12

Abstract: Adaptive biasing circuits for input differential pairs of a buffer or an amplifier adapt to autozero currents for discrete pair selection or continuous pair selection. The adaptive biasing circuits include a multistage device including current source and follower devices with a plurality of switches for a two-phase operation: autozero and amplifying phases. During an autozero phase, input differential pairs are isolated from subsequent stages and biasing currents are determined for autozeroing of input offset voltages. During an amplifying phase, both input differential pairs can be coupled to subsequent stages for continuous selection or a selected input differential pair can be coupled to subsequent stages for discrete selection.

Abstract translation: 用于缓冲器或放大器的输入差分对的自适应偏置电路适用于用于离散对选择或连续对选择的自动电流。 自适应偏置电路包括包括具有用于两相操作的多个开关的电流源和从动装置的多级装置：自动调零和放大阶段。 在自动调零阶段，输入差分对与后续阶段隔离，偏置电流被确定为输入偏移电压的自动调零。 在放大阶段期间，两个输入差分对可以耦合到后续级以用于连续选择，或者所选择的输入差分对可耦合到后续级用于离散选择。

公开(公告)号：US09391519B2

公开(公告)日：2016-07-12

申请号：US14311907

申请日：2014-06-23

Applicant: Analog Devices Global

Inventor： Danzhu Lu ,  Xiaohan Gong ,  Bin Shao

IPC: H03K3/356 ,  H02M3/158 ,  H03K19/017

CPC classification number: H02M3/158 ,  H03K3/356 ,  H03K19/01721

Abstract: A device to detect an electrical signal is provided. The device includes sensing, output, and pull-down nodes. The device includes a pull-down circuit having a native metal-oxide-semiconductor field-effect transistor (MOSFET) to pull down the output node to approximately a voltage of the pull-down node. The device includes a switch circuit having a junction field-effect transistor (JFET). The JFET turns on the pull-down circuit in response to a voltage of the sensing node being less than a first threshold. The JFET also turns off the pull-down circuit in response to the voltage of the sensing node being greater than the first threshold.

Abstract translation: 提供了一种用于检测电信号的装置。 该设备包括感测，输出和下拉节点。 该器件包括具有天然金属氧化物半导体场效应晶体管（MOSFET）的下拉电路，以将输出节点下拉到大约下拉节点的电压。 该器件包括具有结型场效应晶体管（JFET）的开关电路。 JFET响应于感测节点的电压小于第一阈值而导通下拉电路。 JFET还响应于感测节点的电压大于第一阈值而关断下拉电路。

公开(公告)号：US09384168B2

公开(公告)日：2016-07-05

申请号：US13914731

申请日：2013-06-11

Applicant: Analog Devices Global

Inventor： Mikael Mortensen

IPC: G06F17/16 ,  G06F9/30 ,  G06F9/38

CPC classification number: G06F17/16 ,  G06F9/3001 ,  G06F9/30036 ,  G06F9/3824 ,  G06F9/3893

Abstract: In at least one example embodiment, a microprocessor circuit is provided that includes a microprocessor core coupled to a data memory via a data memory bus comprising a predetermined integer number of data wires (J); the single-ported data memory configured for storage of vector input elements of an N element vector in a predetermined vector element order and storage of matrix input elements of an M×N matrix comprising M columns of matrix input elements and N rows of matrix input elements; a vector matrix product accelerator comprising a datapath configured for multiplying the N element vector and the matrix to compute an M element result vector, the vector matrix product accelerator comprising: an input/output port interfacing the data memory bus to the vector matrix product accelerator; a plurality of vector input registers for storage respective input vector elements received through the input/output port.

Abstract translation: 在至少一个示例性实施例中，提供了微处理器电路，其包括经由包括预定整数数据线（J）的数据存储器总线耦合到数据存储器的微处理器核心; 单端口数据存储器，其被配置为以预定向量元素顺序存储N个元素向量的向量输入元素，并存储包括M列矩阵输入元素和N行矩阵输入元素的M×N矩阵的矩阵输入元素 ; 矢量矩阵乘积加速器，其包括被配置为将所述N个元素向量和所述矩阵相乘以计算M元素结果向量的数据路径，所述向量矩阵乘积加速器包括：将所述数据存储器总线连接到所述向量矩阵乘积加速器的输入/输出端口; 多个向量输入寄存器，用于存储通过输入/输出端口接收的各个输入向量元素。

公开(公告)号：US20160191176A1

公开(公告)日：2016-06-30

申请号：US14912065

申请日：2014-08-15

Applicant: ANALOG DEVICES GLOBAL

Inventor： Conor O'Keeffe ,  Michael O'Brien ,  Sean Sexton

IPC: H04B17/11 ,  H04B7/06

CPC classification number: H04B17/11 ,  H01Q3/267 ,  H04B7/0617 ,  H04B17/00

Abstract: A method for calibrating an antenna array coupled to a plurality of transmitters via a plurality of couplers and a plurality of antenna element feeds is described. The method comprises, at a communication unit: selecting and coupling at least one coupler to a calibration receiver in a feedback path in the communication unit; scaling at least one first signal by at least one first beamform weight; applying the scaled at least one first signal to a first transmitter of the plurality of transmitters and routing the scaled at least one first signal via the selected at least one coupler to the calibration receiver; generating a reference signal by selecting and scaling the at least one first signal by at least one second beamform weight substantially equal to the at least one first beamform weight; comparing the at least one first signal scaled with the at least one first beamform weight with the at least one first signal reference signal scaled by the at least one second beamform weight to determine at least one first parameter result; storing the at least one first parameter result of the comparison associated with the first transmitter; repeating for subsequent transmitters the steps of selecting and coupling a further coupler, scaling, applying at least one further signal to a further transmitter of the plurality of transmitters, generating a further reference signal, comparing and storing at least one further parameter result until the plurality of couplers have been selected; and determining at least one calibration correction coefficient from a plurality of parameter results for applying to at least one second signal input to at least one transmitter of the plurality of transmitters coupled to the antenna array to substantially equalise a transfer function of a plurality of transmit paths to antenna element feeds for the at least one second signal having beamform weights applied thereto.

Abstract translation: 描述了经由多个耦合器和多个天线元件馈送来校准耦合到多个发射器的天线阵列的方法。 该方法包括：在通信单元处：在通信单元中的反馈路径中选择和耦合至少一个耦合器到校准接收器; 通过至少一个第一波束束重量来缩放至少一个第一信号; 将所述缩放的至少一个第一信号应用于所述多个发射机中的第一发射机，并且经由所选择的至少一个耦合器将所述经缩放的至少一个第一信号路由到所述校准接收机; 通过基本上等于所述至少一个第一波束形式权重的至少一个第二波束形状权重来选择和缩放所述至少一个第一信号来产生参考信号; 将与所述至少一个第一波束形式权重缩放的所述至少一个第一信号与由所述至少一个第二波束形式权重缩放以确定至少一个第一参数结果的所述至少一个第一信号参考信号进行比较; 存储与第一发射机相关联的比较的至少一个第一参数结果; 为后续发射机重复步骤，选择和耦合另一个耦合器，缩放，将至少一个另外的信号施加到多个发射机中的另外的发射机，产生另外的参考信号，比较并存储至少一个其它参数结果，直到多个 的耦合器被选中; 以及从多个参数结果确定至少一个校准校正系数，以应用至少一个第二信号，所述至少一个第二信号输入到耦合到所述天线阵列的所述多个发射机中的至少一个发射机，以基本上均衡多个发射路径的传递函数 至少一个具有施加到其上的波束成形权重的第二信号的天线元件馈送。

公开(公告)号：US09379675B2

公开(公告)日：2016-06-28

申请号：US14282484

申请日：2014-05-20

Applicant: ANALOG DEVICES GLOBAL

Inventor： Eamon Nash ,  Mingming Zhao ,  Ovidiu Vasile Balaj ,  Peadar Antony Forbes ,  Claire Masterson

IPC: H03F1/52 ,  H03F1/02 ,  H03F3/195 ,  H03F3/24 ,  H03F3/72

CPC classification number: H03F1/52 ,  H03F1/0222 ,  H03F1/0266 ,  H03F3/195 ,  H03F3/24 ,  H03F3/72 ,  H03F2200/102 ,  H03F2200/18 ,  H03F2200/192 ,  H03F2200/195 ,  H03F2200/426 ,  H03F2200/435 ,  H03F2200/451 ,  H03F2203/7215 ,  H03F2203/7221

Abstract: Aspects of this disclosure relate to protecting a circuit, such as an amplifier, from transient overdrive events and/or average overdrive events. In one embodiment, an indication of average power, such as root mean squared (RMS) power of a radio frequency (RF) signal, can be compared to a first threshold and an indication of a peak RF power can be compared to a second threshold. When the indication of average power exceeds the first threshold, an average overdrive event can be detected. When the indication of peak power exceeds the second threshold, a peak overdrive event can be detected. If either a transient overdrive event or an average overdrive event is detected, a circuit, such as an amplifier, can be protected.

Abstract translation: 本公开的方面涉及保护诸如放大器的电路免受瞬态过驱动事件和/或平均过驱动事件的影响。 在一个实施例中，能够将射频（RF）信号的平均功率（诸如均方根（RMS））功率的指示与第一阈值进行比较，并且峰值RF功率的指示可以与第二阈值进行比较 。 当平均功率的指示超过第一阈值时，可以检测平均过驱动事件。 当峰值功率的指示超过第二阈值时，可以检测峰值过驱动事件。 如果检测到瞬态过驱动事件或平均过驱动事件，则可以保护诸如放大器的电路。

公开(公告)号：US09350259B2

公开(公告)日：2016-05-24

申请号：US13955971

申请日：2013-07-31

Applicant: Analog Devices Global

Inventor： Yingyang Ou ,  Renjian Xie ,  Qingyi Huang

IPC: H02M3/335 ,  H02M3/337

CPC classification number: H02M3/337 ,  H02M3/33592 ,  Y02B70/1475

Abstract: An apparatus comprises a power converter circuit and a control circuit. The power converter circuit includes a primary circuit side and a secondary circuit side. The primary circuit side includes a plurality of primary switches, and the secondary circuit side includes a plurality of synchronous rectifiers and an inductor. The control circuit is configured to operate the synchronous rectifiers synchronously with the primary switches when inductor current at the inductor is greater than or equal to a reference inductor current, and operate the synchronous rectifiers in a bidirectional mode when the inductor current is less than the reference inductor current, wherein energy is delivered from the primary side to the secondary side and from the secondary side to the primary side during the bidirectional mode.

Abstract translation: 一种装置包括功率转换器电路和控制电路。 功率转换器电路包括初级电路侧和次级电路侧。 主电路侧包括多个初级开关，次级电路侧包括多个同步整流器和电感器。 控制电路被配置为当电感器上的电感电流大于或等于参考电感器电流时与主开关同步地操作同步整流器，并且当电感器电流小于参考电压时，以双向模式操作同步整流器 电感电流，其中在双向模式期间，能量从初级侧传递到次级侧，从次级侧传递到初级侧。

公开(公告)号：US20160099220A1

公开(公告)日：2016-04-07

申请号：US14852380

申请日：2015-09-11

Applicant: Analog Devices Global

Inventor： Yusuf Alperen Atesal ,  Turusan Kolcuoglu

IPC: H01L23/66 ,  H01L23/498 ,  H01L23/64 ,  H01L23/00

CPC classification number: H01L23/66 ,  H01L23/49838 ,  H01L23/642 ,  H01L23/645 ,  H01L24/48 ,  H01L24/49 ,  H01L2223/6611 ,  H01L2224/05553 ,  H01L2224/48157 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2924/00014 ,  H01L2924/10161 ,  H01L2924/1421 ,  H04B1/40 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/85399

Abstract: A high isolation wideband switch is disclosed. In one aspect, the switch includes an integrated circuit package having an integrated circuit die with a first plurality of leads that is positioned on a package substrate that has a second plurality of leads. The first leads of the integrated circuit die are connected to the second the leads of the package substrate via bond wires and a first electrical coupling occurs between the first leads and the integrated circuit die in response to an RF signal applied to the integrated circuit package. The bond wires have a second electrical coupling in response to the RF signal and the bond wires are arranged such that the second electrical coupling is matched to the first electrical coupling within a selected frequency band so as to reduce the overall electrical coupling of the integrated circuit package for RF signals within the selected frequency band.

Abstract translation: 公开了一种高隔离宽带开关。 一方面，开关包括具有集成电路管芯的集成电路封装，该集成电路管芯具有位于具有第二多个引线的封装衬底上的第一多个引线。 集成电路管芯的第一引线通过接合线连接到封装衬底的第二引线，并且响应于施加到集成电路封装的RF信号而在第一引线和集成电路管芯之间发生第一电耦合。 接合线具有响应于RF信号的第二电耦合，并且接合线布置成使得第二电耦合在所选频带内与第一电耦合相匹配，以便减小集成电路的整体电耦合 封装，用于所选频段内的射频信号。

公开(公告)号：US09306506B1

公开(公告)日：2016-04-05

申请号：US14552306

申请日：2014-11-24

Applicant: Analog Devices Global

Inventor： Yong Zhang ,  Joseph Brad Brannon ,  John P. Oates ,  Guanghua Man ,  Gina G. Colangelo

IPC: H03F1/32 ,  H03F3/21 ,  H03F3/19

CPC classification number: H03F1/3247 ,  H03F1/3241 ,  H03F1/34 ,  H03F3/19 ,  H03F3/24 ,  H03F3/245 ,  H03F2200/171 ,  H03F2200/451 ,  H03F2201/3215 ,  H04B1/0475 ,  H04B2001/0425 ,  H04B2001/0433

Abstract: Apparatus and methods for dual loop power amplifier digital pre-distortion systems are disclosed. In certain implementations, a dual DPD system includes a first digital pre-distorter (DPD) and a second DPD. A digital IF upconverter electrically coupled between the first and second DPDs separates the DPD system into independently controlled fine and coarse sections. The adaptive adjustment processor can be used to modify or pre-distort input signals in order to compensate for the power amplifier nonlinearity. It also controls the fine DPD section to correct an RF output signal single-band adjacent channel leakage ratio (ACLR), while it controls the coarse DPD section to correct an RF output signal dual band intermodulation distortion (IMD).

Abstract translation: 公开了用于双环功率放大器数字预失真系统的装置和方法。 在某些实现中，双DPD系统包括第一数字预失真器（DPD）和第二DPD。 电耦合在第一和第二DPD之间的数字IF上变频器将DPD系统分离成独立控制的精细和粗糙部分。 自适应调整处理器可用于修改或预失真输入信号，以补偿功率放大器的非线性。 它还控制精细的DPD部分来校正RF输出信号单频带相邻信道泄漏比（ACLR），同时它控制粗DPD部分以校正RF输出信号双频带互调失真（IMD）。